2 * Atheros AR71xx SoC platform devices
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Parts of this file are based on Atheros' 2.6.15 BSP
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
21 #include <asm/mach-ar71xx/ar71xx.h>
22 #include <asm/mach-ar71xx/platform.h>
24 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
27 * OHCI (USB full speed host controller)
29 static struct resource ar71xx_ohci_resources[] = {
31 .start = AR71XX_OHCI_BASE,
32 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
33 .flags = IORESOURCE_MEM,
36 .start = AR71XX_MISC_IRQ_OHCI,
37 .end = AR71XX_MISC_IRQ_OHCI,
38 .flags = IORESOURCE_IRQ,
42 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
43 static struct platform_device ar71xx_ohci_device = {
44 .name = "ar71xx-ohci",
46 .resource = ar71xx_ohci_resources,
47 .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
49 .dma_mask = &ar71xx_ohci_dmamask,
50 .coherent_dma_mask = DMA_BIT_MASK(32),
55 * EHCI (USB full speed host controller)
57 static struct resource ar71xx_ehci_resources[] = {
59 .start = AR71XX_EHCI_BASE,
60 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
61 .flags = IORESOURCE_MEM,
64 .start = AR71XX_CPU_IRQ_USB,
65 .end = AR71XX_CPU_IRQ_USB,
66 .flags = IORESOURCE_IRQ,
71 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
72 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
74 static struct platform_device ar71xx_ehci_device = {
75 .name = "ar71xx-ehci",
77 .resource = ar71xx_ehci_resources,
78 .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
80 .dma_mask = &ar71xx_ehci_dmamask,
81 .coherent_dma_mask = DMA_BIT_MASK(32),
82 .platform_data = &ar71xx_ehci_data,
86 #define AR71XX_USB_RESET_MASK \
87 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
88 | RESET_MODULE_USB_OHCI_DLL)
90 static void ar71xx_usb_setup(void)
92 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
94 ar71xx_device_start(AR71XX_USB_RESET_MASK);
96 /* Turning on the Buff and Desc swap bits */
97 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
99 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
100 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
105 static void ar91xx_usb_setup(void)
107 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
110 ar71xx_device_start(RESET_MODULE_USB_HOST);
113 ar71xx_device_start(RESET_MODULE_USB_PHY);
117 void __init ar71xx_add_device_usb(void)
119 switch (ar71xx_soc) {
120 case AR71XX_SOC_AR7130:
121 case AR71XX_SOC_AR7141:
122 case AR71XX_SOC_AR7161:
124 platform_device_register(&ar71xx_ohci_device);
125 platform_device_register(&ar71xx_ehci_device);
128 case AR71XX_SOC_AR9130:
129 case AR71XX_SOC_AR9132:
131 ar71xx_ehci_data.is_ar91xx = 1;
132 platform_device_register(&ar71xx_ehci_device);
140 #ifndef CONFIG_AR71XX_EARLY_SERIAL
141 static struct resource ar71xx_uart_resources[] = {
143 .start = AR71XX_UART_BASE,
144 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
145 .flags = IORESOURCE_MEM,
149 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
150 static struct plat_serial8250_port ar71xx_uart_data[] = {
152 .mapbase = AR71XX_UART_BASE,
153 .irq = AR71XX_MISC_IRQ_UART,
154 .flags = AR71XX_UART_FLAGS,
155 .iotype = UPIO_MEM32,
158 /* terminating entry */
162 static struct platform_device ar71xx_uart_device = {
163 .name = "serial8250",
164 .id = PLAT8250_DEV_PLATFORM,
165 .resource = ar71xx_uart_resources,
166 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
168 .platform_data = ar71xx_uart_data
172 void __init ar71xx_add_device_uart(void)
174 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
175 platform_device_register(&ar71xx_uart_device);
177 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
179 static struct resource ar71xx_mdio_resources[] = {
182 .flags = IORESOURCE_MEM,
183 .start = AR71XX_GE0_BASE + 0x20,
184 .end = AR71XX_GE0_BASE + 0x38 - 1,
188 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
189 .phy_mask = 0xffffffff,
192 static struct platform_device ar71xx_mdio_device = {
193 .name = "ag71xx-mdio",
195 .resource = ar71xx_mdio_resources,
196 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
198 .platform_data = &ar71xx_mdio_data,
202 void __init ar71xx_add_device_mdio(u32 phy_mask)
204 ar71xx_mdio_data.phy_mask = phy_mask;
205 platform_device_register(&ar71xx_mdio_device);
208 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
213 base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
215 t = __raw_readl(base + cfg_reg);
218 __raw_writel(t, base + cfg_reg);
221 __raw_writel(pll_val, base + pll_reg);
224 __raw_writel(t, base + cfg_reg);
228 __raw_writel(t, base + cfg_reg);
231 printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
232 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
237 static void ar71xx_set_pll_ge0(u32 val)
239 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
240 val, AR71XX_ETH0_PLL_SHIFT);
243 static void ar71xx_set_pll_ge1(u32 val)
245 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
246 val, AR71XX_ETH1_PLL_SHIFT);
249 static void ar91xx_set_pll_ge0(u32 val)
251 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
252 val, AR91XX_ETH0_PLL_SHIFT);
255 static void ar91xx_set_pll_ge1(u32 val)
257 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
258 val, AR91XX_ETH1_PLL_SHIFT);
261 static void ar71xx_ddr_flush_ge0(void)
263 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
266 static void ar71xx_ddr_flush_ge1(void)
268 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
271 static void ar91xx_ddr_flush_ge0(void)
273 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
276 static void ar91xx_ddr_flush_ge1(void)
278 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
281 static struct resource ar71xx_eth0_resources[] = {
284 .flags = IORESOURCE_MEM,
285 .start = AR71XX_GE0_BASE,
286 .end = AR71XX_GE0_BASE + 0x20 - 1,
289 .flags = IORESOURCE_MEM,
290 .start = AR71XX_GE0_BASE + 0x38,
291 .end = AR71XX_GE0_BASE + 0x200 - 1,
294 .flags = IORESOURCE_MEM,
295 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
296 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
299 .flags = IORESOURCE_IRQ,
300 .start = AR71XX_CPU_IRQ_GE0,
301 .end = AR71XX_CPU_IRQ_GE0,
305 struct ag71xx_platform_data ar71xx_eth0_data = {
306 .reset_bit = RESET_MODULE_GE0_MAC,
309 static struct platform_device ar71xx_eth0_device = {
312 .resource = ar71xx_eth0_resources,
313 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
315 .platform_data = &ar71xx_eth0_data,
319 static struct resource ar71xx_eth1_resources[] = {
322 .flags = IORESOURCE_MEM,
323 .start = AR71XX_GE1_BASE,
324 .end = AR71XX_GE1_BASE + 0x20 - 1,
327 .flags = IORESOURCE_MEM,
328 .start = AR71XX_GE1_BASE + 0x38,
329 .end = AR71XX_GE1_BASE + 0x200 - 1,
332 .flags = IORESOURCE_MEM,
333 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
334 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
337 .flags = IORESOURCE_IRQ,
338 .start = AR71XX_CPU_IRQ_GE1,
339 .end = AR71XX_CPU_IRQ_GE1,
343 struct ag71xx_platform_data ar71xx_eth1_data = {
344 .reset_bit = RESET_MODULE_GE1_MAC,
347 static struct platform_device ar71xx_eth1_device = {
350 .resource = ar71xx_eth1_resources,
351 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
353 .platform_data = &ar71xx_eth1_data,
357 static int ar71xx_eth_instance __initdata;
358 void __init ar71xx_add_device_eth(unsigned int id)
360 struct platform_device *pdev;
361 struct ag71xx_platform_data *pdata;
365 switch (ar71xx_eth0_data.phy_if_mode) {
366 case PHY_INTERFACE_MODE_MII:
367 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
369 case PHY_INTERFACE_MODE_GMII:
370 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
372 case PHY_INTERFACE_MODE_RGMII:
373 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
375 case PHY_INTERFACE_MODE_RMII:
376 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
379 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
383 pdev = &ar71xx_eth0_device;
386 switch (ar71xx_eth1_data.phy_if_mode) {
387 case PHY_INTERFACE_MODE_RMII:
388 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
390 case PHY_INTERFACE_MODE_RGMII:
391 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
394 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
398 pdev = &ar71xx_eth1_device;
401 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
405 pdata = pdev->dev.platform_data;
407 switch (ar71xx_soc) {
408 case AR71XX_SOC_AR7130:
409 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
410 : ar71xx_ddr_flush_ge0;
411 pdata->set_pll = id ? ar71xx_set_pll_ge1
412 : ar71xx_set_pll_ge0;
415 case AR71XX_SOC_AR7141:
416 case AR71XX_SOC_AR7161:
417 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
418 : ar71xx_ddr_flush_ge0;
419 pdata->set_pll = id ? ar71xx_set_pll_ge1
420 : ar71xx_set_pll_ge0;
424 case AR71XX_SOC_AR9130:
425 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
426 : ar91xx_ddr_flush_ge0;
427 pdata->set_pll = id ? ar91xx_set_pll_ge1
428 : ar91xx_set_pll_ge0;
429 pdata->is_ar91xx = 1;
432 case AR71XX_SOC_AR9132:
433 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
434 : ar91xx_ddr_flush_ge0;
435 pdata->set_pll = id ? ar91xx_set_pll_ge1
436 : ar91xx_set_pll_ge0;
437 pdata->is_ar91xx = 1;
445 switch (pdata->phy_if_mode) {
446 case PHY_INTERFACE_MODE_GMII:
447 case PHY_INTERFACE_MODE_RGMII:
448 if (!pdata->has_gbit) {
449 printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
458 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
459 pdata->mac_addr[5] += ar71xx_eth_instance;
461 platform_device_register(pdev);
462 ar71xx_eth_instance++;
465 static struct resource ar71xx_spi_resources[] = {
467 .start = AR71XX_SPI_BASE,
468 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
469 .flags = IORESOURCE_MEM,
473 static struct platform_device ar71xx_spi_device = {
474 .name = "ar71xx-spi",
476 .resource = ar71xx_spi_resources,
477 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
480 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
481 struct spi_board_info const *info,
484 ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
486 spi_register_board_info(info, n);
487 ar71xx_spi_device.dev.platform_data = pdata;
488 platform_device_register(&ar71xx_spi_device);
491 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
492 struct gpio_led *leds)
494 struct platform_device *pdev;
495 struct gpio_led_platform_data pdata;
499 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
503 memcpy(p, leds, num_leds * sizeof(*p));
505 pdev = platform_device_alloc("leds-gpio", id);
509 memset(&pdata, 0, sizeof(pdata));
510 pdata.num_leds = num_leds;
513 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
517 err = platform_device_add(pdev);
524 platform_device_put(pdev);
530 void __init ar71xx_add_device_gpio_buttons(int id,
531 unsigned poll_interval,
533 struct gpio_button *buttons)
535 struct platform_device *pdev;
536 struct gpio_buttons_platform_data pdata;
537 struct gpio_button *p;
540 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
544 memcpy(p, buttons, nbuttons * sizeof(*p));
546 pdev = platform_device_alloc("gpio-buttons", id);
548 goto err_free_buttons;
550 memset(&pdata, 0, sizeof(pdata));
551 pdata.poll_interval = poll_interval;
552 pdata.nbuttons = nbuttons;
555 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
560 err = platform_device_add(pdev);
567 platform_device_put(pdev);
573 void __init ar71xx_add_device_wdt(void)
575 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
578 void __init ar71xx_set_mac_base(unsigned char *mac)
580 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
583 void __init ar71xx_parse_mac_addr(char *mac_str)
588 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
589 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
592 ar71xx_set_mac_base(tmp);
594 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
595 "\"%s\"\n", mac_str);