2 * Atheros PB42 board support
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/bitops.h>
14 #include <linux/platform_device.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
18 #include <asm/mips_machine.h>
19 #include <asm/mach-ar71xx/ar71xx.h>
20 #include <asm/mach-ar71xx/pci.h>
24 static struct spi_board_info pb42_spi_info[] = {
28 .max_speed_hz = 25000000,
33 static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
37 .irq = AR71XX_PCI_IRQ_DEV0,
41 .irq = AR71XX_PCI_IRQ_DEV1,
45 .irq = AR71XX_PCI_IRQ_DEV2,
49 #define PB42_WAN_PHYMASK BIT(20)
50 #define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19))
51 #define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK)
53 static void __init pb42_init(void)
55 ar71xx_add_device_spi(NULL, pb42_spi_info,
56 ARRAY_SIZE(pb42_spi_info));
58 ar71xx_add_device_mdio(~PB42_MDIO_PHYMASK);
60 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
61 ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK;
63 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
64 ar71xx_eth1_data.phy_mask = PB42_LAN_PHYMASK;
65 ar71xx_eth1_data.speed = SPEED_100;
66 ar71xx_eth1_data.duplex = DUPLEX_FULL;
68 ar71xx_add_device_eth(0);
69 ar71xx_add_device_eth(1);
71 ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
74 MIPS_MACHINE(AR71XX_MACH_PB42, "Atheros PB42", pb42_init);