2 * D-Link DIR-825 rev. B1 board support
4 * Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
6 * based on mach-wndr3700.c
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #include <linux/input.h>
19 #include <linux/pci.h>
20 #include <linux/ath9k_platform.h>
21 #include <linux/delay.h>
22 #include <linux/rtl8366_smi.h>
24 #include <asm/mips_machine.h>
25 #include <asm/mach-ar71xx/ar71xx.h>
26 #include <asm/mach-ar71xx/pci.h>
30 #define DIR825B1_GPIO_LED_BLUE_USB 0
31 #define DIR825B1_GPIO_LED_ORANGE_POWER 1
32 #define DIR825B1_GPIO_LED_BLUE_POWER 2
33 #define DIR825B1_GPIO_LED_BLUE_POWERSAVE 4
34 #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
35 #define DIR825B1_GPIO_LED_BLUE_PLANET 11
37 #define DIR825B1_GPIO_BTN_RESET 3
38 #define DIR825B1_GPIO_BTN_POWERSAVE 8
40 #define DIR825B1_GPIO_RTL8366_SDA 5
41 #define DIR825B1_GPIO_RTL8366_SCK 7
43 #define DIR825B1_BUTTONS_POLL_INTERVAL 20
45 #define DIR825B1_CAL_LOCATION_0 0x1f661000
46 #define DIR825B1_CAL_LOCATION_1 0x1f665000
48 #define DIR825B1_MAC_LOCATION_0 0x2ffa81b8
49 #define DIR825B1_MAC_LOCATION_1 0x2ffa8370
51 static struct ath9k_platform_data dir825b1_wmac0_data;
52 static struct ath9k_platform_data dir825b1_wmac1_data;
53 static char dir825b1_wmac0_mac[6];
54 static char dir825b1_wmac1_mac[6];
56 #ifdef CONFIG_MTD_PARTITIONS
57 static struct mtd_partition dir825b1_partitions[] = {
62 .mask_flags = MTD_WRITEABLE,
67 .mask_flags = MTD_WRITEABLE,
76 .mask_flags = MTD_WRITEABLE,
79 #endif /* CONFIG_MTD_PARTITIONS */
81 static struct flash_platform_data dir825b1_flash_data = {
82 #ifdef CONFIG_MTD_PARTITIONS
83 .parts = dir825b1_partitions,
84 .nr_parts = ARRAY_SIZE(dir825b1_partitions),
88 static struct spi_board_info dir825b1_spi_info[] = {
92 .max_speed_hz = 25000000,
94 .platform_data = &dir825b1_flash_data,
98 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
100 .name = "dir825b1:blue:usb",
101 .gpio = DIR825B1_GPIO_LED_BLUE_USB,
104 .name = "dir825b1:orange:power",
105 .gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
108 .name = "dir825b1:blue:power",
109 .gpio = DIR825B1_GPIO_LED_BLUE_POWER,
112 .name = "dir825b1:blue:powersave",
113 .gpio = DIR825B1_GPIO_LED_BLUE_POWERSAVE,
116 .name = "dir825b1:orange:planet",
117 .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
120 .name = "dir825b1:blue:planet",
121 .gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
126 static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
132 .gpio = DIR825B1_GPIO_BTN_RESET,
139 .gpio = DIR825B1_GPIO_BTN_POWERSAVE,
144 static struct rtl8366_smi_platform_data dir825b1_rtl8366_smi_data = {
145 .gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
146 .gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
149 static struct platform_device dir825b1_rtl8366_smi_device = {
150 .name = "rtl8366-smi",
153 .platform_data = &dir825b1_rtl8366_smi_data,
158 static struct ar71xx_pci_irq dir825b1_pci_irqs[] __initdata = {
162 .irq = AR71XX_PCI_IRQ_DEV0,
166 .irq = AR71XX_PCI_IRQ_DEV1,
170 static int dir825b1_pci_plat_dev_init(struct pci_dev *dev)
172 switch(PCI_SLOT(dev->devfn)) {
174 dev->dev.platform_data = &dir825b1_wmac0_data;
178 dev->dev.platform_data = &dir825b1_wmac1_data;
185 static void dir825b1_pci_fixup(struct pci_dev *dev)
193 if (ar71xx_mach != AR71XX_MACH_DIR_825_B1)
196 dir825b1_pci_plat_dev_init(dev);
197 cal_data = dev->dev.platform_data;
199 if (*cal_data != 0xa55a) {
200 printk(KERN_ERR "PCI: no calibration data found for %s\n",
205 mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
207 printk(KERN_ERR "PCI: ioremap error for device %s\n",
212 printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
214 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
216 /* Setup the PCI device to allow access to the internal registers */
217 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, AR71XX_PCI_MEM_BASE);
218 pci_read_config_word(dev, PCI_COMMAND, &cmd);
219 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
220 pci_write_config_word(dev, PCI_COMMAND, cmd);
222 /* set pointer to first reg address */
224 while (*cal_data != 0xffff) {
228 val |= (*cal_data++) << 16;
230 __raw_writel(val, mem + reg);
234 pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
235 dev->vendor = val & 0xffff;
236 dev->device = (val >> 16) & 0xffff;
238 pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
239 dev->revision = val & 0xff;
240 dev->class = val >> 8; /* upper 3 bytes */
242 pci_read_config_word(dev, PCI_COMMAND, &cmd);
243 cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
244 pci_write_config_word(dev, PCI_COMMAND, cmd);
246 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
250 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
253 static void __init dir825b1_pci_init(void)
255 memcpy(dir825b1_wmac0_data.eeprom_data,
256 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
257 sizeof(dir825b1_wmac0_data.eeprom_data));
259 memcpy(dir825b1_wmac1_data.eeprom_data,
260 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
261 sizeof(dir825b1_wmac1_data.eeprom_data));
263 memcpy(dir825b1_wmac0_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_0), 6);
264 dir825b1_wmac0_data.macaddr = dir825b1_wmac0_mac;
265 memcpy(dir825b1_wmac1_mac, (u8 *)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
266 dir825b1_wmac1_data.macaddr = dir825b1_wmac1_mac;
268 ar71xx_pci_plat_dev_init = dir825b1_pci_plat_dev_init;
269 ar71xx_pci_init(ARRAY_SIZE(dir825b1_pci_irqs), dir825b1_pci_irqs);
272 static void __init dir825b1_pci_init(void) { }
273 #endif /* CONFIG_PCI */
275 static void __init dir825b1_setup(void)
279 memcpy(mac, (u8*)KSEG1ADDR(DIR825B1_MAC_LOCATION_1), 6);
280 for(i = 5; i >= 3; i--)
281 if(++mac[i] != 0x00) break;
283 ar71xx_set_mac_base(mac);
285 ar71xx_add_device_mdio(0x0);
287 ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366_smi_device.dev;
288 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
289 ar71xx_eth0_data.speed = SPEED_1000;
290 ar71xx_eth0_data.duplex = DUPLEX_FULL;
291 ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
293 ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366_smi_device.dev;
294 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
295 ar71xx_eth1_data.phy_mask = 0x10;
296 ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
298 ar71xx_add_device_eth(0);
299 ar71xx_add_device_eth(1);
301 ar71xx_add_device_spi(NULL, dir825b1_spi_info,
302 ARRAY_SIZE(dir825b1_spi_info));
304 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
307 ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
308 ARRAY_SIZE(dir825b1_gpio_buttons),
309 dir825b1_gpio_buttons);
311 ar71xx_add_device_usb();
313 platform_device_register(&dir825b1_rtl8366_smi_device);
317 MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "D-Link DIR-825 rev. B1", dir825b1_setup);