target/linux/ar71xx/files/arch/mips/ar71xx/devices.c

   1 /*
   2  *  Atheros AR71xx SoC platform devices
   3  *
   4  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Parts of this file are based on Atheros' 2.6.15 BSP
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/serial_8250.h>
  21 #include <linux/ath9k_platform.h>
  22
  23 #include <asm/mach-ar71xx/ar71xx.h>
  24
  25 #include "devices.h"
  26
  27 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
  28
  29 /*
  30  * OHCI (USB full speed host controller)
  31  */
  32 static struct resource ar71xx_ohci_resources[] = {
  33         [0] = {
  34                 .start  = AR71XX_OHCI_BASE,
  35                 .end    = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
  36                 .flags  = IORESOURCE_MEM,
  37         },
  38         [1] = {
  39                 .start  = AR71XX_MISC_IRQ_OHCI,
  40                 .end    = AR71XX_MISC_IRQ_OHCI,
  41                 .flags  = IORESOURCE_IRQ,
  42         },
  43 };
  44
  45 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
  46 static struct platform_device ar71xx_ohci_device = {
  47         .name           = "ar71xx-ohci",
  48         .id             = -1,
  49         .resource       = ar71xx_ohci_resources,
  50         .num_resources  = ARRAY_SIZE(ar71xx_ohci_resources),
  51         .dev = {
  52                 .dma_mask               = &ar71xx_ohci_dmamask,
  53                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  54         },
  55 };
  56
  57 /*
  58  * EHCI (USB full speed host controller)
  59  */
  60 static struct resource ar71xx_ehci_resources[] = {
  61         [0] = {
  62                 .start  = AR71XX_EHCI_BASE,
  63                 .end    = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
  64                 .flags  = IORESOURCE_MEM,
  65         },
  66         [1] = {
  67                 .start  = AR71XX_CPU_IRQ_USB,
  68                 .end    = AR71XX_CPU_IRQ_USB,
  69                 .flags  = IORESOURCE_IRQ,
  70         },
  71 };
  72
  73
  74 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
  75 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
  76
  77 static struct platform_device ar71xx_ehci_device = {
  78         .name           = "ar71xx-ehci",
  79         .id             = -1,
  80         .resource       = ar71xx_ehci_resources,
  81         .num_resources  = ARRAY_SIZE(ar71xx_ehci_resources),
  82         .dev = {
  83                 .dma_mask               = &ar71xx_ehci_dmamask,
  84                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  85                 .platform_data          = &ar71xx_ehci_data,
  86         },
  87 };
  88
  89 #define AR71XX_USB_RESET_MASK \
  90         (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
  91         | RESET_MODULE_USB_OHCI_DLL)
  92
  93 static void ar71xx_usb_setup(void)
  94 {
  95         ar71xx_device_stop(AR71XX_USB_RESET_MASK);
  96         mdelay(1000);
  97         ar71xx_device_start(AR71XX_USB_RESET_MASK);
  98
  99         /* Turning on the Buff and Desc swap bits */
 100         ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
 101
 102         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
 103         ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
 104
 105         mdelay(900);
 106 }
 107
 108 static void ar91xx_usb_setup(void)
 109 {
 110         ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
 111         mdelay(10);
 112
 113         ar71xx_device_start(RESET_MODULE_USB_HOST);
 114         mdelay(10);
 115
 116         ar71xx_device_start(RESET_MODULE_USB_PHY);
 117         mdelay(10);
 118 }
 119
 120 void __init ar71xx_add_device_usb(void)
 121 {
 122         switch (ar71xx_soc) {
 123         case AR71XX_SOC_AR7130:
 124         case AR71XX_SOC_AR7141:
 125         case AR71XX_SOC_AR7161:
 126                 ar71xx_usb_setup();
 127                 platform_device_register(&ar71xx_ohci_device);
 128                 platform_device_register(&ar71xx_ehci_device);
 129                 break;
 130
 131         case AR71XX_SOC_AR9130:
 132         case AR71XX_SOC_AR9132:
 133                 ar91xx_usb_setup();
 134                 ar71xx_ehci_data.is_ar91xx = 1;
 135                 platform_device_register(&ar71xx_ehci_device);
 136                 break;
 137
 138         default:
 139                 BUG();
 140         }
 141 }
 142
 143 static struct resource ar71xx_uart_resources[] = {
 144         {
 145                 .start  = AR71XX_UART_BASE,
 146                 .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
 147                 .flags  = IORESOURCE_MEM,
 148         },
 149 };
 150
 151 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
 152 static struct plat_serial8250_port ar71xx_uart_data[] = {
 153         {
 154                 .mapbase        = AR71XX_UART_BASE,
 155                 .irq            = AR71XX_MISC_IRQ_UART,
 156                 .flags          = AR71XX_UART_FLAGS,
 157                 .iotype         = UPIO_MEM32,
 158                 .regshift       = 2,
 159         }, {
 160                 /* terminating entry */
 161         }
 162 };
 163
 164 static struct platform_device ar71xx_uart_device = {
 165         .name           = "serial8250",
 166         .id             = PLAT8250_DEV_PLATFORM,
 167         .resource       = ar71xx_uart_resources,
 168         .num_resources  = ARRAY_SIZE(ar71xx_uart_resources),
 169         .dev = {
 170                 .platform_data  = ar71xx_uart_data
 171         },
 172 };
 173
 174 void __init ar71xx_add_device_uart(void)
 175 {
 176         ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
 177         platform_device_register(&ar71xx_uart_device);
 178 }
 179
 180 static struct resource ar71xx_mdio_resources[] = {
 181         {
 182                 .name   = "mdio_base",
 183                 .flags  = IORESOURCE_MEM,
 184                 .start  = AR71XX_GE0_BASE,
 185                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 186         }
 187 };
 188
 189 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
 190         .phy_mask       = 0xffffffff,
 191 };
 192
 193 static struct platform_device ar71xx_mdio_device = {
 194         .name           = "ag71xx-mdio",
 195         .id             = -1,
 196         .resource       = ar71xx_mdio_resources,
 197         .num_resources  = ARRAY_SIZE(ar71xx_mdio_resources),
 198         .dev = {
 199                 .platform_data = &ar71xx_mdio_data,
 200         },
 201 };
 202
 203 void __init ar71xx_add_device_mdio(u32 phy_mask)
 204 {
 205         ar71xx_mdio_data.phy_mask = phy_mask;
 206         platform_device_register(&ar71xx_mdio_device);
 207 }
 208
 209 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
 210 {
 211         void __iomem *base;
 212         u32 t;
 213
 214         base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
 215
 216         t = __raw_readl(base + cfg_reg);
 217         t &= ~(3 << shift);
 218         t |=  (2 << shift);
 219         __raw_writel(t, base + cfg_reg);
 220         udelay(100);
 221
 222         __raw_writel(pll_val, base + pll_reg);
 223
 224         t |= (3 << shift);
 225         __raw_writel(t, base + cfg_reg);
 226         udelay(100);
 227
 228         t &= ~(3 << shift);
 229         __raw_writel(t, base + cfg_reg);
 230         udelay(100);
 231
 232         printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
 233                 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
 234
 235         iounmap(base);
 236 }
 237
 238 struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
 239 struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
 240
 241 static u32 ar71xx_get_eth_pll(unsigned int mac, int speed)
 242 {
 243         struct ar71xx_eth_pll_data *pll_data;
 244         u32 pll_val;
 245
 246         switch (mac) {
 247         case 0:
 248                 pll_data = &ar71xx_eth0_pll_data;
 249                 break;
 250         case 1:
 251                 pll_data = &ar71xx_eth1_pll_data;
 252                 break;
 253         default:
 254                 BUG();
 255         }
 256
 257         switch (speed) {
 258         case SPEED_10:
 259                 pll_val = pll_data->pll_10;
 260                 break;
 261         case SPEED_100:
 262                 pll_val = pll_data->pll_100;
 263                 break;
 264         case SPEED_1000:
 265                 pll_val = pll_data->pll_1000;
 266                 break;
 267         default:
 268                 BUG();
 269         }
 270
 271         return pll_val;
 272 }
 273
 274 static void ar71xx_set_pll_ge0(int speed)
 275 {
 276         u32 val = ar71xx_get_eth_pll(0, speed);
 277
 278         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
 279                         val, AR71XX_ETH0_PLL_SHIFT);
 280 }
 281
 282 static void ar71xx_set_pll_ge1(int speed)
 283 {
 284         u32 val = ar71xx_get_eth_pll(1, speed);
 285
 286         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
 287                          val, AR71XX_ETH1_PLL_SHIFT);
 288 }
 289
 290 static void ar724x_set_pll_ge0(int speed)
 291 {
 292         /* TODO */
 293 }
 294
 295 static void ar724x_set_pll_ge1(int speed)
 296 {
 297         /* TODO */
 298 }
 299
 300 static void ar91xx_set_pll_ge0(int speed)
 301 {
 302         u32 val = ar71xx_get_eth_pll(0, speed);
 303
 304         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
 305                          val, AR91XX_ETH0_PLL_SHIFT);
 306 }
 307
 308 static void ar91xx_set_pll_ge1(int speed)
 309 {
 310         u32 val = ar71xx_get_eth_pll(1, speed);
 311
 312         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
 313                          val, AR91XX_ETH1_PLL_SHIFT);
 314 }
 315
 316 static void ar71xx_ddr_flush_ge0(void)
 317 {
 318         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
 319 }
 320
 321 static void ar71xx_ddr_flush_ge1(void)
 322 {
 323         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
 324 }
 325
 326 static void ar724x_ddr_flush_ge0(void)
 327 {
 328         ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
 329 }
 330
 331 static void ar724x_ddr_flush_ge1(void)
 332 {
 333         ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
 334 }
 335
 336 static void ar91xx_ddr_flush_ge0(void)
 337 {
 338         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
 339 }
 340
 341 static void ar91xx_ddr_flush_ge1(void)
 342 {
 343         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 344 }
 345
 346 static struct resource ar71xx_eth0_resources[] = {
 347         {
 348                 .name   = "mac_base",
 349                 .flags  = IORESOURCE_MEM,
 350                 .start  = AR71XX_GE0_BASE,
 351                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 352         }, {
 353                 .name   = "mii_ctrl",
 354                 .flags  = IORESOURCE_MEM,
 355                 .start  = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
 356                 .end    = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
 357         }, {
 358                 .name   = "mac_irq",
 359                 .flags  = IORESOURCE_IRQ,
 360                 .start  = AR71XX_CPU_IRQ_GE0,
 361                 .end    = AR71XX_CPU_IRQ_GE0,
 362         },
 363 };
 364
 365 struct ag71xx_platform_data ar71xx_eth0_data = {
 366         .reset_bit      = RESET_MODULE_GE0_MAC,
 367 };
 368
 369 static struct platform_device ar71xx_eth0_device = {
 370         .name           = "ag71xx",
 371         .id             = 0,
 372         .resource       = ar71xx_eth0_resources,
 373         .num_resources  = ARRAY_SIZE(ar71xx_eth0_resources),
 374         .dev = {
 375                 .platform_data = &ar71xx_eth0_data,
 376         },
 377 };
 378
 379 static struct resource ar71xx_eth1_resources[] = {
 380         {
 381                 .name   = "mac_base",
 382                 .flags  = IORESOURCE_MEM,
 383                 .start  = AR71XX_GE1_BASE,
 384                 .end    = AR71XX_GE1_BASE + 0x200 - 1,
 385         }, {
 386                 .name   = "mii_ctrl",
 387                 .flags  = IORESOURCE_MEM,
 388                 .start  = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
 389                 .end    = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
 390         }, {
 391                 .name   = "mac_irq",
 392                 .flags  = IORESOURCE_IRQ,
 393                 .start  = AR71XX_CPU_IRQ_GE1,
 394                 .end    = AR71XX_CPU_IRQ_GE1,
 395         },
 396 };
 397
 398 struct ag71xx_platform_data ar71xx_eth1_data = {
 399         .reset_bit      = RESET_MODULE_GE1_MAC,
 400 };
 401
 402 static struct platform_device ar71xx_eth1_device = {
 403         .name           = "ag71xx",
 404         .id             = 1,
 405         .resource       = ar71xx_eth1_resources,
 406         .num_resources  = ARRAY_SIZE(ar71xx_eth1_resources),
 407         .dev = {
 408                 .platform_data = &ar71xx_eth1_data,
 409         },
 410 };
 411
 412 #define AR71XX_PLL_VAL_1000     0x00110000
 413 #define AR71XX_PLL_VAL_100      0x00001099
 414 #define AR71XX_PLL_VAL_10       0x00991099
 415
 416 #define AR724X_PLL_VAL_1000     0x00110000
 417 #define AR724X_PLL_VAL_100      0x00001099
 418 #define AR724X_PLL_VAL_10       0x00991099
 419
 420 #define AR91XX_PLL_VAL_1000     0x1a000000
 421 #define AR91XX_PLL_VAL_100      0x13000a44
 422 #define AR91XX_PLL_VAL_10       0x00441099
 423
 424 static void __init ar71xx_init_eth_pll_data(unsigned int id)
 425 {
 426         struct ar71xx_eth_pll_data *pll_data;
 427         u32 pll_10, pll_100, pll_1000;
 428
 429         switch (id) {
 430         case 0:
 431                 pll_data = &ar71xx_eth0_pll_data;
 432                 break;
 433         case 1:
 434                 pll_data = &ar71xx_eth1_pll_data;
 435                 break;
 436         default:
 437                 BUG();
 438         }
 439
 440         switch (ar71xx_soc) {
 441         case AR71XX_SOC_AR7130:
 442         case AR71XX_SOC_AR7141:
 443         case AR71XX_SOC_AR7161:
 444                 pll_10 = AR71XX_PLL_VAL_10;
 445                 pll_100 = AR71XX_PLL_VAL_100;
 446                 pll_1000 = AR71XX_PLL_VAL_1000;
 447                 break;
 448
 449         case AR71XX_SOC_AR7240:
 450                 pll_10 = AR724X_PLL_VAL_10;
 451                 pll_100 = AR724X_PLL_VAL_100;
 452                 pll_1000 = AR724X_PLL_VAL_1000;
 453                 break;
 454
 455         case AR71XX_SOC_AR9130:
 456         case AR71XX_SOC_AR9132:
 457                 pll_10 = AR91XX_PLL_VAL_10;
 458                 pll_100 = AR91XX_PLL_VAL_100;
 459                 pll_1000 = AR91XX_PLL_VAL_1000;
 460                 break;
 461         default:
 462                 BUG();
 463         }
 464
 465         if (!pll_data->pll_10)
 466                 pll_data->pll_10 = pll_10;
 467
 468         if (!pll_data->pll_100)
 469                 pll_data->pll_100 = pll_100;
 470
 471         if (!pll_data->pll_1000)
 472                 pll_data->pll_1000 = pll_1000;
 473 }
 474
 475 static int ar71xx_eth_instance __initdata;
 476 void __init ar71xx_add_device_eth(unsigned int id)
 477 {
 478         struct platform_device *pdev;
 479         struct ag71xx_platform_data *pdata;
 480
 481         ar71xx_init_eth_pll_data(id);
 482
 483         switch (id) {
 484         case 0:
 485                 switch (ar71xx_eth0_data.phy_if_mode) {
 486                 case PHY_INTERFACE_MODE_MII:
 487                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
 488                         break;
 489                 case PHY_INTERFACE_MODE_GMII:
 490                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
 491                         break;
 492                 case PHY_INTERFACE_MODE_RGMII:
 493                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
 494                         break;
 495                 case PHY_INTERFACE_MODE_RMII:
 496                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
 497                         break;
 498                 default:
 499                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 500                                         "for eth0\n");
 501                         return;
 502                 }
 503                 pdev = &ar71xx_eth0_device;
 504                 break;
 505         case 1:
 506                 switch (ar71xx_eth1_data.phy_if_mode) {
 507                 case PHY_INTERFACE_MODE_RMII:
 508                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
 509                         break;
 510                 case PHY_INTERFACE_MODE_RGMII:
 511                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
 512                         break;
 513                 default:
 514                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 515                                         "for eth1\n");
 516                         return;
 517                 }
 518                 pdev = &ar71xx_eth1_device;
 519                 break;
 520         default:
 521                 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
 522                 return;
 523         }
 524
 525         pdata = pdev->dev.platform_data;
 526
 527         switch (ar71xx_soc) {
 528         case AR71XX_SOC_AR7130:
 529                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 530                                       : ar71xx_ddr_flush_ge0;
 531                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 532                                      : ar71xx_set_pll_ge0;
 533                 break;
 534
 535         case AR71XX_SOC_AR7141:
 536         case AR71XX_SOC_AR7161:
 537                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 538                                       : ar71xx_ddr_flush_ge0;
 539                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 540                                      : ar71xx_set_pll_ge0;
 541                 pdata->has_gbit = 1;
 542                 break;
 543
 544         case AR71XX_SOC_AR7240:
 545                 pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
 546                                       : ar724x_ddr_flush_ge0;
 547                 pdata->set_pll =  id ? ar724x_set_pll_ge1
 548                                      : ar724x_set_pll_ge0;
 549                 pdata->is_ar724x = 1;
 550                 break;
 551
 552         case AR71XX_SOC_AR9130:
 553                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 554                                       : ar91xx_ddr_flush_ge0;
 555                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 556                                      : ar91xx_set_pll_ge0;
 557                 pdata->is_ar91xx = 1;
 558                 break;
 559
 560         case AR71XX_SOC_AR9132:
 561                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 562                                       : ar91xx_ddr_flush_ge0;
 563                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 564                                       : ar91xx_set_pll_ge0;
 565                 pdata->is_ar91xx = 1;
 566                 pdata->has_gbit = 1;
 567                 break;
 568
 569         default:
 570                 BUG();
 571         }
 572
 573         switch (pdata->phy_if_mode) {
 574         case PHY_INTERFACE_MODE_GMII:
 575         case PHY_INTERFACE_MODE_RGMII:
 576                 if (!pdata->has_gbit) {
 577                         printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
 578                                         id);
 579                         return;
 580                 }
 581                 /* fallthrough */
 582         default:
 583                 break;
 584         }
 585
 586         if (is_valid_ether_addr(ar71xx_mac_base)) {
 587                 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
 588                 pdata->mac_addr[5] += ar71xx_eth_instance;
 589         } else {
 590                 random_ether_addr(pdata->mac_addr);
 591                 printk(KERN_DEBUG
 592                         "ar71xx: using random MAC address for eth%d\n",
 593                         ar71xx_eth_instance);
 594         }
 595
 596         /* Reset the device */
 597         ar71xx_device_stop(pdata->reset_bit);
 598         mdelay(100);
 599
 600         ar71xx_device_start(pdata->reset_bit);
 601         mdelay(100);
 602
 603         platform_device_register(pdev);
 604         ar71xx_eth_instance++;
 605 }
 606
 607 static struct resource ar71xx_spi_resources[] = {
 608         [0] = {
 609                 .start  = AR71XX_SPI_BASE,
 610                 .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
 611                 .flags  = IORESOURCE_MEM,
 612         },
 613 };
 614
 615 static struct platform_device ar71xx_spi_device = {
 616         .name           = "ar71xx-spi",
 617         .id             = -1,
 618         .resource       = ar71xx_spi_resources,
 619         .num_resources  = ARRAY_SIZE(ar71xx_spi_resources),
 620 };
 621
 622 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
 623                                 struct spi_board_info const *info,
 624                                 unsigned n)
 625 {
 626         spi_register_board_info(info, n);
 627         ar71xx_spi_device.dev.platform_data = pdata;
 628         platform_device_register(&ar71xx_spi_device);
 629 }
 630
 631 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
 632                                 struct gpio_led *leds)
 633 {
 634         struct platform_device *pdev;
 635         struct gpio_led_platform_data pdata;
 636         struct gpio_led *p;
 637         int err;
 638
 639         p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
 640         if (!p)
 641                 return;
 642
 643         memcpy(p, leds, num_leds * sizeof(*p));
 644
 645         pdev = platform_device_alloc("leds-gpio", id);
 646         if (!pdev)
 647                 goto err_free_leds;
 648
 649         memset(&pdata, 0, sizeof(pdata));
 650         pdata.num_leds = num_leds;
 651         pdata.leds = p;
 652
 653         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 654         if (err)
 655                 goto err_put_pdev;
 656
 657         err = platform_device_add(pdev);
 658         if (err)
 659                 goto err_put_pdev;
 660
 661         return;
 662
 663 err_put_pdev:
 664         platform_device_put(pdev);
 665
 666 err_free_leds:
 667         kfree(p);
 668 }
 669
 670 void __init ar71xx_add_device_gpio_buttons(int id,
 671                                            unsigned poll_interval,
 672                                            unsigned nbuttons,
 673                                            struct gpio_button *buttons)
 674 {
 675         struct platform_device *pdev;
 676         struct gpio_buttons_platform_data pdata;
 677         struct gpio_button *p;
 678         int err;
 679
 680         p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
 681         if (!p)
 682                 return;
 683
 684         memcpy(p, buttons, nbuttons * sizeof(*p));
 685
 686         pdev = platform_device_alloc("gpio-buttons", id);
 687         if (!pdev)
 688                 goto err_free_buttons;
 689
 690         memset(&pdata, 0, sizeof(pdata));
 691         pdata.poll_interval = poll_interval;
 692         pdata.nbuttons = nbuttons;
 693         pdata.buttons = p;
 694
 695         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 696         if (err)
 697                 goto err_put_pdev;
 698
 699
 700         err = platform_device_add(pdev);
 701         if (err)
 702                 goto err_put_pdev;
 703
 704         return;
 705
 706 err_put_pdev:
 707         platform_device_put(pdev);
 708
 709 err_free_buttons:
 710         kfree(p);
 711 }
 712
 713 void __init ar71xx_add_device_wdt(void)
 714 {
 715         platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
 716 }
 717
 718 void __init ar71xx_set_mac_base(unsigned char *mac)
 719 {
 720         memcpy(ar71xx_mac_base, mac, ETH_ALEN);
 721 }
 722
 723 void __init ar71xx_parse_mac_addr(char *mac_str)
 724 {
 725         u8 tmp[ETH_ALEN];
 726         int t;
 727
 728         t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 729                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 730
 731         if (t != ETH_ALEN)
 732                 t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
 733                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 734
 735         if (t == ETH_ALEN)
 736                 ar71xx_set_mac_base(tmp);
 737         else
 738                 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
 739                                 "\"%s\"\n", mac_str);
 740 }
 741
 742 static struct resource ar91xx_wmac_resources[] = {
 743         {
 744                 .start  = AR91XX_WMAC_BASE,
 745                 .end    = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
 746                 .flags  = IORESOURCE_MEM,
 747         }, {
 748                 .start  = AR71XX_CPU_IRQ_WMAC,
 749                 .end    = AR71XX_CPU_IRQ_WMAC,
 750                 .flags  = IORESOURCE_IRQ,
 751         },
 752 };
 753
 754 static struct ath9k_platform_data ar91xx_wmac_data;
 755
 756 static struct platform_device ar91xx_wmac_device = {
 757         .name           = "ath9k",
 758         .id             = -1,
 759         .resource       = ar91xx_wmac_resources,
 760         .num_resources  = ARRAY_SIZE(ar91xx_wmac_resources),
 761         .dev = {
 762                 .platform_data = &ar91xx_wmac_data,
 763         },
 764 };
 765
 766 void __init ar91xx_add_device_wmac(void)
 767 {
 768         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 769
 770         memcpy(ar91xx_wmac_data.eeprom_data, ee,
 771                sizeof(ar91xx_wmac_data.eeprom_data));
 772
 773         ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
 774         mdelay(10);
 775
 776         ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
 777         mdelay(10);
 778
 779         platform_device_register(&ar91xx_wmac_device);
 780 }
 781
 782 static struct platform_device ar71xx_dsa_switch_device = {
 783         .name           = "dsa",
 784         .id             = 0,
 785 };
 786
 787 void __init ar71xx_add_device_dsa(unsigned int id,
 788                                   struct dsa_platform_data *d)
 789 {
 790         switch (id) {
 791         case 0:
 792                 d->netdev = &ar71xx_eth0_device.dev;
 793                 break;
 794         case 1:
 795                 d->netdev = &ar71xx_eth1_device.dev;
 796                 break;
 797         default:
 798                 printk(KERN_ERR
 799                         "ar71xx: invalid ethernet id %d for DSA switch\n",
 800                         id);
 801                 return;
 802         }
 803         d->mii_bus = &ar71xx_mdio_device.dev;
 804         ar71xx_dsa_switch_device.dev.platform_data = d;
 805
 806         platform_device_register(&ar71xx_dsa_switch_device);
 807 }