target/linux/ar71xx/files/arch/mips/ar71xx/devices.c

   1 /*
   2  *  Atheros AR71xx SoC platform devices
   3  *
   4  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Parts of this file are based on Atheros' 2.6.15 BSP
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/serial_8250.h>
  21 #include <linux/ath9k_platform.h>
  22
  23 #include <asm/mach-ar71xx/ar71xx.h>
  24
  25 #include "devices.h"
  26
  27 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
  28
  29 /*
  30  * OHCI (USB full speed host controller)
  31  */
  32 static struct resource ar71xx_ohci_resources[] = {
  33         [0] = {
  34                 .start  = AR71XX_OHCI_BASE,
  35                 .end    = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
  36                 .flags  = IORESOURCE_MEM,
  37         },
  38         [1] = {
  39                 .start  = AR71XX_MISC_IRQ_OHCI,
  40                 .end    = AR71XX_MISC_IRQ_OHCI,
  41                 .flags  = IORESOURCE_IRQ,
  42         },
  43 };
  44
  45 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
  46 static struct platform_device ar71xx_ohci_device = {
  47         .name           = "ar71xx-ohci",
  48         .id             = -1,
  49         .resource       = ar71xx_ohci_resources,
  50         .num_resources  = ARRAY_SIZE(ar71xx_ohci_resources),
  51         .dev = {
  52                 .dma_mask               = &ar71xx_ohci_dmamask,
  53                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  54         },
  55 };
  56
  57 /*
  58  * EHCI (USB full speed host controller)
  59  */
  60 static struct resource ar71xx_ehci_resources[] = {
  61         [0] = {
  62                 .start  = AR71XX_EHCI_BASE,
  63                 .end    = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
  64                 .flags  = IORESOURCE_MEM,
  65         },
  66         [1] = {
  67                 .start  = AR71XX_CPU_IRQ_USB,
  68                 .end    = AR71XX_CPU_IRQ_USB,
  69                 .flags  = IORESOURCE_IRQ,
  70         },
  71 };
  72
  73
  74 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
  75 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
  76
  77 static struct platform_device ar71xx_ehci_device = {
  78         .name           = "ar71xx-ehci",
  79         .id             = -1,
  80         .resource       = ar71xx_ehci_resources,
  81         .num_resources  = ARRAY_SIZE(ar71xx_ehci_resources),
  82         .dev = {
  83                 .dma_mask               = &ar71xx_ehci_dmamask,
  84                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  85                 .platform_data          = &ar71xx_ehci_data,
  86         },
  87 };
  88
  89 #define AR71XX_USB_RESET_MASK \
  90         (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
  91         | RESET_MODULE_USB_OHCI_DLL)
  92
  93 static void ar71xx_usb_setup(void)
  94 {
  95         ar71xx_device_stop(AR71XX_USB_RESET_MASK);
  96         mdelay(1000);
  97         ar71xx_device_start(AR71XX_USB_RESET_MASK);
  98
  99         /* Turning on the Buff and Desc swap bits */
 100         ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
 101
 102         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
 103         ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
 104
 105         mdelay(900);
 106 }
 107
 108 static void ar91xx_usb_setup(void)
 109 {
 110         ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
 111         mdelay(10);
 112
 113         ar71xx_device_start(RESET_MODULE_USB_HOST);
 114         mdelay(10);
 115
 116         ar71xx_device_start(RESET_MODULE_USB_PHY);
 117         mdelay(10);
 118 }
 119
 120 void __init ar71xx_add_device_usb(void)
 121 {
 122         switch (ar71xx_soc) {
 123         case AR71XX_SOC_AR7130:
 124         case AR71XX_SOC_AR7141:
 125         case AR71XX_SOC_AR7161:
 126                 ar71xx_usb_setup();
 127                 platform_device_register(&ar71xx_ohci_device);
 128                 platform_device_register(&ar71xx_ehci_device);
 129                 break;
 130
 131         case AR71XX_SOC_AR9130:
 132         case AR71XX_SOC_AR9132:
 133                 ar91xx_usb_setup();
 134                 ar71xx_ehci_data.is_ar91xx = 1;
 135                 platform_device_register(&ar71xx_ehci_device);
 136                 break;
 137
 138         default:
 139                 BUG();
 140         }
 141 }
 142
 143 #ifndef CONFIG_AR71XX_EARLY_SERIAL
 144 static struct resource ar71xx_uart_resources[] = {
 145         {
 146                 .start  = AR71XX_UART_BASE,
 147                 .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
 148                 .flags  = IORESOURCE_MEM,
 149         },
 150 };
 151
 152 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
 153 static struct plat_serial8250_port ar71xx_uart_data[] = {
 154         {
 155                 .mapbase        = AR71XX_UART_BASE,
 156                 .irq            = AR71XX_MISC_IRQ_UART,
 157                 .flags          = AR71XX_UART_FLAGS,
 158                 .iotype         = UPIO_MEM32,
 159                 .regshift       = 2,
 160         }, {
 161                 /* terminating entry */
 162         }
 163 };
 164
 165 static struct platform_device ar71xx_uart_device = {
 166         .name           = "serial8250",
 167         .id             = PLAT8250_DEV_PLATFORM,
 168         .resource       = ar71xx_uart_resources,
 169         .num_resources  = ARRAY_SIZE(ar71xx_uart_resources),
 170         .dev = {
 171                 .platform_data  = ar71xx_uart_data
 172         },
 173 };
 174
 175 void __init ar71xx_add_device_uart(void)
 176 {
 177         ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
 178         platform_device_register(&ar71xx_uart_device);
 179 }
 180 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
 181
 182 static struct resource ar71xx_mdio_resources[] = {
 183         {
 184                 .name   = "mdio_base",
 185                 .flags  = IORESOURCE_MEM,
 186                 .start  = AR71XX_GE0_BASE + 0x20,
 187                 .end    = AR71XX_GE0_BASE + 0x38 - 1,
 188         }
 189 };
 190
 191 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
 192         .phy_mask       = 0xffffffff,
 193 };
 194
 195 static struct platform_device ar71xx_mdio_device = {
 196         .name           = "ag71xx-mdio",
 197         .id             = -1,
 198         .resource       = ar71xx_mdio_resources,
 199         .num_resources  = ARRAY_SIZE(ar71xx_mdio_resources),
 200         .dev = {
 201                 .platform_data = &ar71xx_mdio_data,
 202         },
 203 };
 204
 205 void __init ar71xx_add_device_mdio(u32 phy_mask)
 206 {
 207         ar71xx_mdio_data.phy_mask = phy_mask;
 208         platform_device_register(&ar71xx_mdio_device);
 209 }
 210
 211 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
 212 {
 213         void __iomem *base;
 214         u32 t;
 215
 216         base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
 217
 218         t = __raw_readl(base + cfg_reg);
 219         t &= ~(3 << shift);
 220         t |=  (2 << shift);
 221         __raw_writel(t, base + cfg_reg);
 222         udelay(100);
 223
 224         __raw_writel(pll_val, base + pll_reg);
 225
 226         t |= (3 << shift);
 227         __raw_writel(t, base + cfg_reg);
 228         udelay(100);
 229
 230         t &= ~(3 << shift);
 231         __raw_writel(t, base + cfg_reg);
 232         udelay(100);
 233
 234         printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
 235                 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
 236
 237         iounmap(base);
 238 }
 239
 240 struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
 241 struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
 242
 243 static u32 ar71xx_get_eth_pll(unsigned int mac, int speed)
 244 {
 245         struct ar71xx_eth_pll_data *pll_data;
 246         u32 pll_val;
 247
 248         switch (mac) {
 249         case 0:
 250                 pll_data = &ar71xx_eth0_pll_data;
 251                 break;
 252         case 1:
 253                 pll_data = &ar71xx_eth1_pll_data;
 254                 break;
 255         default:
 256                 BUG();
 257         }
 258
 259         switch (speed) {
 260         case SPEED_10:
 261                 pll_val = pll_data->pll_10;
 262                 break;
 263         case SPEED_100:
 264                 pll_val = pll_data->pll_100;
 265                 break;
 266         case SPEED_1000:
 267                 pll_val = pll_data->pll_1000;
 268                 break;
 269         default:
 270                 BUG();
 271         }
 272
 273         return pll_val;
 274 }
 275
 276 static void ar71xx_set_pll_ge0(int speed)
 277 {
 278         u32 val = ar71xx_get_eth_pll(0, speed);
 279
 280         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
 281                         val, AR71XX_ETH0_PLL_SHIFT);
 282 }
 283
 284 static void ar71xx_set_pll_ge1(int speed)
 285 {
 286         u32 val = ar71xx_get_eth_pll(1, speed);
 287
 288         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
 289                          val, AR71XX_ETH1_PLL_SHIFT);
 290 }
 291
 292 static void ar91xx_set_pll_ge0(int speed)
 293 {
 294         u32 val = ar71xx_get_eth_pll(0, speed);
 295
 296         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
 297                          val, AR91XX_ETH0_PLL_SHIFT);
 298 }
 299
 300 static void ar91xx_set_pll_ge1(int speed)
 301 {
 302         u32 val = ar71xx_get_eth_pll(1, speed);
 303
 304         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
 305                          val, AR91XX_ETH1_PLL_SHIFT);
 306 }
 307
 308 static void ar71xx_ddr_flush_ge0(void)
 309 {
 310         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
 311 }
 312
 313 static void ar71xx_ddr_flush_ge1(void)
 314 {
 315         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
 316 }
 317
 318 static void ar91xx_ddr_flush_ge0(void)
 319 {
 320         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
 321 }
 322
 323 static void ar91xx_ddr_flush_ge1(void)
 324 {
 325         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 326 }
 327
 328 static struct resource ar71xx_eth0_resources[] = {
 329         {
 330                 .name   = "mac_base",
 331                 .flags  = IORESOURCE_MEM,
 332                 .start  = AR71XX_GE0_BASE,
 333                 .end    = AR71XX_GE0_BASE + 0x20 - 1,
 334         }, {
 335                 .name   = "mac_base2",
 336                 .flags  = IORESOURCE_MEM,
 337                 .start  = AR71XX_GE0_BASE + 0x38,
 338                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 339         }, {
 340                 .name   = "mii_ctrl",
 341                 .flags  = IORESOURCE_MEM,
 342                 .start  = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
 343                 .end    = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
 344         }, {
 345                 .name   = "mac_irq",
 346                 .flags  = IORESOURCE_IRQ,
 347                 .start  = AR71XX_CPU_IRQ_GE0,
 348                 .end    = AR71XX_CPU_IRQ_GE0,
 349         },
 350 };
 351
 352 struct ag71xx_platform_data ar71xx_eth0_data = {
 353         .reset_bit      = RESET_MODULE_GE0_MAC,
 354 };
 355
 356 static struct platform_device ar71xx_eth0_device = {
 357         .name           = "ag71xx",
 358         .id             = 0,
 359         .resource       = ar71xx_eth0_resources,
 360         .num_resources  = ARRAY_SIZE(ar71xx_eth0_resources),
 361         .dev = {
 362                 .platform_data = &ar71xx_eth0_data,
 363         },
 364 };
 365
 366 static struct resource ar71xx_eth1_resources[] = {
 367         {
 368                 .name   = "mac_base",
 369                 .flags  = IORESOURCE_MEM,
 370                 .start  = AR71XX_GE1_BASE,
 371                 .end    = AR71XX_GE1_BASE + 0x20 - 1,
 372         }, {
 373                 .name   = "mac_base2",
 374                 .flags  = IORESOURCE_MEM,
 375                 .start  = AR71XX_GE1_BASE + 0x38,
 376                 .end    = AR71XX_GE1_BASE + 0x200 - 1,
 377         }, {
 378                 .name   = "mii_ctrl",
 379                 .flags  = IORESOURCE_MEM,
 380                 .start  = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
 381                 .end    = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
 382         }, {
 383                 .name   = "mac_irq",
 384                 .flags  = IORESOURCE_IRQ,
 385                 .start  = AR71XX_CPU_IRQ_GE1,
 386                 .end    = AR71XX_CPU_IRQ_GE1,
 387         },
 388 };
 389
 390 struct ag71xx_platform_data ar71xx_eth1_data = {
 391         .reset_bit      = RESET_MODULE_GE1_MAC,
 392 };
 393
 394 static struct platform_device ar71xx_eth1_device = {
 395         .name           = "ag71xx",
 396         .id             = 1,
 397         .resource       = ar71xx_eth1_resources,
 398         .num_resources  = ARRAY_SIZE(ar71xx_eth1_resources),
 399         .dev = {
 400                 .platform_data = &ar71xx_eth1_data,
 401         },
 402 };
 403
 404 #define AR71XX_PLL_VAL_1000     0x00110000
 405 #define AR71XX_PLL_VAL_100      0x00001099
 406 #define AR71XX_PLL_VAL_10       0x00991099
 407
 408 #define AR91XX_PLL_VAL_1000     0x1a000000
 409 #define AR91XX_PLL_VAL_100      0x13000a44
 410 #define AR91XX_PLL_VAL_10       0x00441099
 411
 412 static void __init ar71xx_init_eth_pll_data(unsigned int id)
 413 {
 414         struct ar71xx_eth_pll_data *pll_data;
 415         u32 pll_10, pll_100, pll_1000;
 416
 417         switch (id) {
 418         case 0:
 419                 pll_data = &ar71xx_eth0_pll_data;
 420                 break;
 421         case 1:
 422                 pll_data = &ar71xx_eth1_pll_data;
 423                 break;
 424         default:
 425                 BUG();
 426         }
 427
 428         switch (ar71xx_soc) {
 429         case AR71XX_SOC_AR7130:
 430         case AR71XX_SOC_AR7141:
 431         case AR71XX_SOC_AR7161:
 432                 pll_10 = AR71XX_PLL_VAL_10;
 433                 pll_100 = AR71XX_PLL_VAL_100;
 434                 pll_1000 = AR71XX_PLL_VAL_1000;
 435                 break;
 436         case AR71XX_SOC_AR9130:
 437         case AR71XX_SOC_AR9132:
 438                 pll_10 = AR91XX_PLL_VAL_10;
 439                 pll_100 = AR91XX_PLL_VAL_100;
 440                 pll_1000 = AR91XX_PLL_VAL_1000;
 441                 break;
 442         default:
 443                 BUG();
 444         }
 445
 446         if (!pll_data->pll_10)
 447                 pll_data->pll_10 = pll_10;
 448
 449         if (!pll_data->pll_100)
 450                 pll_data->pll_100 = pll_100;
 451
 452         if (!pll_data->pll_1000)
 453                 pll_data->pll_1000 = pll_1000;
 454 }
 455
 456 static int ar71xx_eth_instance __initdata;
 457 void __init ar71xx_add_device_eth(unsigned int id)
 458 {
 459         struct platform_device *pdev;
 460         struct ag71xx_platform_data *pdata;
 461
 462         ar71xx_init_eth_pll_data(id);
 463
 464         switch (id) {
 465         case 0:
 466                 switch (ar71xx_eth0_data.phy_if_mode) {
 467                 case PHY_INTERFACE_MODE_MII:
 468                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
 469                         break;
 470                 case PHY_INTERFACE_MODE_GMII:
 471                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
 472                         break;
 473                 case PHY_INTERFACE_MODE_RGMII:
 474                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
 475                         break;
 476                 case PHY_INTERFACE_MODE_RMII:
 477                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
 478                         break;
 479                 default:
 480                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 481                                         "for eth0\n");
 482                         return;
 483                 }
 484                 pdev = &ar71xx_eth0_device;
 485                 break;
 486         case 1:
 487                 switch (ar71xx_eth1_data.phy_if_mode) {
 488                 case PHY_INTERFACE_MODE_RMII:
 489                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
 490                         break;
 491                 case PHY_INTERFACE_MODE_RGMII:
 492                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
 493                         break;
 494                 default:
 495                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 496                                         "for eth1\n");
 497                         return;
 498                 }
 499                 pdev = &ar71xx_eth1_device;
 500                 break;
 501         default:
 502                 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
 503                 return;
 504         }
 505
 506         pdata = pdev->dev.platform_data;
 507
 508         switch (ar71xx_soc) {
 509         case AR71XX_SOC_AR7130:
 510                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 511                                       : ar71xx_ddr_flush_ge0;
 512                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 513                                      : ar71xx_set_pll_ge0;
 514                 break;
 515
 516         case AR71XX_SOC_AR7141:
 517         case AR71XX_SOC_AR7161:
 518                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 519                                       : ar71xx_ddr_flush_ge0;
 520                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 521                                      : ar71xx_set_pll_ge0;
 522                 pdata->has_gbit = 1;
 523                 break;
 524
 525         case AR71XX_SOC_AR9130:
 526                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 527                                       : ar91xx_ddr_flush_ge0;
 528                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 529                                      : ar91xx_set_pll_ge0;
 530                 pdata->is_ar91xx = 1;
 531                 break;
 532
 533         case AR71XX_SOC_AR9132:
 534                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 535                                       : ar91xx_ddr_flush_ge0;
 536                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 537                                       : ar91xx_set_pll_ge0;
 538                 pdata->is_ar91xx = 1;
 539                 pdata->has_gbit = 1;
 540                 break;
 541
 542         default:
 543                 BUG();
 544         }
 545
 546         switch (pdata->phy_if_mode) {
 547         case PHY_INTERFACE_MODE_GMII:
 548         case PHY_INTERFACE_MODE_RGMII:
 549                 if (!pdata->has_gbit) {
 550                         printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
 551                                         id);
 552                         return;
 553                 }
 554                 /* fallthrough */
 555         default:
 556                 break;
 557         }
 558
 559         if (is_valid_ether_addr(ar71xx_mac_base)) {
 560                 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
 561                 pdata->mac_addr[5] += ar71xx_eth_instance;
 562         } else {
 563                 random_ether_addr(pdata->mac_addr);
 564                 printk(KERN_DEBUG
 565                         "ar71xx: using random MAC address for eth%d\n",
 566                         ar71xx_eth_instance);
 567         }
 568
 569         platform_device_register(pdev);
 570         ar71xx_eth_instance++;
 571 }
 572
 573 static struct resource ar71xx_spi_resources[] = {
 574         [0] = {
 575                 .start  = AR71XX_SPI_BASE,
 576                 .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
 577                 .flags  = IORESOURCE_MEM,
 578         },
 579 };
 580
 581 static struct platform_device ar71xx_spi_device = {
 582         .name           = "ar71xx-spi",
 583         .id             = -1,
 584         .resource       = ar71xx_spi_resources,
 585         .num_resources  = ARRAY_SIZE(ar71xx_spi_resources),
 586 };
 587
 588 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
 589                                 struct spi_board_info const *info,
 590                                 unsigned n)
 591 {
 592         spi_register_board_info(info, n);
 593         ar71xx_spi_device.dev.platform_data = pdata;
 594         platform_device_register(&ar71xx_spi_device);
 595 }
 596
 597 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
 598                                 struct gpio_led *leds)
 599 {
 600         struct platform_device *pdev;
 601         struct gpio_led_platform_data pdata;
 602         struct gpio_led *p;
 603         int err;
 604
 605         p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
 606         if (!p)
 607                 return;
 608
 609         memcpy(p, leds, num_leds * sizeof(*p));
 610
 611         pdev = platform_device_alloc("leds-gpio", id);
 612         if (!pdev)
 613                 goto err_free_leds;
 614
 615         memset(&pdata, 0, sizeof(pdata));
 616         pdata.num_leds = num_leds;
 617         pdata.leds = p;
 618
 619         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 620         if (err)
 621                 goto err_put_pdev;
 622
 623         err = platform_device_add(pdev);
 624         if (err)
 625                 goto err_put_pdev;
 626
 627         return;
 628
 629 err_put_pdev:
 630         platform_device_put(pdev);
 631
 632 err_free_leds:
 633         kfree(p);
 634 }
 635
 636 void __init ar71xx_add_device_gpio_buttons(int id,
 637                                            unsigned poll_interval,
 638                                            unsigned nbuttons,
 639                                            struct gpio_button *buttons)
 640 {
 641         struct platform_device *pdev;
 642         struct gpio_buttons_platform_data pdata;
 643         struct gpio_button *p;
 644         int err;
 645
 646         p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
 647         if (!p)
 648                 return;
 649
 650         memcpy(p, buttons, nbuttons * sizeof(*p));
 651
 652         pdev = platform_device_alloc("gpio-buttons", id);
 653         if (!pdev)
 654                 goto err_free_buttons;
 655
 656         memset(&pdata, 0, sizeof(pdata));
 657         pdata.poll_interval = poll_interval;
 658         pdata.nbuttons = nbuttons;
 659         pdata.buttons = p;
 660
 661         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 662         if (err)
 663                 goto err_put_pdev;
 664
 665
 666         err = platform_device_add(pdev);
 667         if (err)
 668                 goto err_put_pdev;
 669
 670         return;
 671
 672 err_put_pdev:
 673         platform_device_put(pdev);
 674
 675 err_free_buttons:
 676         kfree(p);
 677 }
 678
 679 void __init ar71xx_add_device_wdt(void)
 680 {
 681         platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
 682 }
 683
 684 void __init ar71xx_set_mac_base(unsigned char *mac)
 685 {
 686         memcpy(ar71xx_mac_base, mac, ETH_ALEN);
 687 }
 688
 689 void __init ar71xx_parse_mac_addr(char *mac_str)
 690 {
 691         u8 tmp[ETH_ALEN];
 692         int t;
 693
 694         t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 695                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 696
 697         if (t != ETH_ALEN)
 698                 t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
 699                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 700
 701         if (t == ETH_ALEN)
 702                 ar71xx_set_mac_base(tmp);
 703         else
 704                 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
 705                                 "\"%s\"\n", mac_str);
 706 }
 707
 708 static struct resource ar91xx_wmac_resources[] = {
 709         {
 710                 .start  = AR91XX_WMAC_BASE,
 711                 .end    = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
 712                 .flags  = IORESOURCE_MEM,
 713         }, {
 714                 .start  = AR71XX_CPU_IRQ_WMAC,
 715                 .end    = AR71XX_CPU_IRQ_WMAC,
 716                 .flags  = IORESOURCE_IRQ,
 717         },
 718 };
 719
 720 static struct ath9k_platform_data ar91xx_wmac_data;
 721
 722 static struct platform_device ar91xx_wmac_device = {
 723         .name           = "ath9k",
 724         .id             = -1,
 725         .resource       = ar91xx_wmac_resources,
 726         .num_resources  = ARRAY_SIZE(ar91xx_wmac_resources),
 727         .dev = {
 728                 .platform_data = &ar91xx_wmac_data,
 729         },
 730 };
 731
 732 void __init ar91xx_add_device_wmac(void)
 733 {
 734         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 735
 736         memcpy(ar91xx_wmac_data.eeprom_data, ee,
 737                sizeof(ar91xx_wmac_data.eeprom_data));
 738
 739         ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
 740         mdelay(10);
 741
 742         ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
 743         mdelay(10);
 744
 745         platform_device_register(&ar91xx_wmac_device);
 746 }
 747
 748 static struct platform_device ar71xx_dsa_switch_device = {
 749         .name           = "dsa",
 750         .id             = 0,
 751 };
 752
 753 void __init ar71xx_add_device_dsa(unsigned int id,
 754                                   struct dsa_platform_data *d)
 755 {
 756         switch (id) {
 757         case 0:
 758                 d->netdev = &ar71xx_eth0_device.dev;
 759                 break;
 760         case 1:
 761                 d->netdev = &ar71xx_eth1_device.dev;
 762                 break;
 763         default:
 764                 printk(KERN_ERR
 765                         "ar71xx: invalid ethernet id %d for DSA switch\n",
 766                         id);
 767                 return;
 768         }
 769         d->mii_bus = &ar71xx_mdio_device.dev;
 770         ar71xx_dsa_switch_device.dev.platform_data = d;
 771
 772         platform_device_register(&ar71xx_dsa_switch_device);
 773 }