4 * Copyright (C) 2006, 2007 OpenWrt.org
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/types.h>
22 #include <linux/pci.h>
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <asm/ar7/vlynq.h>
27 #define VLYNQ_PCI_SLOTS 2
29 struct vlynq_reg_config {
34 struct vlynq_pci_config {
37 struct vlynq_mapping rx_mapping[4];
43 struct vlynq_reg_config regs[10];
46 struct vlynq_pci_private {
51 struct vlynq_pci_config *config;
54 static struct vlynq_pci_config known_devices[] = {
56 .chip_id = 0x00000009, .name = "TI ACX111",
58 { .size = 0x22000, .offset = 0xf0000000 },
59 { .size = 0x40000, .offset = 0xc0000000 },
60 { .size = 0x0, .offset = 0x0 },
61 { .size = 0x0, .offset = 0x0 },
63 .irq = 0, .chip = 0x9066104c,
64 .class = PCI_CLASS_NETWORK_OTHER,
67 { .offset = 0x790, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
68 { .offset = 0x794, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) },
69 { .offset = 0x740, .value = 0 },
70 { .offset = 0x744, .value = 0x00010000 },
71 { .offset = 0x764, .value = 0x00010000 },
76 static struct vlynq_device *slots[VLYNQ_PCI_SLOTS] = { NULL, };
78 static struct resource vlynq_io_resource = {
81 .name = "pci IO space",
82 .flags = IORESOURCE_IO
85 static struct resource vlynq_mem_resource = {
88 .name = "pci memory space",
89 .flags = IORESOURCE_MEM
92 static inline u32 vlynq_get_mapped(struct vlynq_device *dev, int res)
95 struct vlynq_pci_private *priv = dev->priv;
96 u32 ret = dev->mem_start;
97 if (!priv->config->rx_mapping[res].size) return 0;
98 for (i = 0; i < res; i++)
99 ret += priv->config->rx_mapping[i].size;
104 static inline u32 vlynq_read(u32 val, int size) {
114 static int vlynq_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
116 struct vlynq_device *dev;
117 struct vlynq_pci_private *priv;
118 int resno, slot = PCI_SLOT(devfn);
120 if ((size == 2) && (where & 1))
121 return PCIBIOS_BAD_REGISTER_NUMBER;
122 else if ((size == 4) && (where & 3))
123 return PCIBIOS_BAD_REGISTER_NUMBER;
125 if (slot >= VLYNQ_PCI_SLOTS)
126 return PCIBIOS_DEVICE_NOT_FOUND;
130 if (!dev || (PCI_FUNC(devfn) > 0))
131 return PCIBIOS_DEVICE_NOT_FOUND;
137 *val = vlynq_read(priv->config->chip, size);
140 *val = priv->config->chip & 0xffff;
142 *val = priv->command;
144 /* *val = PCI_STATUS_CAP_LIST;*/
147 case PCI_CLASS_REVISION:
148 *val = priv->config->class;
150 case PCI_LATENCY_TIMER:
151 *val = priv->latency;
153 case PCI_HEADER_TYPE:
154 *val = PCI_HEADER_TYPE_NORMAL;
156 case PCI_CACHE_LINE_SIZE:
157 *val = priv->cache_line;
159 case PCI_BASE_ADDRESS_0:
160 case PCI_BASE_ADDRESS_1:
161 case PCI_BASE_ADDRESS_2:
162 case PCI_BASE_ADDRESS_3:
163 resno = (where - PCI_BASE_ADDRESS_0) >> 2;
164 if (priv->sz_mask & (1 << resno)) {
165 priv->sz_mask &= ~(1 << resno);
166 *val = priv->config->rx_mapping[resno].size;
168 *val = vlynq_get_mapped(dev, resno);
171 case PCI_BASE_ADDRESS_4:
172 case PCI_BASE_ADDRESS_5:
173 case PCI_SUBSYSTEM_VENDOR_ID:
174 case PCI_SUBSYSTEM_ID:
175 case PCI_ROM_ADDRESS:
176 case PCI_INTERRUPT_LINE:
177 case PCI_CARDBUS_CIS:
178 case PCI_CAPABILITY_LIST:
179 case PCI_INTERRUPT_PIN:
183 printk("%s: Read of unknown register 0x%x (size %d)\n",
184 dev->dev.bus_id, where, size);
185 return PCIBIOS_BAD_REGISTER_NUMBER;
187 return PCIBIOS_SUCCESSFUL;
190 static int vlynq_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
192 struct vlynq_device *dev;
193 struct vlynq_pci_private *priv;
194 int resno, slot = PCI_SLOT(devfn);
196 if ((size == 2) && (where & 1))
197 return PCIBIOS_BAD_REGISTER_NUMBER;
198 else if ((size == 4) && (where & 3))
199 return PCIBIOS_BAD_REGISTER_NUMBER;
201 if (slot >= VLYNQ_PCI_SLOTS)
202 return PCIBIOS_DEVICE_NOT_FOUND;
206 if (!dev || (PCI_FUNC(devfn) > 0))
207 return PCIBIOS_DEVICE_NOT_FOUND;
215 case PCI_CLASS_REVISION:
216 case PCI_HEADER_TYPE:
217 case PCI_CACHE_LINE_SIZE:
218 case PCI_SUBSYSTEM_VENDOR_ID:
219 case PCI_SUBSYSTEM_ID:
220 case PCI_INTERRUPT_LINE:
221 case PCI_INTERRUPT_PIN:
222 case PCI_CARDBUS_CIS:
223 case PCI_CAPABILITY_LIST:
224 return PCIBIOS_FUNC_NOT_SUPPORTED;
227 case PCI_LATENCY_TIMER:
230 case PCI_BASE_ADDRESS_0:
231 case PCI_BASE_ADDRESS_1:
232 case PCI_BASE_ADDRESS_2:
233 case PCI_BASE_ADDRESS_3:
234 if (val == 0xffffffff) {
235 resno = (where - PCI_BASE_ADDRESS_0) >> 2;
236 priv->sz_mask |= (1 << resno);
239 case PCI_BASE_ADDRESS_4:
240 case PCI_BASE_ADDRESS_5:
241 case PCI_ROM_ADDRESS:
244 printk("%s: Write to unknown register 0x%x (size %d) value=0x%x\n",
245 dev->dev.bus_id, where, size, val);
246 return PCIBIOS_BAD_REGISTER_NUMBER;
248 return PCIBIOS_SUCCESSFUL;
251 static struct pci_ops vlynq_pci_ops = {
256 static struct pci_controller vlynq_controller = {
257 .pci_ops = &vlynq_pci_ops,
258 .io_resource = &vlynq_io_resource,
259 .mem_resource = &vlynq_mem_resource,
262 static int vlynq_pci_probe(struct vlynq_device *dev)
266 struct vlynq_pci_private *priv;
267 struct vlynq_mapping mapping[4] = { { 0, }, };
268 struct vlynq_pci_config *config = NULL;
270 result = vlynq_set_local_irq(dev, 31);
274 result = vlynq_set_remote_irq(dev, 30);
278 result = vlynq_device_enable(dev);
282 chip_id = vlynq_remote_id(dev);
283 for (i = 0; i < ARRAY_SIZE(known_devices); i++)
284 if (chip_id == known_devices[i].chip_id)
285 config = &known_devices[i];
288 printk("vlynq-pci: skipping unknown device "
289 "%04x:%04x at %s\n", chip_id >> 16,
290 chip_id & 0xffff, dev->dev.bus_id);
295 printk("vlynq-pci: attaching device %s at %s\n",
296 config->name, dev->dev.bus_id);
298 priv = kmalloc(sizeof(struct vlynq_pci_private), GFP_KERNEL);
300 printk(KERN_ERR "%s: failed to allocate private data\n",
306 memset(priv, 0, sizeof(struct vlynq_pci_private));
308 priv->cache_line = 32;
309 priv->config = config;
311 mapping[0].offset = ARCH_PFN_OFFSET << PAGE_SHIFT;
312 mapping[0].size = 0x02000000;
313 vlynq_set_local_mapping(dev, dev->mem_start, mapping);
314 vlynq_set_remote_mapping(dev, 0, config->rx_mapping);
316 addr = (u32)ioremap_nocache(dev->mem_start, 0x10000);
318 printk(KERN_ERR "%s: failed to remap io memory\n",
324 for (i = 0; i < config->num_regs; i++)
325 *(volatile u32 *)(addr + config->regs[i].offset) =
326 config->regs[i].value;
329 for (i = 0; i < VLYNQ_PCI_SLOTS; i++) {
339 vlynq_device_disable(dev);
344 static int vlynq_pci_remove(struct vlynq_device *dev)
347 struct vlynq_pci_private *priv = dev->priv;
349 for (i = 0; i < VLYNQ_PCI_SLOTS; i++)
353 vlynq_device_disable(dev);
359 static struct vlynq_driver vlynq_pci = {
360 .name = "PCI over VLYNQ emulation",
361 .probe = vlynq_pci_probe,
362 .remove = vlynq_pci_remove,
365 int vlynq_pci_init(void)
368 res = vlynq_register_driver(&vlynq_pci);
372 register_pci_controller(&vlynq_controller);
377 int pcibios_map_irq(struct pci_dev *pdev, u8 slot, u8 pin)
379 struct vlynq_device *dev;
380 struct vlynq_pci_private *priv;
389 return vlynq_virq_to_irq(dev, priv->config->irq);
392 /* Do platform specific device initialization at pci_enable_device() time */
393 int pcibios_plat_dev_init(struct pci_dev *dev)