target/linux/ar7/patches-2.6.32/972-cpmac_multi_probe.patch

   1 --- a/arch/mips/ar7/platform.c
   2 +++ b/arch/mips/ar7/platform.c
   3 @@ -46,7 +46,6 @@ struct plat_vlynq_data {
   4         int reset_bit;
   5  };
   6
   7 -
   8  static int vlynq_on(struct vlynq_device *dev)
   9  {
  10         int result;
  11 @@ -72,7 +71,8 @@ static int vlynq_on(struct vlynq_device
  12
  13         msleep(50);
  14
  15 -       gpio_set_value(pdata->gpio_bit, 1);
  16 +       gpio_set_value(pdata->gpio_bit,
  17 +                       __vlynq_rev_reg(dev->local) < 0x00010205);
  18         msleep(50);
  19
  20         return 0;
  21 @@ -601,6 +601,18 @@ static inline unsigned char char2hex(cha
  22         }
  23  }
  24
  25 +static void auto_mdix_on(void)
  26 +{
  27 +       ar7_gpio_enable(28);
  28 +       ar7_gpio_disable(30);
  29 +}
  30 +
  31 +/*static void auto_mdix_off(void)
  32 +{
  33 +       ar7_gpio_disable(28);
  34 +       ar7_gpio_disable(30);
  35 +}*/
  36 +
  37  static void cpmac_get_mac(int instance, unsigned char *dev_addr)
  38  {
  39         int i;
  40 @@ -662,6 +674,7 @@ static int __init ar7_register_devices(v
  41         u16 chip_id;
  42         int res;
  43         u32 *bootcr, val;
  44 +       void __iomem *mii_reg;
  45  #ifdef CONFIG_SERIAL_8250
  46         static struct uart_port uart_port[2];
  47
  48 @@ -715,27 +728,6 @@ static int __init ar7_register_devices(v
  49                         return res;
  50         }
  51
  52 -       if (ar7_has_high_cpmac()) {
  53 -               res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_high_titan.id : cpmac_high.id,
  54 -                                               &fixed_phy_status);
  55 -               if (res && res != -ENODEV)
  56 -                       return res;
  57 -
  58 -               cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr :
  59 -                                               cpmac_high_data.dev_addr);
  60 -               res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan :
  61 -                                               &cpmac_high);
  62 -
  63 -               if (res)
  64 -                       return res;
  65 -       } else {
  66 -               if (ar7_is_titan())
  67 -                       cpmac_low_data_titan.phy_mask = 0xffffffff;
  68 -               else
  69 -                       cpmac_low_data.phy_mask = 0xffffffff;
  70 -
  71 -       }
  72 -
  73         res = fixed_phy_add(PHY_POLL, ar7_is_titan() ? cpmac_low_titan.id :
  74                         cpmac_low.id, &fixed_phy_status);
  75         if (res && res != -ENODEV)
  76 @@ -748,6 +740,34 @@ static int __init ar7_register_devices(v
  77         if (res)
  78                 return res;
  79
  80 +       if (ar7_has_high_cpmac()) {
  81 +               res = fixed_phy_add(PHY_POLL, ar7_is_titan() ?
  82 +                               cpmac_high_titan.id : cpmac_high.id,
  83 +                               &fixed_phy_status);
  84 +               if (res && res != -ENODEV)
  85 +                       return res;
  86 +
  87 +               cpmac_get_mac(1, ar7_is_titan() ?
  88 +                               cpmac_high_data_titan.dev_addr :
  89 +                               cpmac_high_data.dev_addr);
  90 +               res = platform_device_register(ar7_is_titan() ?
  91 +                               &cpmac_high_titan : &cpmac_high);
  92 +
  93 +               if (res)
  94 +                       return res;
  95 +       } else {
  96 +               mii_reg = ioremap(AR7_REGS_MII, 4);
  97 +               if (mii_reg) {
  98 +                       writel(readl(mii_reg) | 1, mii_reg);
  99 +                       iounmap(mii_reg);
 100 +               }
 101 +
 102 +               ar7_gpio_disable(17);
 103 +               mdelay(20);
 104 +               ar7_gpio_enable(17);
 105 +               auto_mdix_on();
 106 +       }
 107 +
 108         detect_leds();
 109         res = platform_device_register(&ar7_gpio_leds);
 110         if (res)
 111 @@ -771,8 +791,10 @@ static int __init ar7_register_devices(v
 112         ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
 113
 114         bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4);
 115 -       val = *bootcr;
 116 -       iounmap(bootcr);
 117 +       if (bootcr) {
 118 +               val = *bootcr;
 119 +               iounmap(bootcr);
 120 +       }
 121
 122         /* Register watchdog only if enabled in hardware */
 123         if (val & AR7_WDT_HW_ENA)
 124 --- a/arch/mips/include/asm/mach-ar7/ar7.h
 125 +++ b/arch/mips/include/asm/mach-ar7/ar7.h
 126 @@ -41,6 +41,7 @@
 127  #define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600)
 128  #define AR7_REGS_VLYNQ0        (AR7_REGS_BASE + 0x1800)
 129  #define AR7_REGS_DCL   (AR7_REGS_BASE + 0x1a00)
 130 +#define AR7_REGS_MII   (AR7_REGS_BASE + 0x1a08)
 131  #define AR7_REGS_VLYNQ1        (AR7_REGS_BASE + 0x1c00)
 132  #define AR7_REGS_MDIO  (AR7_REGS_BASE + 0x1e00)
 133  #define AR7_REGS_IRQ   (AR7_REGS_BASE + 0x2400)
 134 --- a/drivers/net/cpmac.c
 135 +++ b/drivers/net/cpmac.c
 136 @@ -668,9 +668,8 @@ static void cpmac_hw_start(struct net_de
 137         for (i = 0; i < 8; i++)
 138                 cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
 139         cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
 140 -       cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
 141 -                   (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
 142 -                   (dev->dev_addr[3] << 24));
 143 +       cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
 144 +                       dev->dev_addr));
 145         cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
 146         cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
 147         cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
 148 @@ -1104,8 +1103,6 @@ static const struct net_device_ops cpmac
 149         .ndo_set_mac_address    = eth_mac_addr,
 150  };
 151
 152 -static int external_switch;
 153 -
 154  static int __devinit cpmac_probe(struct platform_device *pdev)
 155  {
 156         int rc, phy_id;
 157 @@ -1117,24 +1114,26 @@ static int __devinit cpmac_probe(struct
 158
 159         pdata = pdev->dev.platform_data;
 160
 161 -       if (external_switch || dumb_switch) {
 162 -               strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
 163 -               phy_id = pdev->id;
 164 -       } else {
 165 -               for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
 166 -                       if (!(pdata->phy_mask & (1 << phy_id)))
 167 -                               continue;
 168 -                       if (!cpmac_mii->phy_map[phy_id])
 169 -                               continue;
 170 -                       strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
 171 -                       break;
 172 -               }
 173 +       if (dumb_switch)
 174 +               phy_id = PHY_MAX_ADDR;
 175 +       else for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
 176 +               if (!((pdata->phy_mask | cpmac_mii->phy_mask) &
 177 +                               (1 << phy_id)))
 178 +                       continue;
 179 +               if (cpmac_mii->phy_map[phy_id])
 180 +                       continue;
 181 +               strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
 182 +               break;
 183         }
 184
 185         if (phy_id == PHY_MAX_ADDR) {
 186                 dev_err(&pdev->dev, "no PHY present, falling back to switch mode\n");
 187                 strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
 188                 phy_id = pdev->id;
 189 +       } else {
 190 +               /* Now disable EPHY and enable MII */
 191 +               dev_info(&pdev->dev, "trying external MII\n");
 192 +               ar7_device_disable(AR7_RESET_BIT_EPHY);
 193         }
 194
 195         dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
 196 @@ -1168,7 +1167,7 @@ static int __devinit cpmac_probe(struct
 197         priv->dev = dev;
 198         priv->ring_size = 64;
 199         priv->msg_enable = netif_msg_init(debug_level, 0xff);
 200 -       memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
 201 +       memcpy(dev->dev_addr, pdata->dev_addr, sizeof(pdata->dev_addr));
 202
 203         snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
 204
 205 @@ -1244,14 +1243,14 @@ int __devinit cpmac_init(void)
 206         ar7_gpio_disable(26);
 207         ar7_gpio_disable(27);
 208
 209 -       if (!ar7_is_titan()) {
 210 +       if (ar7_is_titan()) {
 211 +               ar7_device_reset(AR7_RESET_BIT_EPHY);
 212 +               ar7_device_reset(TITAN_RESET_BIT_EPHY1);
 213 +       } else {
 214                 ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
 215                 ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
 216 -       }
 217 -       ar7_device_reset(AR7_RESET_BIT_EPHY);
 218
 219 -       if (ar7_is_titan()) {
 220 -               ar7_device_reset(TITAN_RESET_BIT_EPHY1);
 221 +               ar7_device_reset(AR7_RESET_BIT_EPHY);
 222         }
 223
 224         cpmac_mii->reset(cpmac_mii);
 225 @@ -1262,14 +1261,7 @@ int __devinit cpmac_init(void)
 226                 else
 227                         msleep(10);
 228
 229 -       mask &= 0x7fffffff;
 230 -       if (mask & (mask - 1)) {
 231 -               external_switch = 1;
 232 -               mask = 0;
 233 -       }
 234 -
 235 -       cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000):
 236 -               ~(mask | 0x80000000);
 237 +       cpmac_mii->phy_mask = ~mask;
 238         snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1");
 239
 240         res = mdiobus_register(cpmac_mii);