target/linux/ar7/files/drivers/net/cpmac.c

   1 /*
   2  * Copyright (C) 2006, 2007 OpenWrt.org
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/init.h>
  21 #include <linux/moduleparam.h>
  22
  23 #include <linux/sched.h>
  24 #include <linux/kernel.h>
  25 #include <linux/slab.h>
  26 #include <linux/errno.h>
  27 #include <linux/types.h>
  28 #include <linux/delay.h>
  29 #include <linux/version.h>
  30
  31 #include <linux/netdevice.h>
  32 #include <linux/etherdevice.h>
  33 #include <linux/ethtool.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/mii.h>
  36 #include <linux/phy.h>
  37 #include <linux/platform_device.h>
  38 #include <linux/dma-mapping.h>
  39 #include <asm/gpio.h>
  40
  41 MODULE_AUTHOR("Eugene Konev <ejka@imfi.kspu.ru>");
  42 MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
  43 MODULE_LICENSE("GPL");
  44
  45 static int debug_level = 8;
  46 static int dumb_switch;
  47
  48 /* Next 2 are only used in cpmac_probe, so it's pointless to change them */
  49 module_param(debug_level, int, 0444);
  50 module_param(dumb_switch, int, 0444);
  51
  52 MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable");
  53 MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus");
  54
  55 #define CPMAC_VERSION "0.5.0"
  56 /* stolen from net/ieee80211.h */
  57 #ifndef MAC_FMT
  58 #define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
  59 #define MAC_ARG(x) ((u8*)(x))[0], ((u8*)(x))[1], ((u8*)(x))[2], \
  60                    ((u8*)(x))[3], ((u8*)(x))[4], ((u8*)(x))[5]
  61 #endif
  62 /* frame size + 802.1q tag */
  63 #define CPMAC_SKB_SIZE          (ETH_FRAME_LEN + 4)
  64 #define CPMAC_QUEUES    8
  65
  66 /* Ethernet registers */
  67 #define CPMAC_TX_CONTROL                0x0004
  68 #define CPMAC_TX_TEARDOWN               0x0008
  69 #define CPMAC_RX_CONTROL                0x0014
  70 #define CPMAC_RX_TEARDOWN               0x0018
  71 #define CPMAC_MBP                       0x0100
  72 # define MBP_RXPASSCRC                  0x40000000
  73 # define MBP_RXQOS                      0x20000000
  74 # define MBP_RXNOCHAIN                  0x10000000
  75 # define MBP_RXCMF                      0x01000000
  76 # define MBP_RXSHORT                    0x00800000
  77 # define MBP_RXCEF                      0x00400000
  78 # define MBP_RXPROMISC                  0x00200000
  79 # define MBP_PROMISCCHAN(channel)       (((channel) & 0x7) << 16)
  80 # define MBP_RXBCAST                    0x00002000
  81 # define MBP_BCASTCHAN(channel)         (((channel) & 0x7) << 8)
  82 # define MBP_RXMCAST                    0x00000020
  83 # define MBP_MCASTCHAN(channel)         ((channel) & 0x7)
  84 #define CPMAC_UNICAST_ENABLE            0x0104
  85 #define CPMAC_UNICAST_CLEAR             0x0108
  86 #define CPMAC_MAX_LENGTH                0x010c
  87 #define CPMAC_BUFFER_OFFSET             0x0110
  88 #define CPMAC_MAC_CONTROL               0x0160
  89 # define MAC_TXPTYPE                    0x00000200
  90 # define MAC_TXPACE                     0x00000040
  91 # define MAC_MII                        0x00000020
  92 # define MAC_TXFLOW                     0x00000010
  93 # define MAC_RXFLOW                     0x00000008
  94 # define MAC_MTEST                      0x00000004
  95 # define MAC_LOOPBACK                   0x00000002
  96 # define MAC_FDX                        0x00000001
  97 #define CPMAC_MAC_STATUS                0x0164
  98 # define MAC_STATUS_QOS                 0x00000004
  99 # define MAC_STATUS_RXFLOW              0x00000002
 100 # define MAC_STATUS_TXFLOW              0x00000001
 101 #define CPMAC_TX_INT_ENABLE             0x0178
 102 #define CPMAC_TX_INT_CLEAR              0x017c
 103 #define CPMAC_MAC_INT_VECTOR            0x0180
 104 # define MAC_INT_STATUS                 0x00080000
 105 # define MAC_INT_HOST                   0x00040000
 106 # define MAC_INT_RX                     0x00020000
 107 # define MAC_INT_TX                     0x00010000
 108 #define CPMAC_MAC_EOI_VECTOR            0x0184
 109 #define CPMAC_RX_INT_ENABLE             0x0198
 110 #define CPMAC_RX_INT_CLEAR              0x019c
 111 #define CPMAC_MAC_INT_ENABLE            0x01a8
 112 #define CPMAC_MAC_INT_CLEAR             0x01ac
 113 #define CPMAC_MAC_ADDR_LO(channel)      (0x01b0 + (channel) * 4)
 114 #define CPMAC_MAC_ADDR_MID              0x01d0
 115 #define CPMAC_MAC_ADDR_HI               0x01d4
 116 #define CPMAC_MAC_HASH_LO               0x01d8
 117 #define CPMAC_MAC_HASH_HI               0x01dc
 118 #define CPMAC_TX_PTR(channel)           (0x0600 + (channel) * 4)
 119 #define CPMAC_RX_PTR(channel)           (0x0620 + (channel) * 4)
 120 #define CPMAC_TX_ACK(channel)           (0x0640 + (channel) * 4)
 121 #define CPMAC_RX_ACK(channel)           (0x0660 + (channel) * 4)
 122 #define CPMAC_REG_END                   0x0680
 123 /*
 124  * Rx/Tx statistics
 125  * TODO: use some of them to fill stats in cpmac_stats()
 126  */
 127 #define CPMAC_STATS_RX_GOOD             0x0200
 128 #define CPMAC_STATS_RX_BCAST            0x0204
 129 #define CPMAC_STATS_RX_MCAST            0x0208
 130 #define CPMAC_STATS_RX_PAUSE            0x020c
 131 #define CPMAC_STATS_RX_CRC              0x0210
 132 #define CPMAC_STATS_RX_ALIGN            0x0214
 133 #define CPMAC_STATS_RX_OVER             0x0218
 134 #define CPMAC_STATS_RX_JABBER           0x021c
 135 #define CPMAC_STATS_RX_UNDER            0x0220
 136 #define CPMAC_STATS_RX_FRAG             0x0224
 137 #define CPMAC_STATS_RX_FILTER           0x0228
 138 #define CPMAC_STATS_RX_QOSFILTER        0x022c
 139 #define CPMAC_STATS_RX_OCTETS           0x0230
 140
 141 #define CPMAC_STATS_TX_GOOD             0x0234
 142 #define CPMAC_STATS_TX_BCAST            0x0238
 143 #define CPMAC_STATS_TX_MCAST            0x023c
 144 #define CPMAC_STATS_TX_PAUSE            0x0240
 145 #define CPMAC_STATS_TX_DEFER            0x0244
 146 #define CPMAC_STATS_TX_COLLISION        0x0248
 147 #define CPMAC_STATS_TX_SINGLECOLL       0x024c
 148 #define CPMAC_STATS_TX_MULTICOLL        0x0250
 149 #define CPMAC_STATS_TX_EXCESSCOLL       0x0254
 150 #define CPMAC_STATS_TX_LATECOLL         0x0258
 151 #define CPMAC_STATS_TX_UNDERRUN         0x025c
 152 #define CPMAC_STATS_TX_CARRIERSENSE     0x0260
 153 #define CPMAC_STATS_TX_OCTETS           0x0264
 154
 155 #define cpmac_read(base, reg)           (readl((void __iomem *)(base) + (reg)))
 156 #define cpmac_write(base, reg, val)     (writel(val, (void __iomem *)(base) + \
 157                                                 (reg)))
 158
 159 /* MDIO bus */
 160 #define CPMAC_MDIO_VERSION              0x0000
 161 #define CPMAC_MDIO_CONTROL              0x0004
 162 # define MDIOC_IDLE                     0x80000000
 163 # define MDIOC_ENABLE                   0x40000000
 164 # define MDIOC_PREAMBLE                 0x00100000
 165 # define MDIOC_FAULT                    0x00080000
 166 # define MDIOC_FAULTDETECT              0x00040000
 167 # define MDIOC_INTTEST                  0x00020000
 168 # define MDIOC_CLKDIV(div)              ((div) & 0xff)
 169 #define CPMAC_MDIO_ALIVE                0x0008
 170 #define CPMAC_MDIO_LINK                 0x000c
 171 #define CPMAC_MDIO_ACCESS(channel)      (0x0080 + (channel) * 8)
 172 # define MDIO_BUSY                      0x80000000
 173 # define MDIO_WRITE                     0x40000000
 174 # define MDIO_REG(reg)                  (((reg) & 0x1f) << 21)
 175 # define MDIO_PHY(phy)                  (((phy) & 0x1f) << 16)
 176 # define MDIO_DATA(data)                ((data) & 0xffff)
 177 #define CPMAC_MDIO_PHYSEL(channel)      (0x0084 + (channel) * 8)
 178 # define PHYSEL_LINKSEL                 0x00000040
 179 # define PHYSEL_LINKINT                 0x00000020
 180
 181 struct cpmac_desc {
 182         u32 hw_next;
 183         u32 hw_data;
 184         u16 buflen;
 185         u16 bufflags;
 186         u16 datalen;
 187         u16 dataflags;
 188 #define CPMAC_SOP                       0x8000
 189 #define CPMAC_EOP                       0x4000
 190 #define CPMAC_OWN                       0x2000
 191 #define CPMAC_EOQ                       0x1000
 192         struct sk_buff *skb;
 193         struct cpmac_desc *next;
 194         dma_addr_t mapping;
 195         dma_addr_t data_mapping;
 196 };
 197
 198 struct cpmac_priv {
 199         spinlock_t lock;
 200         spinlock_t rx_lock;
 201         struct cpmac_desc *rx_head;
 202         int ring_size;
 203         struct cpmac_desc *desc_ring;
 204         dma_addr_t dma_ring;
 205         void __iomem *regs;
 206         struct mii_bus *mii_bus;
 207         struct phy_device *phy;
 208         char phy_name[BUS_ID_SIZE];
 209         int oldlink, oldspeed, oldduplex;
 210         u32 msg_enable;
 211         struct net_device *dev;
 212         struct work_struct reset_work;
 213         struct platform_device *pdev;
 214 };
 215
 216 static irqreturn_t cpmac_irq(int, void *);
 217 static void cpmac_hw_start(struct net_device *dev);
 218 static void cpmac_hw_stop(struct net_device *dev);
 219 static int cpmac_stop(struct net_device *dev);
 220 static int cpmac_open(struct net_device *dev);
 221
 222 static void cpmac_dump_regs(struct net_device *dev)
 223 {
 224         int i;
 225         struct cpmac_priv *priv = netdev_priv(dev);
 226         for (i = 0; i < CPMAC_REG_END; i += 4) {
 227                 if (i % 16 == 0) {
 228                         if (i)
 229                                 printk("\n");
 230                         printk(KERN_DEBUG "%s: reg[%p]:", dev->name,
 231                                priv->regs + i);
 232                 }
 233                 printk(" %08x", cpmac_read(priv->regs, i));
 234         }
 235         printk("\n");
 236 }
 237
 238 static void cpmac_dump_desc(struct net_device *dev, struct cpmac_desc *desc)
 239 {
 240         int i;
 241         printk(KERN_DEBUG "%s: desc[%p]:", dev->name, desc);
 242         for (i = 0; i < sizeof(*desc) / 4; i++)
 243                 printk(" %08x", ((u32 *)desc)[i]);
 244         printk("\n");
 245 }
 246
 247 static void cpmac_dump_skb(struct net_device *dev, struct sk_buff *skb)
 248 {
 249         int i;
 250         printk(KERN_DEBUG "%s: skb 0x%p, len=%d\n", dev->name, skb, skb->len);
 251         for (i = 0; i < skb->len; i++) {
 252                 if (i % 16 == 0) {
 253                         if (i)
 254                                 printk("\n");
 255                         printk(KERN_DEBUG "%s: data[%p]:", dev->name,
 256                                skb->data + i);
 257                 }
 258                 printk(" %02x", ((u8 *)skb->data)[i]);
 259         }
 260         printk("\n");
 261 }
 262
 263 static int cpmac_mdio_read(struct mii_bus *bus, int phy_id, int reg)
 264 {
 265         u32 val;
 266
 267         while (cpmac_read(bus->priv, CPMAC_MDIO_ACCESS(0)) & MDIO_BUSY)
 268                 cpu_relax();
 269         cpmac_write(bus->priv, CPMAC_MDIO_ACCESS(0), MDIO_BUSY | MDIO_REG(reg) |
 270                     MDIO_PHY(phy_id));
 271         while ((val = cpmac_read(bus->priv, CPMAC_MDIO_ACCESS(0))) & MDIO_BUSY)
 272                 cpu_relax();
 273         return MDIO_DATA(val);
 274 }
 275
 276 static int cpmac_mdio_write(struct mii_bus *bus, int phy_id,
 277                             int reg, u16 val)
 278 {
 279         while (cpmac_read(bus->priv, CPMAC_MDIO_ACCESS(0)) & MDIO_BUSY)
 280                 cpu_relax();
 281         cpmac_write(bus->priv, CPMAC_MDIO_ACCESS(0), MDIO_BUSY | MDIO_WRITE |
 282                     MDIO_REG(reg) | MDIO_PHY(phy_id) | MDIO_DATA(val));
 283         return 0;
 284 }
 285
 286 static int cpmac_mdio_reset(struct mii_bus *bus)
 287 {
 288         ar7_device_reset(AR7_RESET_BIT_MDIO);
 289         cpmac_write(bus->priv, CPMAC_MDIO_CONTROL, MDIOC_ENABLE |
 290                     MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1));
 291         return 0;
 292 }
 293
 294 static int mii_irqs[PHY_MAX_ADDR] = { PHY_POLL, };
 295
 296 static struct mii_bus cpmac_mii = {
 297         .name = "cpmac-mii",
 298         .read = cpmac_mdio_read,
 299         .write = cpmac_mdio_write,
 300         .reset = cpmac_mdio_reset,
 301         .irq = mii_irqs,
 302 };
 303
 304 static int cpmac_config(struct net_device *dev, struct ifmap *map)
 305 {
 306         if (dev->flags & IFF_UP)
 307                 return -EBUSY;
 308
 309         /* Don't allow changing the I/O address */
 310         if (map->base_addr != dev->base_addr)
 311                 return -EOPNOTSUPP;
 312
 313         /* ignore other fields */
 314         return 0;
 315 }
 316
 317 static void cpmac_set_multicast_list(struct net_device *dev)
 318 {
 319         struct dev_mc_list *iter;
 320         int i;
 321         u8 tmp;
 322         u32 mbp, bit, hash[2] = { 0, };
 323         struct cpmac_priv *priv = netdev_priv(dev);
 324
 325         mbp = cpmac_read(priv->regs, CPMAC_MBP);
 326         if (dev->flags & IFF_PROMISC) {
 327                 cpmac_write(priv->regs, CPMAC_MBP, (mbp & ~MBP_PROMISCCHAN(0)) |
 328                             MBP_RXPROMISC);
 329         } else {
 330                 cpmac_write(priv->regs, CPMAC_MBP, mbp & ~MBP_RXPROMISC);
 331                 if (dev->flags & IFF_ALLMULTI) {
 332                         /* enable all multicast mode */
 333                         cpmac_write(priv->regs, CPMAC_MAC_HASH_LO, 0xffffffff);
 334                         cpmac_write(priv->regs, CPMAC_MAC_HASH_HI, 0xffffffff);
 335                 } else {
 336                         /*
 337                          * cpmac uses some strange mac address hashing
 338                          * (not crc32)
 339                          */
 340                         for (i = 0, iter = dev->mc_list; i < dev->mc_count;
 341                              i++, iter = iter->next) {
 342                                 bit = 0;
 343                                 tmp = iter->dmi_addr[0];
 344                                 bit  ^= (tmp >> 2) ^ (tmp << 4);
 345                                 tmp = iter->dmi_addr[1];
 346                                 bit  ^= (tmp >> 4) ^ (tmp << 2);
 347                                 tmp = iter->dmi_addr[2];
 348                                 bit  ^= (tmp >> 6) ^ tmp;
 349                                 tmp = iter->dmi_addr[3];
 350                                 bit  ^= (tmp >> 2) ^ (tmp << 4);
 351                                 tmp = iter->dmi_addr[4];
 352                                 bit  ^= (tmp >> 4) ^ (tmp << 2);
 353                                 tmp = iter->dmi_addr[5];
 354                                 bit  ^= (tmp >> 6) ^ tmp;
 355                                 bit &= 0x3f;
 356                                 hash[bit / 32] |= 1 << (bit % 32);
 357                         }
 358
 359                         cpmac_write(priv->regs, CPMAC_MAC_HASH_LO, hash[0]);
 360                         cpmac_write(priv->regs, CPMAC_MAC_HASH_HI, hash[1]);
 361                 }
 362         }
 363 }
 364
 365 static struct sk_buff *cpmac_rx_one(struct net_device *dev,
 366                                     struct cpmac_priv *priv,
 367                                     struct cpmac_desc *desc)
 368 {
 369         struct sk_buff *skb, *result = NULL;
 370
 371         if (unlikely(netif_msg_hw(priv)))
 372                 cpmac_dump_desc(dev, desc);
 373         cpmac_write(priv->regs, CPMAC_RX_ACK(0), (u32)desc->mapping);
 374         if (unlikely(!desc->datalen)) {
 375                 if (netif_msg_rx_err(priv) && net_ratelimit())
 376                         printk(KERN_WARNING "%s: rx: spurious interrupt\n",
 377                                dev->name);
 378                 return NULL;
 379         }
 380
 381         skb = netdev_alloc_skb(dev, CPMAC_SKB_SIZE);
 382         if (likely(skb)) {
 383                 skb_reserve(skb, 2);
 384                 skb_put(desc->skb, desc->datalen);
 385                 desc->skb->protocol = eth_type_trans(desc->skb, dev);
 386                 desc->skb->ip_summed = CHECKSUM_NONE;
 387                 dev->stats.rx_packets++;
 388                 dev->stats.rx_bytes += desc->datalen;
 389                 result = desc->skb;
 390                 dma_unmap_single(&dev->dev, desc->data_mapping, CPMAC_SKB_SIZE,
 391                                  DMA_FROM_DEVICE);
 392                 desc->skb = skb;
 393                 desc->data_mapping = dma_map_single(&dev->dev, skb->data,
 394                                                     CPMAC_SKB_SIZE,
 395                                                     DMA_FROM_DEVICE);
 396                 desc->hw_data = (u32)desc->data_mapping;
 397                 if (unlikely(netif_msg_pktdata(priv))) {
 398                         printk(KERN_DEBUG "%s: received packet:\n", dev->name);
 399                         cpmac_dump_skb(dev, result);
 400                 }
 401         } else {
 402                 if (netif_msg_rx_err(priv) && net_ratelimit())
 403                         printk(KERN_WARNING
 404                                "%s: low on skbs, dropping packet\n", dev->name);
 405                 dev->stats.rx_dropped++;
 406         }
 407
 408         desc->buflen = CPMAC_SKB_SIZE;
 409         desc->dataflags = CPMAC_OWN;
 410
 411         return result;
 412 }
 413
 414 static int cpmac_poll(struct net_device *dev, int *budget)
 415 {
 416         struct sk_buff *skb;
 417         struct cpmac_desc *desc;
 418         int received = 0, quota = min(dev->quota, *budget);
 419         struct cpmac_priv *priv = netdev_priv(dev);
 420
 421         spin_lock(&priv->rx_lock);
 422         if (unlikely(!priv->rx_head)) {
 423                 if (netif_msg_rx_err(priv) && net_ratelimit())
 424                         printk(KERN_WARNING "%s: rx: polling, but no queue\n",
 425                                dev->name);
 426                 netif_rx_complete(dev);
 427                 return 0;
 428         }
 429
 430         desc = priv->rx_head;
 431         while ((received < quota) && ((desc->dataflags & CPMAC_OWN) == 0)) {
 432                 skb = cpmac_rx_one(dev, priv, desc);
 433                 if (likely(skb)) {
 434                         netif_receive_skb(skb);
 435                         received++;
 436                 }
 437                 desc = desc->next;
 438         }
 439
 440         priv->rx_head = desc;
 441         spin_unlock(&priv->rx_lock);
 442         *budget -= received;
 443         dev->quota -= received;
 444         if (unlikely(netif_msg_rx_status(priv)))
 445                 printk(KERN_DEBUG "%s: poll processed %d packets\n", dev->name,
 446                        received);
 447         if (desc->dataflags & CPMAC_OWN) {
 448                 netif_rx_complete(dev);
 449                 cpmac_write(priv->regs, CPMAC_RX_PTR(0), (u32)desc->mapping);
 450                 cpmac_write(priv->regs, CPMAC_RX_INT_ENABLE, 1);
 451                 return 0;
 452         }
 453
 454         return 1;
 455 }
 456
 457 static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
 458 {
 459         int queue, len;
 460         struct cpmac_desc *desc;
 461         struct cpmac_priv *priv = netdev_priv(dev);
 462
 463         if (unlikely(skb_padto(skb, ETH_ZLEN))) {
 464                 if (netif_msg_tx_err(priv) && net_ratelimit())
 465                         printk(KERN_WARNING
 466                                "%s: tx: padding failed, dropping\n", dev->name);
 467                 spin_lock(&priv->lock);
 468                 dev->stats.tx_dropped++;
 469                 spin_unlock(&priv->lock);
 470                 return -ENOMEM;
 471         }
 472
 473         len = max(skb->len, ETH_ZLEN);
 474         queue = skb->queue_mapping;
 475         netif_stop_subqueue(dev, queue);
 476
 477         desc = &priv->desc_ring[queue];
 478         if (unlikely(desc->dataflags & CPMAC_OWN)) {
 479                 if (netif_msg_tx_err(priv) && net_ratelimit())
 480                         printk(KERN_WARNING "%s: tx dma ring full, dropping\n",
 481                                dev->name);
 482                 spin_lock(&priv->lock);
 483                 dev->stats.tx_dropped++;
 484                 spin_unlock(&priv->lock);
 485                 dev_kfree_skb_any(skb);
 486                 return -ENOMEM;
 487         }
 488
 489         spin_lock(&priv->lock);
 490         dev->trans_start = jiffies;
 491         spin_unlock(&priv->lock);
 492         desc->dataflags = CPMAC_SOP | CPMAC_EOP | CPMAC_OWN;
 493         desc->skb = skb;
 494         desc->data_mapping = dma_map_single(&dev->dev, skb->data, len,
 495                                             DMA_TO_DEVICE);
 496         desc->hw_data = (u32)desc->data_mapping;
 497         desc->datalen = len;
 498         desc->buflen = len;
 499         if (unlikely(netif_msg_tx_queued(priv)))
 500                 printk(KERN_DEBUG "%s: sending 0x%p, len=%d\n", dev->name, skb,
 501                        skb->len);
 502         if (unlikely(netif_msg_hw(priv)))
 503                 cpmac_dump_desc(dev, desc);
 504         if (unlikely(netif_msg_pktdata(priv)))
 505                 cpmac_dump_skb(dev, skb);
 506         cpmac_write(priv->regs, CPMAC_TX_PTR(queue), (u32)desc->mapping);
 507
 508         return 0;
 509 }
 510
 511 static void cpmac_end_xmit(struct net_device *dev, int queue)
 512 {
 513         struct cpmac_desc *desc;
 514         struct cpmac_priv *priv = netdev_priv(dev);
 515
 516         desc = &priv->desc_ring[queue];
 517         cpmac_write(priv->regs, CPMAC_TX_ACK(queue), (u32)desc->mapping);
 518         if (likely(desc->skb)) {
 519                 spin_lock(&priv->lock);
 520                 dev->stats.tx_packets++;
 521                 dev->stats.tx_bytes += desc->skb->len;
 522                 spin_unlock(&priv->lock);
 523                 dma_unmap_single(&dev->dev, desc->data_mapping, desc->skb->len,
 524                                  DMA_TO_DEVICE);
 525
 526                 if (unlikely(netif_msg_tx_done(priv)))
 527                         printk(KERN_DEBUG "%s: sent 0x%p, len=%d\n", dev->name,
 528                                desc->skb, desc->skb->len);
 529
 530                 dev_kfree_skb_irq(desc->skb);
 531                 desc->skb = NULL;
 532                 if (netif_subqueue_stopped(dev, queue))
 533                         netif_wake_subqueue(dev, queue);
 534         } else {
 535                 if (netif_msg_tx_err(priv) && net_ratelimit())
 536                         printk(KERN_WARNING
 537                                "%s: end_xmit: spurious interrupt\n", dev->name);
 538                 if (netif_subqueue_stopped(dev, queue))
 539                         netif_wake_subqueue(dev, queue);
 540         }
 541 }
 542
 543 static void cpmac_hw_stop(struct net_device *dev)
 544 {
 545         int i;
 546         struct cpmac_priv *priv = netdev_priv(dev);
 547         struct plat_cpmac_data *pdata = priv->pdev->dev.platform_data;
 548
 549         ar7_device_reset(pdata->reset_bit);
 550         cpmac_write(priv->regs, CPMAC_RX_CONTROL,
 551                     cpmac_read(priv->regs, CPMAC_RX_CONTROL) & ~1);
 552         cpmac_write(priv->regs, CPMAC_TX_CONTROL,
 553                     cpmac_read(priv->regs, CPMAC_TX_CONTROL) & ~1);
 554         for (i = 0; i < 8; i++) {
 555                 cpmac_write(priv->regs, CPMAC_TX_PTR(i), 0);
 556                 cpmac_write(priv->regs, CPMAC_RX_PTR(i), 0);
 557         }
 558         cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
 559         cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
 560         cpmac_write(priv->regs, CPMAC_TX_INT_CLEAR, 0xff);
 561         cpmac_write(priv->regs, CPMAC_MAC_INT_CLEAR, 0xff);
 562         cpmac_write(priv->regs, CPMAC_MAC_CONTROL,
 563                     cpmac_read(priv->regs, CPMAC_MAC_CONTROL) & ~MAC_MII);
 564 }
 565
 566 static void cpmac_hw_start(struct net_device *dev)
 567 {
 568         int i;
 569         struct cpmac_priv *priv = netdev_priv(dev);
 570         struct plat_cpmac_data *pdata = priv->pdev->dev.platform_data;
 571
 572         ar7_device_reset(pdata->reset_bit);
 573         for (i = 0; i < 8; i++) {
 574                 cpmac_write(priv->regs, CPMAC_TX_PTR(i), 0);
 575                 cpmac_write(priv->regs, CPMAC_RX_PTR(i), 0);
 576         }
 577         cpmac_write(priv->regs, CPMAC_RX_PTR(0), priv->rx_head->mapping);
 578
 579         cpmac_write(priv->regs, CPMAC_MBP, MBP_RXSHORT | MBP_RXBCAST |
 580                     MBP_RXMCAST);
 581         cpmac_write(priv->regs, CPMAC_BUFFER_OFFSET, 0);
 582         for (i = 0; i < 8; i++)
 583                 cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
 584         cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
 585         cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
 586                     (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
 587                     (dev->dev_addr[3] << 24));
 588         cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
 589         cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
 590         cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
 591         cpmac_write(priv->regs, CPMAC_TX_INT_CLEAR, 0xff);
 592         cpmac_write(priv->regs, CPMAC_MAC_INT_CLEAR, 0xff);
 593         cpmac_write(priv->regs, CPMAC_UNICAST_ENABLE, 1);
 594         cpmac_write(priv->regs, CPMAC_RX_INT_ENABLE, 1);
 595         cpmac_write(priv->regs, CPMAC_TX_INT_ENABLE, 0xff);
 596         cpmac_write(priv->regs, CPMAC_MAC_INT_ENABLE, 3);
 597
 598         cpmac_write(priv->regs, CPMAC_RX_CONTROL,
 599                     cpmac_read(priv->regs, CPMAC_RX_CONTROL) | 1);
 600         cpmac_write(priv->regs, CPMAC_TX_CONTROL,
 601                     cpmac_read(priv->regs, CPMAC_TX_CONTROL) | 1);
 602         cpmac_write(priv->regs, CPMAC_MAC_CONTROL,
 603                     cpmac_read(priv->regs, CPMAC_MAC_CONTROL) | MAC_MII |
 604                     MAC_FDX);
 605 }
 606
 607 static void cpmac_clear_rx(struct net_device *dev)
 608 {
 609         struct cpmac_priv *priv = netdev_priv(dev);
 610         struct cpmac_desc *desc;
 611         int i;
 612         if (unlikely(!priv->rx_head))
 613                 return;
 614         desc = priv->rx_head;
 615         for (i = 0; i < priv->ring_size; i++) {
 616                 if ((desc->dataflags & CPMAC_OWN) == 0) {
 617                         if (netif_msg_rx_err(priv) && net_ratelimit())
 618                                 printk(KERN_WARNING "%s: packet dropped\n",
 619                                        dev->name);
 620                         if (unlikely(netif_msg_hw(priv)))
 621                                 cpmac_dump_desc(dev, desc);
 622                         desc->dataflags = CPMAC_OWN;
 623                         dev->stats.rx_dropped++;
 624                 }
 625                 desc = desc->next;
 626         }
 627 }
 628
 629 static void cpmac_clear_tx(struct net_device *dev)
 630 {
 631         struct cpmac_priv *priv = netdev_priv(dev);
 632         int i;
 633         if (unlikely(!priv->desc_ring))
 634                 return;
 635         for (i = 0; i < CPMAC_QUEUES; i++)
 636                 if (priv->desc_ring[i].skb) {
 637                         dev_kfree_skb_any(priv->desc_ring[i].skb);
 638                         if (netif_subqueue_stopped(dev, i))
 639                             netif_wake_subqueue(dev, i);
 640                 }
 641 }
 642
 643 static void cpmac_hw_error(struct work_struct *work)
 644 {
 645         struct cpmac_priv *priv =
 646                 container_of(work, struct cpmac_priv, reset_work);
 647
 648         spin_lock(&priv->rx_lock);
 649         cpmac_clear_rx(priv->dev);
 650         spin_unlock(&priv->rx_lock);
 651         cpmac_clear_tx(priv->dev);
 652         cpmac_hw_start(priv->dev);
 653         netif_start_queue(priv->dev);
 654 }
 655
 656 static irqreturn_t cpmac_irq(int irq, void *dev_id)
 657 {
 658         struct net_device *dev = dev_id;
 659         struct cpmac_priv *priv;
 660         int queue;
 661         u32 status;
 662
 663         if (!dev)
 664                 return IRQ_NONE;
 665
 666         priv = netdev_priv(dev);
 667
 668         status = cpmac_read(priv->regs, CPMAC_MAC_INT_VECTOR);
 669
 670         if (unlikely(netif_msg_intr(priv)))
 671                 printk(KERN_DEBUG "%s: interrupt status: 0x%08x\n", dev->name,
 672                        status);
 673
 674         if (status & MAC_INT_TX)
 675                 cpmac_end_xmit(dev, (status & 7));
 676
 677         if (status & MAC_INT_RX) {
 678                 queue = (status >> 8) & 7;
 679                 netif_rx_schedule(dev);
 680                 cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 1 << queue);
 681         }
 682
 683         cpmac_write(priv->regs, CPMAC_MAC_EOI_VECTOR, 0);
 684
 685         if (unlikely(status & (MAC_INT_HOST | MAC_INT_STATUS))) {
 686                 if (netif_msg_drv(priv) && net_ratelimit())
 687                         printk(KERN_ERR "%s: hw error, resetting...\n",
 688                                dev->name);
 689                 netif_stop_queue(dev);
 690                 cpmac_hw_stop(dev);
 691                 schedule_work(&priv->reset_work);
 692                 if (unlikely(netif_msg_hw(priv)))
 693                         cpmac_dump_regs(dev);
 694         }
 695
 696         return IRQ_HANDLED;
 697 }
 698
 699 static void cpmac_tx_timeout(struct net_device *dev)
 700 {
 701         struct cpmac_priv *priv = netdev_priv(dev);
 702         int i;
 703
 704         spin_lock(&priv->lock);
 705         dev->stats.tx_errors++;
 706         spin_unlock(&priv->lock);
 707         if (netif_msg_tx_err(priv) && net_ratelimit())
 708                 printk(KERN_WARNING "%s: transmit timeout\n", dev->name);
 709         /*
 710          * FIXME: waking up random queue is not the best thing to
 711          * do... on the other hand why we got here at all?
 712          */
 713         for (i = 0; i < CPMAC_QUEUES; i++)
 714                 if (priv->desc_ring[i].skb) {
 715                         dev_kfree_skb_any(priv->desc_ring[i].skb);
 716                         netif_wake_subqueue(dev, i);
 717                         break;
 718                 }
 719 }
 720
 721 static int cpmac_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 722 {
 723         struct cpmac_priv *priv = netdev_priv(dev);
 724         if (!(netif_running(dev)))
 725                 return -EINVAL;
 726         if (!priv->phy)
 727                 return -EINVAL;
 728         if ((cmd == SIOCGMIIPHY) || (cmd == SIOCGMIIREG) ||
 729             (cmd == SIOCSMIIREG))
 730                 return phy_mii_ioctl(priv->phy, if_mii(ifr), cmd);
 731
 732         return -EOPNOTSUPP;
 733 }
 734
 735 static int cpmac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 736 {
 737         struct cpmac_priv *priv = netdev_priv(dev);
 738
 739         if (priv->phy)
 740                 return phy_ethtool_gset(priv->phy, cmd);
 741
 742         return -EINVAL;
 743 }
 744
 745 static int cpmac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 746 {
 747         struct cpmac_priv *priv = netdev_priv(dev);
 748
 749         if (!capable(CAP_NET_ADMIN))
 750                 return -EPERM;
 751
 752         if (priv->phy)
 753                 return phy_ethtool_sset(priv->phy, cmd);
 754
 755         return -EINVAL;
 756 }
 757
 758 static void cpmac_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
 759 {
 760         struct cpmac_priv *priv = netdev_priv(dev);
 761
 762         ring->rx_max_pending = 1024;
 763         ring->rx_mini_max_pending = 1;
 764         ring->rx_jumbo_max_pending = 1;
 765         ring->tx_max_pending = 1;
 766
 767         ring->rx_pending = priv->ring_size;
 768         ring->rx_mini_pending = 1;
 769         ring->rx_jumbo_pending = 1;
 770         ring->tx_pending = 1;
 771 }
 772
 773 static int cpmac_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
 774 {
 775         struct cpmac_priv *priv = netdev_priv(dev);
 776
 777         if (dev->flags && IFF_UP)
 778                 return -EBUSY;
 779         priv->ring_size = ring->rx_pending;
 780         return 0;
 781 }
 782
 783 static void cpmac_get_drvinfo(struct net_device *dev,
 784                               struct ethtool_drvinfo *info)
 785 {
 786         strcpy(info->driver, "cpmac");
 787         strcpy(info->version, CPMAC_VERSION);
 788         info->fw_version[0] = '\0';
 789         sprintf(info->bus_info, "%s", "cpmac");
 790         info->regdump_len = 0;
 791 }
 792
 793 static const struct ethtool_ops cpmac_ethtool_ops = {
 794         .get_settings = cpmac_get_settings,
 795         .set_settings = cpmac_set_settings,
 796         .get_drvinfo = cpmac_get_drvinfo,
 797         .get_link = ethtool_op_get_link,
 798         .get_ringparam = cpmac_get_ringparam,
 799         .set_ringparam = cpmac_set_ringparam,
 800 };
 801
 802 static void cpmac_adjust_link(struct net_device *dev)
 803 {
 804         struct cpmac_priv *priv = netdev_priv(dev);
 805         int new_state = 0;
 806
 807         spin_lock(&priv->lock);
 808         if (priv->phy->link) {
 809                 netif_start_queue(dev);
 810                 if (priv->phy->duplex != priv->oldduplex) {
 811                         new_state = 1;
 812                         priv->oldduplex = priv->phy->duplex;
 813                 }
 814
 815                 if (priv->phy->speed != priv->oldspeed) {
 816                         new_state = 1;
 817                         priv->oldspeed = priv->phy->speed;
 818                 }
 819
 820                 if (!priv->oldlink) {
 821                         new_state = 1;
 822                         priv->oldlink = 1;
 823                         netif_schedule(dev);
 824                 }
 825         } else if (priv->oldlink) {
 826                 netif_stop_queue(dev);
 827                 new_state = 1;
 828                 priv->oldlink = 0;
 829                 priv->oldspeed = 0;
 830                 priv->oldduplex = -1;
 831         }
 832
 833         if (new_state && netif_msg_link(priv) && net_ratelimit())
 834                 phy_print_status(priv->phy);
 835
 836         spin_unlock(&priv->lock);
 837 }
 838
 839 static int cpmac_open(struct net_device *dev)
 840 {
 841         int i, size, res;
 842         struct cpmac_priv *priv = netdev_priv(dev);
 843         struct resource *mem;
 844         struct cpmac_desc *desc;
 845         struct sk_buff *skb;
 846
 847         priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link,
 848                                 0, PHY_INTERFACE_MODE_MII);
 849         if (IS_ERR(priv->phy)) {
 850                 if (netif_msg_drv(priv))
 851                         printk(KERN_ERR "%s: Could not attach to PHY\n",
 852                                dev->name);
 853                 return PTR_ERR(priv->phy);
 854         }
 855
 856         mem = platform_get_resource_byname(priv->pdev, IORESOURCE_MEM, "regs");
 857         if (!request_mem_region(mem->start, mem->end - mem->start, dev->name)) {
 858                 if (netif_msg_drv(priv))
 859                         printk(KERN_ERR "%s: failed to request registers\n",
 860                                dev->name);
 861                 res = -ENXIO;
 862                 goto fail_reserve;
 863         }
 864
 865         priv->regs = ioremap(mem->start, mem->end - mem->start);
 866         if (!priv->regs) {
 867                 if (netif_msg_drv(priv))
 868                         printk(KERN_ERR "%s: failed to remap registers\n",
 869                                dev->name);
 870                 res = -ENXIO;
 871                 goto fail_remap;
 872         }
 873
 874         size = priv->ring_size + CPMAC_QUEUES;
 875         priv->desc_ring = dma_alloc_coherent(&dev->dev,
 876                                              sizeof(struct cpmac_desc) * size,
 877                                              &priv->dma_ring,
 878                                              GFP_KERNEL);
 879         if (!priv->desc_ring) {
 880                 res = -ENOMEM;
 881                 goto fail_alloc;
 882         }
 883
 884         for (i = 0; i < size; i++)
 885                 priv->desc_ring[i].mapping = priv->dma_ring + sizeof(*desc) * i;
 886
 887         priv->rx_head = &priv->desc_ring[CPMAC_QUEUES];
 888         for (i = 0, desc = priv->rx_head; i < priv->ring_size; i++, desc++) {
 889                 skb = netdev_alloc_skb(dev, CPMAC_SKB_SIZE);
 890                 if (unlikely(!skb)) {
 891                         res = -ENOMEM;
 892                         goto fail_desc;
 893                 }
 894                 skb_reserve(skb, 2);
 895                 desc->skb = skb;
 896                 desc->data_mapping = dma_map_single(&dev->dev, skb->data,
 897                                                     CPMAC_SKB_SIZE,
 898                                                     DMA_FROM_DEVICE);
 899                 desc->hw_data = (u32)desc->data_mapping;
 900                 desc->buflen = CPMAC_SKB_SIZE;
 901                 desc->dataflags = CPMAC_OWN;
 902                 desc->next = &priv->rx_head[(i + 1) % priv->ring_size];
 903                 desc->hw_next = (u32)desc->next->mapping;
 904         }
 905
 906         if ((res = request_irq(dev->irq, cpmac_irq, IRQF_SHARED,
 907                                dev->name, dev))) {
 908                 if (netif_msg_drv(priv))
 909                         printk(KERN_ERR "%s: failed to obtain irq\n",
 910                                dev->name);
 911                 goto fail_irq;
 912         }
 913
 914         INIT_WORK(&priv->reset_work, cpmac_hw_error);
 915         cpmac_hw_start(dev);
 916
 917         priv->phy->state = PHY_CHANGELINK;
 918         phy_start(priv->phy);
 919
 920         return 0;
 921
 922 fail_irq:
 923 fail_desc:
 924         for (i = 0; i < priv->ring_size; i++) {
 925                 if (priv->rx_head[i].skb) {
 926                         dma_unmap_single(&dev->dev,
 927                                          priv->rx_head[i].data_mapping,
 928                                          CPMAC_SKB_SIZE,
 929                                          DMA_FROM_DEVICE);
 930                         kfree_skb(priv->rx_head[i].skb);
 931                 }
 932         }
 933 fail_alloc:
 934         kfree(priv->desc_ring);
 935         iounmap(priv->regs);
 936
 937 fail_remap:
 938         release_mem_region(mem->start, mem->end - mem->start);
 939
 940 fail_reserve:
 941         phy_disconnect(priv->phy);
 942
 943         return res;
 944 }
 945
 946 static int cpmac_stop(struct net_device *dev)
 947 {
 948         int i;
 949         struct cpmac_priv *priv = netdev_priv(dev);
 950         struct resource *mem;
 951
 952         netif_stop_queue(dev);
 953
 954         cancel_work_sync(&priv->reset_work);
 955         phy_stop(priv->phy);
 956         phy_disconnect(priv->phy);
 957         priv->phy = NULL;
 958
 959         cpmac_hw_stop(dev);
 960
 961         for (i = 0; i < 8; i++)
 962                 cpmac_write(priv->regs, CPMAC_TX_PTR(i), 0);
 963         cpmac_write(priv->regs, CPMAC_RX_PTR(0), 0);
 964         cpmac_write(priv->regs, CPMAC_MBP, 0);
 965
 966         free_irq(dev->irq, dev);
 967         iounmap(priv->regs);
 968         mem = platform_get_resource_byname(priv->pdev, IORESOURCE_MEM, "regs");
 969         release_mem_region(mem->start, mem->end - mem->start);
 970         priv->rx_head = &priv->desc_ring[CPMAC_QUEUES];
 971         for (i = 0; i < priv->ring_size; i++) {
 972                 if (priv->rx_head[i].skb) {
 973                         dma_unmap_single(&dev->dev,
 974                                          priv->rx_head[i].data_mapping,
 975                                          CPMAC_SKB_SIZE,
 976                                          DMA_FROM_DEVICE);
 977                         kfree_skb(priv->rx_head[i].skb);
 978                 }
 979         }
 980
 981         dma_free_coherent(&dev->dev, sizeof(struct cpmac_desc) *
 982                           (CPMAC_QUEUES + priv->ring_size),
 983                           priv->desc_ring, priv->dma_ring);
 984         return 0;
 985 }
 986
 987 static int external_switch;
 988
 989 static int __devinit cpmac_probe(struct platform_device *pdev)
 990 {
 991         int rc, phy_id;
 992         struct resource *mem;
 993         struct cpmac_priv *priv;
 994         struct net_device *dev;
 995         struct plat_cpmac_data *pdata;
 996
 997         pdata = pdev->dev.platform_data;
 998
 999         for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
1000                 if (!(pdata->phy_mask & (1 << phy_id)))
1001                         continue;
1002                 if (!cpmac_mii.phy_map[phy_id])
1003                         continue;
1004                 break;
1005         }
1006
1007         if (phy_id == PHY_MAX_ADDR) {
1008                 if (external_switch || dumb_switch)
1009                         phy_id = 0;
1010                 else {
1011                         printk(KERN_ERR "cpmac: no PHY present\n");
1012                         return -ENODEV;
1013                 }
1014         }
1015
1016         dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
1017
1018         if (!dev) {
1019                 printk(KERN_ERR "cpmac: Unable to allocate net_device\n");
1020                 return -ENOMEM;
1021         }
1022
1023         platform_set_drvdata(pdev, dev);
1024         priv = netdev_priv(dev);
1025
1026         priv->pdev = pdev;
1027         mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
1028         if (!mem) {
1029                 rc = -ENODEV;
1030                 goto fail;
1031         }
1032
1033         dev->irq = platform_get_irq_byname(pdev, "irq");
1034
1035         dev->open               = cpmac_open;
1036         dev->stop               = cpmac_stop;
1037         dev->set_config         = cpmac_config;
1038         dev->hard_start_xmit    = cpmac_start_xmit;
1039         dev->do_ioctl           = cpmac_ioctl;
1040         dev->set_multicast_list = cpmac_set_multicast_list;
1041         dev->tx_timeout         = cpmac_tx_timeout;
1042         dev->ethtool_ops        = &cpmac_ethtool_ops;
1043         dev->poll = cpmac_poll;
1044         dev->weight = 64;
1045         dev->features |= NETIF_F_MULTI_QUEUE;
1046
1047         spin_lock_init(&priv->lock);
1048         spin_lock_init(&priv->rx_lock);
1049         priv->dev = dev;
1050         priv->ring_size = 64;
1051         priv->msg_enable = netif_msg_init(debug_level, 0xff);
1052         memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr));
1053         if (phy_id == 31) {
1054                 snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT,
1055                          cpmac_mii.id, phy_id);
1056         } else
1057                 snprintf(priv->phy_name, BUS_ID_SIZE, "fixed@%d:%d", 100, 1);
1058
1059         if ((rc = register_netdev(dev))) {
1060                 printk(KERN_ERR "cpmac: error %i registering device %s\n", rc,
1061                        dev->name);
1062                 goto fail;
1063         }
1064
1065         if (netif_msg_probe(priv)) {
1066                 printk(KERN_INFO
1067                        "cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: "
1068                        MAC_FMT ")\n", dev->name, (void *)mem->start, dev->irq,
1069                        priv->phy_name, MAC_ARG(dev->dev_addr));
1070         }
1071         return 0;
1072
1073 fail:
1074         free_netdev(dev);
1075         return rc;
1076 }
1077
1078 static int __devexit cpmac_remove(struct platform_device *pdev)
1079 {
1080         struct net_device *dev = platform_get_drvdata(pdev);
1081         unregister_netdev(dev);
1082         free_netdev(dev);
1083         return 0;
1084 }
1085
1086 static struct platform_driver cpmac_driver = {
1087         .driver.name = "cpmac",
1088         .probe = cpmac_probe,
1089         .remove = __devexit_p(cpmac_remove),
1090 };
1091
1092 int __devinit cpmac_init(void)
1093 {
1094         u32 mask;
1095         int i, res;
1096
1097         cpmac_mii.priv = ioremap(AR7_REGS_MDIO, 256);
1098
1099         if (!cpmac_mii.priv) {
1100                 printk(KERN_ERR "Can't ioremap mdio registers\n");
1101                 return -ENXIO;
1102         }
1103
1104 #warning FIXME: unhardcode gpio&reset bits
1105         ar7_gpio_disable(26);
1106         ar7_gpio_disable(27);
1107         ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
1108         ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
1109         ar7_device_reset(AR7_RESET_BIT_EPHY);
1110
1111         cpmac_mii.reset(&cpmac_mii);
1112
1113         for (i = 0; i < 300000; i++)
1114                 if ((mask = cpmac_read(cpmac_mii.priv, CPMAC_MDIO_ALIVE)))
1115                         break;
1116                 else
1117                         cpu_relax();
1118
1119         mask &= 0x7fffffff;
1120         if (mask & (mask - 1)) {
1121                 external_switch = 1;
1122                 mask = 0;
1123         }
1124
1125         cpmac_mii.phy_mask = ~(mask | 0x80000000);
1126
1127         res = mdiobus_register(&cpmac_mii);
1128         if (res)
1129                 goto fail_mii;
1130
1131         res = platform_driver_register(&cpmac_driver);
1132         if (res)
1133                 goto fail_cpmac;
1134
1135         return 0;
1136
1137 fail_cpmac:
1138         mdiobus_unregister(&cpmac_mii);
1139
1140 fail_mii:
1141         iounmap(cpmac_mii.priv);
1142
1143         return res;
1144 }
1145
1146 void __devexit cpmac_exit(void)
1147 {
1148         platform_driver_unregister(&cpmac_driver);
1149         mdiobus_unregister(&cpmac_mii);
1150         iounmap(cpmac_mii.priv);
1151 }
1152
1153 module_init(cpmac_init);
1154 module_exit(cpmac_exit);