target/linux/apm821xx/dts/MR24.dts

   1 /*
   2  * Device Tree Source for Meraki MR24 (Ikarem)
   3  *
   4  * Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com>
   5  *
   6  * Based on Cisco Meraki GPL Release r23-20150601 MR24 DTS
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without
  10  * any warranty of any kind, whether express or implied.
  11  */
  12
  13 /dts-v1/;
  14
  15 / {
  16         #address-cells = <2>;
  17         #size-cells = <1>;
  18         model = "Meraki MR24 Access Point";
  19         compatible = "meraki,ikarem";
  20         dcr-parent = <&{/cpus/cpu@0}>;
  21
  22         aliases {
  23                 ethernet0 = &EMAC0;
  24                 serial0 = &UART0;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 cpu@0 {
  32                         device_type = "cpu";
  33                         model = "PowerPC,apm821xx";
  34                         reg = <0x00000000>;
  35                         clock-frequency = <0>; /* Filled in by U-Boot */
  36                         timebase-frequency = <0>; /* Filled in by U-Boot */
  37                         i-cache-line-size = <32>;
  38                         d-cache-line-size = <32>;
  39                         i-cache-size = <32768>;
  40                         d-cache-size = <32768>;
  41                         dcr-controller;
  42                         dcr-access-method = "native";
  43                         next-level-cache = <&L2C0>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  50         };
  51
  52         UIC0: interrupt-controller0 {
  53                 compatible = "ibm,uic";
  54                 interrupt-controller;
  55                 cell-index = <0>;
  56                 dcr-reg = <0x0c0 0x009>;
  57                 #address-cells = <0>;
  58                 #size-cells = <0>;
  59                 #interrupt-cells = <2>;
  60         };
  61
  62         UIC1: interrupt-controller1 {
  63                 compatible = "ibm,uic";
  64                 interrupt-controller;
  65                 cell-index = <1>;
  66                 dcr-reg = <0x0d0 0x009>;
  67                 #address-cells = <0>;
  68                 #size-cells = <0>;
  69                 #interrupt-cells = <2>;
  70                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  71                 interrupt-parent = <&UIC0>;
  72         };
  73
  74         UIC2: interrupt-controller2 {
  75                 compatible = "ibm,uic";
  76                 interrupt-controller;
  77                 cell-index = <2>;
  78                 dcr-reg = <0x0e0 0x009>;
  79                 #address-cells = <0>;
  80                 #size-cells = <0>;
  81                 #interrupt-cells = <2>;
  82                 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  83                 interrupt-parent = <&UIC0>;
  84         };
  85
  86         UIC3: interrupt-controller3 {
  87                 compatible = "ibm,uic";
  88                 interrupt-controller;
  89                 cell-index = <3>;
  90                 dcr-reg = <0x0f0 0x009>;
  91                 #address-cells = <0>;
  92                 #size-cells = <0>;
  93                 #interrupt-cells = <2>;
  94                 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  95                 interrupt-parent = <&UIC0>;
  96         };
  97
  98         /* KPH check the following */
  99         OCM: ocm@400040000 {
 100                 compatible = "ibm,ocm";
 101                 status = "okay";
 102                 cell-index = <1>;
 103                 /* configured in U-Boot */
 104                 reg = <4 0x00040000 0x8000>; /* 32K */
 105         };
 106
 107         SDR0: sdr {
 108                 compatible = "ibm,sdr-apm821xx";
 109                 dcr-reg = <0x00e 0x002>;
 110         };
 111
 112         CPR0: cpr {
 113                 compatible = "ibm,cpr-apm821xx";
 114                 dcr-reg = <0x00c 0x002>;
 115         };
 116
 117         L2C0: l2c {
 118                 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
 119                 dcr-reg = <0x020 0x008
 120                            0x030 0x008>;
 121                 cache-line-size = <32>;
 122                 cache-size = <262144>;
 123                 interrupt-parent = <&UIC1>;
 124                 interrupts = <11 1>;
 125         };
 126
 127         /* kph check the below */
 128         CPM0: cpm {
 129                 compatible = "ibm,cpm-apm821xx", "ibm,cpm";
 130                 cell-index = <0>;
 131                 dcr-reg = <0x160 0x003>;
 132                 pm-cpu = <0x02000000>;
 133                 pm-doze = <0x302570F0>;
 134                 pm-nap = <0x302570F0>;
 135                 pm-deepsleep = <0x302570F0>;
 136                 pm-iic-device = <&IIC0>;
 137                 pm-emac-device = <&EMAC0>;
 138         };
 139
 140         plb {
 141                 compatible = "ibm,plb4";
 142                 #address-cells = <2>;
 143                 #size-cells = <1>;
 144                 ranges;
 145                 clock-frequency = <0>; /* Filled in by U-Boot */
 146
 147                 SDRAM0: sdram {
 148                         compatible = "ibm,sdram-apm821xx";
 149                         dcr-reg = <0x010 0x002>;
 150                 };
 151
 152                 /* kph check the below */
 153                 CRYPTO: crypto@180000 {
 154                         compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
 155                         reg = <4 0x00180000 0x80400>;
 156                         interrupt-parent = <&UIC0>;
 157                         interrupts = <0x1d 0x4>;
 158                 };
 159
 160                 /* kph check the below */
 161                 PKA: pka@114000 {
 162                         device_type = "pka";
 163                         compatible = "ppc4xx-pka", "amcc,ppc4xx-pka";
 164                         reg = <4 0x00114000 0x4000>;
 165                         interrupt-parent = <&UIC0>;
 166                         interrupts = <0x14 0x2>;
 167                 };
 168
 169                 /* kph check the below */
 170                 TRNG: trng@110000 {
 171                         compatible = "ppc4xx-trng", "amcc,ppc460ex-rng";
 172                         reg = <4 0x00110000 0x50>;
 173                         interrupt-parent = <&UIC1>;
 174                         interrupts = <0x3 0x2>;
 175                 };
 176
 177                 MAL0: mcmal {
 178                         compatible = "ibm,mcmal2";
 179                         descriptor-memory = "ocm";
 180                         dcr-reg = <0x180 0x062>;
 181                         num-tx-chans = <1>;
 182                         num-rx-chans = <1>;
 183                         #address-cells = <0>;
 184                         #size-cells = <0>;
 185                         interrupt-parent = <&UIC2>;
 186                         interrupts = <  /*TXEOB*/ 0x6 0x4
 187                                         /*RXEOB*/ 0x7 0x4
 188                                         /*SERR*/  0x3 0x4
 189                                         /*TXDE*/  0x4 0x4
 190                                         /*RXDE*/  0x5 0x4>;
 191                 };
 192
 193                 POB0: opb {
 194                         compatible = "ibm,opb";
 195                         #address-cells = <1>;
 196                         #size-cells = <1>;
 197                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 198                         clock-frequency = <0>; /* Filled in by U-Boot */
 199
 200                         EBC0: ebc {
 201                                 compatible = "ibm,ebc";
 202                                 dcr-reg = <0x012 0x002>;
 203                                 #address-cells = <2>;
 204                                 #size-cells = <1>;
 205                                 clock-frequency = <0>; /* Filled in by U-Boot */
 206                                 /* ranges property is supplied by U-Boot */
 207                                 ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;
 208                                 interrupts = <0x6 0x4>;
 209                                 interrupt-parent = <&UIC1>;
 210
 211                                 /* Ikarem has 32MB of NAND */
 212                                 ndfc@1,0 {
 213                                         compatible = "ibm,ndfc";
 214                                         reg = <00000003 00000000 00000400>;
 215                                         ccr = <0x00001000>;
 216                                         bank-settings = <0x80002222>;
 217                                         #address-cells = <1>;
 218                                         #size-cells = <1>;
 219                                         /* 32 MiB NAND Flash */
 220                                         nand {
 221                                                 #address-cells = <1>;
 222                                                 #size-cells = <1>;
 223                                                 partition@0 {
 224                                                         label = "u-boot";
 225                                                         reg = <0x00000000 0x00170000>;
 226                                                         read-only;
 227                                                 };
 228                                                 partition@170000 {
 229                                                         label = "oops";
 230                                                         reg = <0x00170000 0x00010000>;
 231                                                 };
 232                                                 partition@180000 {
 233                                                         label = "ubi";
 234                                                         reg = <0x00180000 0x01e80000>;
 235                                                 };
 236                                         };
 237                                 };
 238                         };
 239
 240                         UART0: serial@ef600400 {
 241                                 device_type = "serial";
 242                                 compatible = "ns16550";
 243                                 reg = <0xef600400 0x00000008>;
 244                                 virtual-reg = <0xef600400>;
 245                                 clock-frequency = <0>; /* Filled in by U-Boot */
 246                                 current-speed = <0>; /* Filled in by U-Boot */
 247                                 interrupt-parent = <&UIC0>;
 248                                 interrupts = <0x1 0x4>;
 249                         };
 250
 251                         GPIO0: gpio@ef600b00 {
 252                                 compatible = "ibm,ppc4xx-gpio";
 253                                 reg = <0xef600b00 0x00000048>;
 254                                 #gpio-cells = <2>;
 255                                 gpio-controller;
 256                         };
 257
 258                         gpio-leds {
 259                                 compatible = "gpio-leds";
 260                                 power-green {
 261                                         label = "mr24:green:power";
 262                                         gpios = <&GPIO0 18 1>;
 263                                 };
 264                                 power-orange {
 265                                         label = "mr24:orange:power";
 266                                         gpios = <&GPIO0 19 1>;
 267                                 };
 268                                 lan {
 269                                         label = "mr24:green:wan";
 270                                         gpios = <&GPIO0 17 1>;
 271                                 };
 272                                 ssi-0 {
 273                                         label = "mr24:green:wifi1";
 274                                         gpios = <&GPIO0 23 1>;
 275                                 };
 276                                 ssi-1 {
 277                                         label = "mr24:green:wifi2";
 278                                         gpios = <&GPIO0 22 1>;
 279                                 };
 280                                 ssi-2 {
 281                                         label = "mr24:green:wifi3";
 282                                         gpios = <&GPIO0 21 1>;
 283                                 };
 284                                 ssi-3 {
 285                                         label = "mr24:green:wifi4";
 286                                         gpios = <&GPIO0 20 1>;
 287                                 };
 288                         };
 289
 290                         gpio_keys_polled {
 291                                 compatible = "gpio-keys-polled";
 292                                 #address-cells = <1>;
 293                                 #size-cells = <0>;
 294                                 poll-interval = <60>;   /* 3 * 20 = 60ms */
 295                                 autorepeat;
 296                                 button@1 {
 297                                         label = "Reset button";
 298                                         linux,code = <0x198>; /* KEY_RESTART */
 299                                         gpios = <&GPIO0 16 1>;
 300                                 };
 301                         };
 302
 303                         IIC0: i2c@ef600700 {
 304                                 compatible = "ibm,iic";
 305                                 reg = <0xef600700 0x00000014>;
 306                                 interrupt-parent = <&UIC0>;
 307                                 interrupts = <0x2 0x4>;
 308                                 #address-cells = <1>;
 309                                 #size-cells = <0>;
 310                                 /* Boot ROM is at 0x52-0x53, do not touch */
 311                                 /* Unknown chip at 0x6e, not sure what it is */
 312                         };
 313
 314                         IIC1: i2c@ef600800 {
 315                                 compatible = "ibm,iic";
 316                                 reg = <0xef600800 0x00000014>;
 317                                 interrupt-parent = <&UIC0>;
 318                                 interrupts = <0x3 0x4>;
 319                         };
 320
 321                         RGMII0: emac-rgmii@ef601500 {
 322                                 compatible = "ibm,rgmii";
 323                                 reg = <0xef601500 0x00000008>;
 324                                 has-mdio;
 325                         };
 326
 327                         TAH0: emac-tah@ef601350 {
 328                                 compatible = "ibm,tah";
 329                                 reg = <0xef601350 0x00000030>;
 330                         };
 331
 332                         EMAC0: ethernet@ef600c00 {
 333                                 device_type = "network";
 334                                 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
 335                                 interrupt-parent = <&EMAC0>;
 336                                 interrupts = <0x0 0x1>;
 337                                 #interrupt-cells = <1>;
 338                                 #address-cells = <0>;
 339                                 #size-cells = <0>;
 340                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
 341                                                  /*Wake*/   0x1 &UIC2 0x14 0x4>;
 342                                 reg = <0xef600c00 0x000000c4>;
 343                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 344                                 mal-device = <&MAL0>;
 345                                 mal-tx-channel = <0>;
 346                                 mal-rx-channel = <0>;
 347                                 cell-index = <0>;
 348                                 max-frame-size = <9000>;
 349                                 rx-fifo-size = <16384>;
 350                                 tx-fifo-size = <2048>;
 351                                 phy-mode = "rgmii";
 352                                 phy-map = <0x00000000>;
 353                                 rgmii-device = <&RGMII0>;
 354                                 rgmii-channel = <0>;
 355                                 tah-device = <&TAH0>;
 356                                 tah-channel = <0>;
 357                                 has-inverted-stacr-oc;
 358                                 has-new-stacr-staopc;
 359                         };
 360                 };
 361
 362                 PCIE0: pciex@d00000000 {
 363                         device_type = "pci";
 364                         #interrupt-cells = <1>;
 365                         #size-cells = <2>;
 366                         #address-cells = <3>;
 367                         compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
 368                         primary;
 369                         port = <0x0>; /* port number */
 370                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 371                                0x0000000c 0x08010000 0x00001000>;       /* Registers */
 372                         dcr-reg = <0x100 0x020>;
 373                         sdr-base = <0x300>;
 374
 375                         /* Outbound ranges, one memory and one IO,
 376                          * later cannot be changed
 377                          */
 378                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 379                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
 380                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 381
 382                         /* Inbound 2GB range starting at 0 */
 383                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 384
 385                         /* This drives busses 40 to 0x7f */
 386                         bus-range = <0x40 0x7f>;
 387
 388                         /* Legacy interrupts (note the weird polarity, the bridge seems
 389                          * to invert PCIe legacy interrupts).
 390                          * We are de-swizzling here because the numbers are actually for
 391                          * port of the root complex virtual P2P bridge. But I want
 392                          * to avoid putting a node for it in the tree, so the numbers
 393                          * below are basically de-swizzled numbers.
 394                          * The real slot is on idsel 0, so the swizzling is 1:1
 395                          */
 396                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 397                         interrupt-map = <
 398                                 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
 399                                 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
 400                                 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
 401                                 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
 402                 };
 403
 404                 MSI: ppc4xx-msi@C10000000 {
 405                         compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
 406                         reg = < 0xC 0x10000000 0x100
 407                                 0xC 0x10000000 0x100>;
 408                         sdr-base = <0x36C>;
 409                         msi-data = <0x00004440>;
 410                         msi-mask = <0x0000ffe0>;
 411                         interrupts =<0 1 2 3 4 5 6 7>;
 412                         interrupt-parent = <&MSI>;
 413                         #interrupt-cells = <1>;
 414                         #address-cells = <0>;
 415                         #size-cells = <0>;
 416                         msi-available-ranges = <0x0 0x100>;
 417                         interrupt-map = <
 418                                 0 &UIC3 0x18 1
 419                                 1 &UIC3 0x19 1
 420                                 2 &UIC3 0x1A 1
 421                                 3 &UIC3 0x1B 1
 422                                 4 &UIC3 0x1C 1
 423                                 5 &UIC3 0x1D 1
 424                                 6 &UIC3 0x1E 1
 425                                 7 &UIC3 0x1F 1
 426                         >;
 427                 };
 428         };
 429
 430         chosen {
 431                 linux,stdout-path = "/plb/opb/serial@ef600400";
 432         };
 433 };