target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Mikrotik RouterBOARD 1xx series
   5  *
   6  *  Copyright (C) 2007-2008 OpenWrt.org
   7  *  Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
   8  *
   9  *  NAND initialization code was based on a driver for Linux 2.6.19+ which
  10  *  was derived from the driver for Linux 2.4.xx published by Mikrotik for
  11  *  their RouterBoard 1xx and 5xx series boards.
  12  *    Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
  13  *    Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
  14  *    The original Mikrotik code seems not to have a license.
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License version 2 as published
  18  *  by the Free Software Foundation.
  19  *
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/init.h>
  24 #include <linux/delay.h>
  25
  26 #include <asm/bootinfo.h>
  27 #include <asm/gpio.h>
  28
  29 #include <adm5120_defs.h>
  30 #include <adm5120_irq.h>
  31 #include <adm5120_nand.h>
  32 #include <adm5120_board.h>
  33 #include <adm5120_platform.h>
  34 #include <adm5120_info.h>
  35
  36 #include <prom/routerboot.h>
  37
  38 #define RB1XX_NAND_CHIP_DELAY   25
  39
  40 #define RB150_NAND_BASE         0x1FC80000
  41 #define RB150_NAND_SIZE         1
  42
  43 #define RB150_GPIO_NAND_READY   ADM5120_GPIO_PIN0
  44 #define RB150_GPIO_NAND_NCE     ADM5120_GPIO_PIN1
  45 #define RB150_GPIO_NAND_CLE     ADM5120_GPIO_P2L2
  46 #define RB150_GPIO_NAND_ALE     ADM5120_GPIO_P3L2
  47 #define RB150_GPIO_DEV_MASK     ( 1 << RB150_GPIO_NAND_READY    \
  48                                 | 1 << RB150_GPIO_NAND_NCE      \
  49                                 | 1 << RB150_GPIO_NAND_CLE      \
  50                                 | 1 << RB150_GPIO_NAND_ALE)
  51
  52 #define RB150_NAND_DELAY        100
  53
  54 #define RB150_NAND_WRITE(v) \
  55         writeb((v), (void __iomem *)KSEG1ADDR(RB150_NAND_BASE))
  56
  57 #define RB153_GPIO_DEV_MASK     ( 1 << ADM5120_GPIO_PIN0 \
  58                                 | 1 << ADM5120_GPIO_PIN3 \
  59                                 | 1 << ADM5120_GPIO_PIN4 )
  60
  61 /*--------------------------------------------------------------------------*/
  62
  63 static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = {
  64         PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0),
  65         PCIIRQ(2, 0, 1, ADM5120_IRQ_PCI1),
  66         PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2)
  67 };
  68
  69 static struct mtd_partition rb1xx_nor_parts[] = {
  70         {
  71                 .name   = "booter",
  72                 .offset = 0,
  73                 .size   = 64*1024,
  74                 .mask_flags = MTD_WRITEABLE,
  75         } , {
  76                 .name   = "firmware",
  77                 .offset = MTDPART_OFS_APPEND,
  78                 .size   = MTDPART_SIZ_FULL,
  79         }
  80 };
  81
  82 static struct mtd_partition rb1xx_nand_parts[] = {
  83         {
  84                 .name   = "kernel",
  85                 .offset = 0,
  86                 .size   = 4 * 1024 * 1024,
  87         } , {
  88                 .name   = "rootfs",
  89                 .offset = MTDPART_OFS_NXTBLK,
  90                 .size   = MTDPART_SIZ_FULL
  91         }
  92 };
  93
  94 static struct platform_device *rb1xx_devices[] __initdata = {
  95         &adm5120_flash0_device,
  96         &adm5120_nand_device,
  97         &adm5120_buttons_device,
  98 };
  99
 100 /*
 101  * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
 102  * will not be able to find the kernel that we load.  So set the oobinfo
 103  * when creating the partitions
 104  */
 105 static struct nand_ecclayout rb1xx_nand_ecclayout = {
 106         .eccbytes       = 6,
 107         .eccpos         = { 8, 9, 10, 13, 14, 15 },
 108         .oobavail       = 9,
 109         .oobfree        = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
 110 };
 111
 112 static struct resource rb150_nand_resource[] = {
 113         [0] = {
 114                 .start  = RB150_NAND_BASE,
 115                 .end    = RB150_NAND_BASE + RB150_NAND_SIZE-1,
 116                 .flags  = IORESOURCE_MEM,
 117         },
 118 };
 119
 120 static struct resource rb153_cf_resources[] = {
 121         {
 122                 .name   = "cf_membase",
 123                 .start  = ADM5120_EXTIO1_BASE,
 124                 .end    = ADM5120_EXTIO1_BASE + ADM5120_EXTIO1_SIZE-1 ,
 125                 .flags  = IORESOURCE_MEM
 126         }, {
 127                 .name   = "cf_irq",
 128                 .start  = ADM5120_IRQ_GPIO4,
 129                 .end    = ADM5120_IRQ_GPIO4,
 130                 .flags  = IORESOURCE_IRQ
 131         }
 132 };
 133
 134 static struct platform_device rb153_cf_device = {
 135         .name           = "pata-rb153-cf",
 136         .id             = -1,
 137         .resource       = rb153_cf_resources,
 138         .num_resources  = ARRAY_SIZE(rb153_cf_resources),
 139 };
 140
 141 static struct platform_device *rb153_devices[] __initdata = {
 142         &adm5120_flash0_device,
 143         &adm5120_nand_device,
 144         &adm5120_buttons_device,
 145         &rb153_cf_device,
 146 };
 147
 148 #if 0
 149 /*
 150  * RB1xx boards have bad network performance with the default VLAN matrixes.
 151  * Disable it while the ethernet driver gets fixed.
 152  */
 153 static unsigned char rb11x_vlans[6] __initdata = {
 154         /* FIXME: untested */
 155         0x41, 0x00, 0x00, 0x00, 0x00, 0x00
 156 };
 157
 158 static unsigned char rb133_vlans[6] __initdata = {
 159         /* FIXME: untested */
 160         0x44, 0x42, 0x41, 0x00, 0x00, 0x00
 161 };
 162
 163 static unsigned char rb133c_vlans[6] __initdata = {
 164         /* FIXME: untested */
 165         0x44, 0x00, 0x00, 0x00, 0x00, 0x00
 166 };
 167
 168 static unsigned char rb15x_vlans[6] __initdata = {
 169         /* FIXME: untested */
 170         0x41, 0x42, 0x44, 0x48, 0x50, 0x00
 171 };
 172
 173 static unsigned char rb192_vlans[6] __initdata = {
 174         /* FIXME: untested */
 175         0x41, 0x50, 0x48, 0x44, 0x42, 0x00
 176 };
 177 #else
 178 static unsigned char rb_vlans[6] __initdata = {
 179         0x7F, 0x00, 0x00, 0x00, 0x00, 0x00
 180 };
 181 #define rb11x_vlans     rb_vlans
 182 #define rb133_vlans     rb_vlans
 183 #define rb133c_vlans    rb_vlans
 184 #define rb15x_vlans     rb_vlans
 185 #define rb192_vlans     rb_vlans
 186 #endif
 187
 188 /*--------------------------------------------------------------------------*/
 189
 190 static int rb150_nand_ready(struct mtd_info *mtd)
 191 {
 192         return gpio_get_value(RB150_GPIO_NAND_READY);
 193 }
 194
 195 static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 196                 unsigned int ctrl)
 197 {
 198         if (ctrl & NAND_CTRL_CHANGE) {
 199                 gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0);
 200                 gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0);
 201                 gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1);
 202         }
 203
 204         udelay(RB150_NAND_DELAY);
 205
 206         if (cmd != NAND_CMD_NONE)
 207                 RB150_NAND_WRITE(cmd);
 208 }
 209
 210 /*--------------------------------------------------------------------------*/
 211
 212 static void __init rb1xx_mac_setup(void)
 213 {
 214         int i, j;
 215
 216         if (!rb_hs.mac_base)
 217                 return;
 218
 219         for (i = 0; i < 6; i++) {
 220                 for (j = 0; j < 5; j++)
 221                         adm5120_eth_macs[i][j] = rb_hs.mac_base[j];
 222                 adm5120_eth_macs[i][5] = rb_hs.mac_base[5]+i;
 223         }
 224 }
 225
 226 static int rb1xx_nand_fixup(struct mtd_info *mtd)
 227 {
 228         struct nand_chip *chip = mtd->priv;
 229
 230         if (mtd->writesize == 512)
 231                 chip->ecc.layout = &rb1xx_nand_ecclayout;
 232
 233         return 0;
 234 }
 235
 236 static void __init rb1xx_flash_setup(void)
 237 {
 238         /* setup data for flash0 device */
 239         adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_parts);
 240         adm5120_flash0_data.parts = rb1xx_nor_parts;
 241
 242         /* setup data for NAND device */
 243         adm5120_nand_data.chip.nr_chips = 1;
 244         adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_parts);
 245         adm5120_nand_data.chip.partitions = rb1xx_nand_parts;
 246         adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY;
 247         adm5120_nand_data.chip.options = NAND_NO_AUTOINCR;
 248
 249         adm5120_nand_data.chip.chip_fixup = &rb1xx_nand_fixup;
 250 }
 251
 252 static void __init rb1xx_setup(void)
 253 {
 254         /* enable NAND flash interface */
 255         adm5120_nand_enable();
 256
 257         /* initialize NAND chip */
 258         adm5120_nand_set_spn(1);
 259         adm5120_nand_set_wpn(0);
 260
 261         adm5120_buttons_data.nbuttons = 1;
 262         adm5120_buttons[0].desc = "reset button";
 263         adm5120_buttons[0].gpio = ADM5120_GPIO_PIN7;
 264
 265         rb1xx_flash_setup();
 266         rb1xx_mac_setup();
 267 }
 268
 269 static void __init rb150_setup(void)
 270 {
 271         /* setup GPIO pins for NAND flash chip */
 272         gpio_request(RB150_GPIO_NAND_READY, "nand-ready");
 273         gpio_direction_input(RB150_GPIO_NAND_READY);
 274         gpio_request(RB150_GPIO_NAND_NCE, "nand-nce");
 275         gpio_direction_output(RB150_GPIO_NAND_NCE, 1);
 276         gpio_request(RB150_GPIO_NAND_CLE, "nand-cle");
 277         gpio_direction_output(RB150_GPIO_NAND_CLE, 0);
 278         gpio_request(RB150_GPIO_NAND_ALE, "nand-ale");
 279         gpio_direction_output(RB150_GPIO_NAND_ALE, 0);
 280
 281         adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource);
 282         adm5120_nand_device.resource = rb150_nand_resource;
 283         adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl;
 284         adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready;
 285
 286         adm5120_buttons_data.nbuttons = 1;
 287         adm5120_buttons[0].desc = "reset button";
 288         adm5120_buttons[0].gpio = ADM5120_GPIO_PIN1; /* FIXME: valid? */
 289
 290         adm5120_gpiodev_resource.start &= ~RB150_GPIO_DEV_MASK;
 291
 292         adm5120_flash0_data.window_size = 512*1024;
 293
 294         rb1xx_flash_setup();
 295         rb1xx_mac_setup();
 296 }
 297
 298 static void __init rb153_setup(void)
 299 {
 300         /* enable CSX1:INTX1 on GPIO[3:4] for the CF slot */
 301         adm5120_gpio_csx1_enable();
 302         /* enable the wait state pin GPIO[0] for external I/O control */
 303         adm5120_gpio_ew_enable();
 304
 305         rb1xx_setup();
 306
 307         adm5120_gpiodev_resource.start &= ~RB153_GPIO_DEV_MASK;
 308 }
 309
 310 /*--------------------------------------------------------------------------*/
 311
 312 ADM5120_BOARD_START(RB_111, "Mikrotik RouterBOARD 111")
 313         .board_setup    = rb1xx_setup,
 314         .eth_num_ports  = 1,
 315         .eth_vlans      = rb11x_vlans,
 316         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 317         .devices        = rb1xx_devices,
 318         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 319         .pci_irq_map    = rb1xx_pci_irqs,
 320 ADM5120_BOARD_END
 321
 322 ADM5120_BOARD_START(RB_112, "Mikrotik RouterBOARD 112")
 323         .board_setup    = rb1xx_setup,
 324         .eth_num_ports  = 1,
 325         .eth_vlans      = rb11x_vlans,
 326         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 327         .devices        = rb1xx_devices,
 328         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 329         .pci_irq_map    = rb1xx_pci_irqs,
 330 ADM5120_BOARD_END
 331
 332 ADM5120_BOARD_START(RB_133, "Mikrotik RouterBOARD 133")
 333         .board_setup    = rb1xx_setup,
 334         .eth_num_ports  = 3,
 335         .eth_vlans      = rb133_vlans,
 336         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 337         .devices        = rb1xx_devices,
 338         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 339         .pci_irq_map    = rb1xx_pci_irqs,
 340 ADM5120_BOARD_END
 341
 342 ADM5120_BOARD_START(RB_133C, "Mikrotik RouterBOARD 133C")
 343         .board_setup    = rb1xx_setup,
 344         .eth_num_ports  = 1,
 345         .eth_vlans      = rb133c_vlans,
 346         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 347         .devices        = rb1xx_devices,
 348         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 349         .pci_irq_map    = rb1xx_pci_irqs,
 350 ADM5120_BOARD_END
 351
 352 ADM5120_BOARD_START(RB_150, "Mikrotik RouterBOARD 150")
 353         .board_setup    = rb150_setup,
 354         .eth_num_ports  = 5,
 355         .eth_vlans      = rb15x_vlans,
 356         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 357         .devices        = rb1xx_devices,
 358 ADM5120_BOARD_END
 359
 360 ADM5120_BOARD_START(RB_153, "Mikrotik RouterBOARD 153")
 361         .board_setup    = rb153_setup,
 362         .eth_num_ports  = 5,
 363         .eth_vlans      = rb15x_vlans,
 364         .num_devices    = ARRAY_SIZE(rb153_devices),
 365         .devices        = rb153_devices,
 366         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 367         .pci_irq_map    = rb1xx_pci_irqs,
 368 ADM5120_BOARD_END
 369
 370 ADM5120_BOARD_START(RB_192, "Mikrotik RouterBOARD 192")
 371         .board_setup    = rb1xx_setup,
 372         .eth_num_ports  = 5,
 373         .eth_vlans      = rb192_vlans,
 374         .num_devices    = ARRAY_SIZE(rb1xx_devices),
 375         .devices        = rb1xx_devices,
 376         .pci_nr_irqs    = ARRAY_SIZE(rb1xx_pci_irqs),
 377         .pci_irq_map    = rb1xx_pci_irqs,
 378 ADM5120_BOARD_END