1 // SPDX-License-Identifier: GPL-2.0-only
3 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
6 * Copyright (C) 2015 Intel Corp
7 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
8 * Jeeja KP <jeeja.kp@intel.com>
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 #include <linux/slab.h>
13 #include <linux/pci.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <uapi/sound/skl-tplg-interface.h>
17 #include "skl-sst-dsp.h"
18 #include "cnl-sst-dsp.h"
19 #include "skl-sst-ipc.h"
21 #include "../common/sst-dsp.h"
22 #include "../common/sst-dsp-priv.h"
23 #include "skl-topology.h"
25 static int skl_alloc_dma_buf(struct device *dev,
26 struct snd_dma_buffer *dmab, size_t size)
28 struct hdac_bus *bus = dev_get_drvdata(dev);
33 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
36 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
38 struct hdac_bus *bus = dev_get_drvdata(dev);
43 bus->io_ops->dma_free_pages(bus, dmab);
48 #define SKL_ASTATE_PARAM_ID 4
50 void skl_dsp_set_astate_cfg(struct skl_sst *ctx, u32 cnt, void *data)
52 struct skl_ipc_large_config_msg msg = {0};
54 msg.large_param_id = SKL_ASTATE_PARAM_ID;
55 msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
58 skl_ipc_set_large_config(&ctx->ipc, &msg, data);
61 #define NOTIFICATION_PARAM_ID 3
62 #define NOTIFICATION_MASK 0xf
64 /* disable notfication for underruns/overruns from firmware module */
65 void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable)
67 struct notification_mask mask;
68 struct skl_ipc_large_config_msg msg = {0};
70 mask.notify = NOTIFICATION_MASK;
73 msg.large_param_id = NOTIFICATION_PARAM_ID;
74 msg.param_data_size = sizeof(mask);
76 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
79 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
80 int stream_tag, int enable)
82 struct hdac_bus *bus = dev_get_drvdata(dev);
83 struct hdac_stream *stream = snd_hdac_get_stream(bus,
84 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
85 struct hdac_ext_stream *estream;
90 estream = stream_to_hdac_ext_stream(stream);
91 /* enable/disable SPIB for this hdac stream */
92 snd_hdac_ext_stream_spbcap_enable(bus, enable, stream->index);
94 /* set the spib value */
95 snd_hdac_ext_stream_set_spib(bus, estream, size);
100 static int skl_dsp_prepare(struct device *dev, unsigned int format,
101 unsigned int size, struct snd_dma_buffer *dmab)
103 struct hdac_bus *bus = dev_get_drvdata(dev);
104 struct hdac_ext_stream *estream;
105 struct hdac_stream *stream;
106 struct snd_pcm_substream substream;
112 memset(&substream, 0, sizeof(substream));
113 substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
115 estream = snd_hdac_ext_stream_assign(bus, &substream,
116 HDAC_EXT_STREAM_TYPE_HOST);
120 stream = hdac_stream(estream);
122 /* assign decouple host dma channel */
123 ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
127 skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
129 return stream->stream_tag;
132 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
134 struct hdac_bus *bus = dev_get_drvdata(dev);
135 struct hdac_stream *stream;
140 stream = snd_hdac_get_stream(bus,
141 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
145 snd_hdac_dsp_trigger(stream, start);
150 static int skl_dsp_cleanup(struct device *dev,
151 struct snd_dma_buffer *dmab, int stream_tag)
153 struct hdac_bus *bus = dev_get_drvdata(dev);
154 struct hdac_stream *stream;
155 struct hdac_ext_stream *estream;
160 stream = snd_hdac_get_stream(bus,
161 SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
165 estream = stream_to_hdac_ext_stream(stream);
166 skl_dsp_setup_spib(dev, 0, stream_tag, false);
167 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
169 snd_hdac_dsp_cleanup(stream, dmab);
174 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
176 struct skl_dsp_loader_ops loader_ops;
178 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
180 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
181 loader_ops.free_dma_buf = skl_free_dma_buf;
186 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
188 struct skl_dsp_loader_ops loader_ops;
190 memset(&loader_ops, 0, sizeof(loader_ops));
192 loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
193 loader_ops.free_dma_buf = skl_free_dma_buf;
194 loader_ops.prepare = skl_dsp_prepare;
195 loader_ops.trigger = skl_dsp_trigger;
196 loader_ops.cleanup = skl_dsp_cleanup;
201 static const struct skl_dsp_ops dsp_ops[] = {
205 .loader_ops = skl_get_loader_ops,
206 .init = skl_sst_dsp_init,
207 .init_fw = skl_sst_init_fw,
208 .cleanup = skl_sst_dsp_cleanup
213 .loader_ops = skl_get_loader_ops,
214 .init = skl_sst_dsp_init,
215 .init_fw = skl_sst_init_fw,
216 .cleanup = skl_sst_dsp_cleanup
221 .loader_ops = bxt_get_loader_ops,
222 .init = bxt_sst_dsp_init,
223 .init_fw = bxt_sst_init_fw,
224 .cleanup = bxt_sst_dsp_cleanup
229 .loader_ops = bxt_get_loader_ops,
230 .init = bxt_sst_dsp_init,
231 .init_fw = bxt_sst_init_fw,
232 .cleanup = bxt_sst_dsp_cleanup
237 .loader_ops = bxt_get_loader_ops,
238 .init = cnl_sst_dsp_init,
239 .init_fw = cnl_sst_init_fw,
240 .cleanup = cnl_sst_dsp_cleanup
245 .loader_ops = bxt_get_loader_ops,
246 .init = cnl_sst_dsp_init,
247 .init_fw = cnl_sst_init_fw,
248 .cleanup = cnl_sst_dsp_cleanup
253 .loader_ops = bxt_get_loader_ops,
254 .init = cnl_sst_dsp_init,
255 .init_fw = cnl_sst_init_fw,
256 .cleanup = cnl_sst_dsp_cleanup
261 .loader_ops = bxt_get_loader_ops,
262 .init = cnl_sst_dsp_init,
263 .init_fw = cnl_sst_init_fw,
264 .cleanup = cnl_sst_dsp_cleanup
268 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
272 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
273 if (dsp_ops[i].id == pci_id)
280 int skl_init_dsp(struct skl *skl)
282 void __iomem *mmio_base;
283 struct hdac_bus *bus = skl_to_bus(skl);
284 struct skl_dsp_loader_ops loader_ops;
286 const struct skl_dsp_ops *ops;
287 struct skl_dsp_cores *cores;
290 /* enable ppcap interrupt */
291 snd_hdac_ext_bus_ppcap_enable(bus, true);
292 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
294 /* read the BAR of the ADSP MMIO */
295 mmio_base = pci_ioremap_bar(skl->pci, 4);
296 if (mmio_base == NULL) {
297 dev_err(bus->dev, "ioremap error\n");
301 ops = skl_get_dsp_ops(skl->pci->device);
307 loader_ops = ops->loader_ops();
308 ret = ops->init(bus->dev, mmio_base, irq,
309 skl->fw_name, loader_ops,
315 skl->skl_sst->dsp_ops = ops;
316 cores = &skl->skl_sst->cores;
317 cores->count = ops->num_cores;
319 cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
325 cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
327 if (!cores->usage_count) {
329 goto free_core_state;
332 dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
345 int skl_free_dsp(struct skl *skl)
347 struct hdac_bus *bus = skl_to_bus(skl);
348 struct skl_sst *ctx = skl->skl_sst;
350 /* disable ppcap interrupt */
351 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
353 ctx->dsp_ops->cleanup(bus->dev, ctx);
355 kfree(ctx->cores.state);
356 kfree(ctx->cores.usage_count);
358 if (ctx->dsp->addr.lpe)
359 iounmap(ctx->dsp->addr.lpe);
365 * In the case of "suspend_active" i.e, the Audio IP being active
366 * during system suspend, immediately excecute any pending D0i3 work
367 * before suspending. This is needed for the IP to work in low power
368 * mode during system suspend. In the case of normal suspend, cancel
369 * any pending D0i3 work.
371 int skl_suspend_late_dsp(struct skl *skl)
373 struct skl_sst *ctx = skl->skl_sst;
374 struct delayed_work *dwork;
379 dwork = &ctx->d0i3.work;
381 if (dwork->work.func) {
382 if (skl->supend_active)
383 flush_delayed_work(dwork);
385 cancel_delayed_work_sync(dwork);
391 int skl_suspend_dsp(struct skl *skl)
393 struct skl_sst *ctx = skl->skl_sst;
394 struct hdac_bus *bus = skl_to_bus(skl);
397 /* if ppcap is not supported return 0 */
401 ret = skl_dsp_sleep(ctx->dsp);
405 /* disable ppcap interrupt */
406 snd_hdac_ext_bus_ppcap_int_enable(bus, false);
407 snd_hdac_ext_bus_ppcap_enable(bus, false);
412 int skl_resume_dsp(struct skl *skl)
414 struct skl_sst *ctx = skl->skl_sst;
415 struct hdac_bus *bus = skl_to_bus(skl);
418 /* if ppcap is not supported return 0 */
422 /* enable ppcap interrupt */
423 snd_hdac_ext_bus_ppcap_enable(bus, true);
424 snd_hdac_ext_bus_ppcap_int_enable(bus, true);
426 /* check if DSP 1st boot is done */
427 if (skl->skl_sst->is_first_boot)
431 * Disable dynamic clock and power gating during firmware
432 * and library download
434 ctx->enable_miscbdcge(ctx->dev, false);
435 ctx->clock_power_gating(ctx->dev, false);
437 ret = skl_dsp_wake(ctx->dsp);
438 ctx->enable_miscbdcge(ctx->dev, true);
439 ctx->clock_power_gating(ctx->dev, true);
443 skl_dsp_enable_notification(skl->skl_sst, false);
445 if (skl->cfg.astate_cfg != NULL) {
446 skl_dsp_set_astate_cfg(skl->skl_sst, skl->cfg.astate_cfg->count,
447 skl->cfg.astate_cfg);
452 enum skl_bitdepth skl_get_bit_depth(int params)
456 return SKL_DEPTH_8BIT;
459 return SKL_DEPTH_16BIT;
462 return SKL_DEPTH_24BIT;
465 return SKL_DEPTH_32BIT;
468 return SKL_DEPTH_INVALID;
474 * Each module in DSP expects a base module configuration, which consists of
475 * PCM format information, which we calculate in driver and resource values
476 * which are read from widget information passed through topology binary
477 * This is send when we create a module with INIT_INSTANCE IPC msg
479 static void skl_set_base_module_format(struct skl_sst *ctx,
480 struct skl_module_cfg *mconfig,
481 struct skl_base_cfg *base_cfg)
483 struct skl_module *module = mconfig->module;
484 struct skl_module_res *res = &module->resources[mconfig->res_idx];
485 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
486 struct skl_module_fmt *format = &fmt->inputs[0].fmt;
488 base_cfg->audio_fmt.number_of_channels = format->channels;
490 base_cfg->audio_fmt.s_freq = format->s_freq;
491 base_cfg->audio_fmt.bit_depth = format->bit_depth;
492 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
493 base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
494 base_cfg->audio_fmt.sample_type = format->sample_type;
496 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
497 format->bit_depth, format->valid_bit_depth,
500 base_cfg->audio_fmt.channel_map = format->ch_map;
502 base_cfg->audio_fmt.interleaving = format->interleaving_style;
504 base_cfg->cps = res->cps;
505 base_cfg->ibs = res->ibs;
506 base_cfg->obs = res->obs;
507 base_cfg->is_pages = res->is_pages;
511 * Copies copier capabilities into copier module and updates copier module
514 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
515 struct skl_cpr_cfg *cpr_mconfig)
517 if (mconfig->formats_config.caps_size == 0)
520 memcpy(cpr_mconfig->gtw_cfg.config_data,
521 mconfig->formats_config.caps,
522 mconfig->formats_config.caps_size);
524 cpr_mconfig->gtw_cfg.config_length =
525 (mconfig->formats_config.caps_size) / 4;
528 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
530 * Calculate the gatewat settings required for copier module, type of
531 * gateway and index of gateway to use
533 static u32 skl_get_node_id(struct skl_sst *ctx,
534 struct skl_module_cfg *mconfig)
536 union skl_connector_node_id node_id = {0};
537 union skl_ssp_dma_node ssp_node = {0};
538 struct skl_pipe_params *params = mconfig->pipe->p_params;
540 switch (mconfig->dev_type) {
542 node_id.node.dma_type =
543 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
544 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
545 SKL_DMA_I2S_LINK_INPUT_CLASS;
546 node_id.node.vindex = params->host_dma_id +
547 (mconfig->vbus_id << 3);
551 node_id.node.dma_type =
552 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
553 SKL_DMA_I2S_LINK_OUTPUT_CLASS :
554 SKL_DMA_I2S_LINK_INPUT_CLASS;
555 ssp_node.dma_node.time_slot_index = mconfig->time_slot;
556 ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
557 node_id.node.vindex = ssp_node.val;
560 case SKL_DEVICE_DMIC:
561 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
562 node_id.node.vindex = mconfig->vbus_id +
563 (mconfig->time_slot);
566 case SKL_DEVICE_HDALINK:
567 node_id.node.dma_type =
568 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
569 SKL_DMA_HDA_LINK_OUTPUT_CLASS :
570 SKL_DMA_HDA_LINK_INPUT_CLASS;
571 node_id.node.vindex = params->link_dma_id;
574 case SKL_DEVICE_HDAHOST:
575 node_id.node.dma_type =
576 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
577 SKL_DMA_HDA_HOST_OUTPUT_CLASS :
578 SKL_DMA_HDA_HOST_INPUT_CLASS;
579 node_id.node.vindex = params->host_dma_id;
583 node_id.val = 0xFFFFFFFF;
590 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
591 struct skl_module_cfg *mconfig,
592 struct skl_cpr_cfg *cpr_mconfig)
595 struct skl_module_res *res;
596 int res_idx = mconfig->res_idx;
597 struct skl *skl = get_skl_ctx(ctx->dev);
599 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig);
601 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
602 cpr_mconfig->cpr_feature_mask = 0;
606 if (skl->nr_modules) {
607 res = &mconfig->module->resources[mconfig->res_idx];
608 cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
609 goto skip_buf_size_calc;
611 res = &mconfig->module->resources[res_idx];
614 switch (mconfig->hw_conn_type) {
615 case SKL_CONN_SOURCE:
616 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
617 dma_io_buf = res->ibs;
619 dma_io_buf = res->obs;
623 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
624 dma_io_buf = res->obs;
626 dma_io_buf = res->ibs;
630 dev_warn(ctx->dev, "wrong connection type: %d\n",
631 mconfig->hw_conn_type);
635 cpr_mconfig->gtw_cfg.dma_buffer_size =
636 mconfig->dma_buffer_size * dma_io_buf;
638 /* fallback to 2ms default value */
639 if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
640 if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
641 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
643 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
647 cpr_mconfig->cpr_feature_mask = 0;
648 cpr_mconfig->gtw_cfg.config_length = 0;
650 skl_copy_copier_caps(mconfig, cpr_mconfig);
653 #define DMA_CONTROL_ID 5
654 #define DMA_I2S_BLOB_SIZE 21
656 int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
657 u32 caps_size, u32 node_id)
659 struct skl_dma_control *dma_ctrl;
660 struct skl_ipc_large_config_msg msg = {0};
665 * if blob size zero, then return
670 msg.large_param_id = DMA_CONTROL_ID;
671 msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
673 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
674 if (dma_ctrl == NULL)
677 dma_ctrl->node_id = node_id;
680 * NHLT blob may contain additional configs along with i2s blob.
681 * firmware expects only the i2s blob size as the config_length.
682 * So fix to i2s blob size.
685 dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
687 memcpy(dma_ctrl->config_data, caps, caps_size);
689 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl);
694 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control);
696 static void skl_setup_out_format(struct skl_sst *ctx,
697 struct skl_module_cfg *mconfig,
698 struct skl_audio_data_format *out_fmt)
700 struct skl_module *module = mconfig->module;
701 struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
702 struct skl_module_fmt *format = &fmt->outputs[0].fmt;
704 out_fmt->number_of_channels = (u8)format->channels;
705 out_fmt->s_freq = format->s_freq;
706 out_fmt->bit_depth = format->bit_depth;
707 out_fmt->valid_bit_depth = format->valid_bit_depth;
708 out_fmt->ch_cfg = format->ch_cfg;
710 out_fmt->channel_map = format->ch_map;
711 out_fmt->interleaving = format->interleaving_style;
712 out_fmt->sample_type = format->sample_type;
714 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
715 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
719 * DSP needs SRC module for frequency conversion, SRC takes base module
720 * configuration and the target frequency as extra parameter passed as src
723 static void skl_set_src_format(struct skl_sst *ctx,
724 struct skl_module_cfg *mconfig,
725 struct skl_src_module_cfg *src_mconfig)
727 struct skl_module *module = mconfig->module;
728 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
729 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
731 skl_set_base_module_format(ctx, mconfig,
732 (struct skl_base_cfg *)src_mconfig);
734 src_mconfig->src_cfg = fmt->s_freq;
738 * DSP needs updown module to do channel conversion. updown module take base
739 * module configuration and channel configuration
740 * It also take coefficients and now we have defaults applied here
742 static void skl_set_updown_mixer_format(struct skl_sst *ctx,
743 struct skl_module_cfg *mconfig,
744 struct skl_up_down_mixer_cfg *mixer_mconfig)
746 struct skl_module *module = mconfig->module;
747 struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
748 struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
750 skl_set_base_module_format(ctx, mconfig,
751 (struct skl_base_cfg *)mixer_mconfig);
752 mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
753 mixer_mconfig->ch_map = fmt->ch_map;
757 * 'copier' is DSP internal module which copies data from Host DMA (HDA host
758 * dma) or link (hda link, SSP, PDM)
759 * Here we calculate the copier module parameters, like PCM format, output
760 * format, gateway settings
761 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
763 static void skl_set_copier_format(struct skl_sst *ctx,
764 struct skl_module_cfg *mconfig,
765 struct skl_cpr_cfg *cpr_mconfig)
767 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
768 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
770 skl_set_base_module_format(ctx, mconfig, base_cfg);
772 skl_setup_out_format(ctx, mconfig, out_fmt);
773 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
777 * Algo module are DSP pre processing modules. Algo module take base module
778 * configuration and params
781 static void skl_set_algo_format(struct skl_sst *ctx,
782 struct skl_module_cfg *mconfig,
783 struct skl_algo_cfg *algo_mcfg)
785 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
787 skl_set_base_module_format(ctx, mconfig, base_cfg);
789 if (mconfig->formats_config.caps_size == 0)
792 memcpy(algo_mcfg->params,
793 mconfig->formats_config.caps,
794 mconfig->formats_config.caps_size);
799 * Mic select module allows selecting one or many input channels, thus
802 * Mic select module take base module configuration and out-format
805 static void skl_set_base_outfmt_format(struct skl_sst *ctx,
806 struct skl_module_cfg *mconfig,
807 struct skl_base_outfmt_cfg *base_outfmt_mcfg)
809 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
810 struct skl_base_cfg *base_cfg =
811 (struct skl_base_cfg *)base_outfmt_mcfg;
813 skl_set_base_module_format(ctx, mconfig, base_cfg);
814 skl_setup_out_format(ctx, mconfig, out_fmt);
817 static u16 skl_get_module_param_size(struct skl_sst *ctx,
818 struct skl_module_cfg *mconfig)
822 switch (mconfig->m_type) {
823 case SKL_MODULE_TYPE_COPIER:
824 param_size = sizeof(struct skl_cpr_cfg);
825 param_size += mconfig->formats_config.caps_size;
828 case SKL_MODULE_TYPE_SRCINT:
829 return sizeof(struct skl_src_module_cfg);
831 case SKL_MODULE_TYPE_UPDWMIX:
832 return sizeof(struct skl_up_down_mixer_cfg);
834 case SKL_MODULE_TYPE_ALGO:
835 param_size = sizeof(struct skl_base_cfg);
836 param_size += mconfig->formats_config.caps_size;
839 case SKL_MODULE_TYPE_BASE_OUTFMT:
840 case SKL_MODULE_TYPE_MIC_SELECT:
841 case SKL_MODULE_TYPE_KPB:
842 return sizeof(struct skl_base_outfmt_cfg);
846 * return only base cfg when no specific module type is
849 return sizeof(struct skl_base_cfg);
856 * DSP firmware supports various modules like copier, SRC, updown etc.
857 * These modules required various parameters to be calculated and sent for
858 * the module initialization to DSP. By default a generic module needs only
859 * base module format configuration
862 static int skl_set_module_format(struct skl_sst *ctx,
863 struct skl_module_cfg *module_config,
864 u16 *module_config_size,
869 param_size = skl_get_module_param_size(ctx, module_config);
871 *param_data = kzalloc(param_size, GFP_KERNEL);
872 if (NULL == *param_data)
875 *module_config_size = param_size;
877 switch (module_config->m_type) {
878 case SKL_MODULE_TYPE_COPIER:
879 skl_set_copier_format(ctx, module_config, *param_data);
882 case SKL_MODULE_TYPE_SRCINT:
883 skl_set_src_format(ctx, module_config, *param_data);
886 case SKL_MODULE_TYPE_UPDWMIX:
887 skl_set_updown_mixer_format(ctx, module_config, *param_data);
890 case SKL_MODULE_TYPE_ALGO:
891 skl_set_algo_format(ctx, module_config, *param_data);
894 case SKL_MODULE_TYPE_BASE_OUTFMT:
895 case SKL_MODULE_TYPE_MIC_SELECT:
896 case SKL_MODULE_TYPE_KPB:
897 skl_set_base_outfmt_format(ctx, module_config, *param_data);
901 skl_set_base_module_format(ctx, module_config, *param_data);
906 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
907 module_config->id.module_id, param_size);
908 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
909 *param_data, param_size, false);
913 static int skl_get_queue_index(struct skl_module_pin *mpin,
914 struct skl_module_inst_id id, int max)
918 for (i = 0; i < max; i++) {
919 if (mpin[i].id.module_id == id.module_id &&
920 mpin[i].id.instance_id == id.instance_id)
928 * Allocates queue for each module.
929 * if dynamic, the pin_index is allocated 0 to max_pin.
930 * In static, the pin_index is fixed based on module_id and instance id
932 static int skl_alloc_queue(struct skl_module_pin *mpin,
933 struct skl_module_cfg *tgt_cfg, int max)
936 struct skl_module_inst_id id = tgt_cfg->id;
938 * if pin in dynamic, find first free pin
939 * otherwise find match module and instance id pin as topology will
940 * ensure a unique pin is assigned to this so no need to
943 for (i = 0; i < max; i++) {
944 if (mpin[i].is_dynamic) {
945 if (!mpin[i].in_use &&
946 mpin[i].pin_state == SKL_PIN_UNBIND) {
948 mpin[i].in_use = true;
949 mpin[i].id.module_id = id.module_id;
950 mpin[i].id.instance_id = id.instance_id;
951 mpin[i].id.pvt_id = id.pvt_id;
952 mpin[i].tgt_mcfg = tgt_cfg;
956 if (mpin[i].id.module_id == id.module_id &&
957 mpin[i].id.instance_id == id.instance_id &&
958 mpin[i].pin_state == SKL_PIN_UNBIND) {
960 mpin[i].tgt_mcfg = tgt_cfg;
969 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
971 if (mpin[q_index].is_dynamic) {
972 mpin[q_index].in_use = false;
973 mpin[q_index].id.module_id = 0;
974 mpin[q_index].id.instance_id = 0;
975 mpin[q_index].id.pvt_id = 0;
977 mpin[q_index].pin_state = SKL_PIN_UNBIND;
978 mpin[q_index].tgt_mcfg = NULL;
981 /* Module state will be set to unint, if all the out pin state is UNBIND */
983 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
984 struct skl_module_cfg *mcfg)
989 for (i = 0; i < max; i++) {
990 if (mpin[i].pin_state == SKL_PIN_UNBIND)
997 mcfg->m_state = SKL_MODULE_INIT_DONE;
1002 * A module needs to be instanataited in DSP. A mdoule is present in a
1003 * collection of module referred as a PIPE.
1004 * We first calculate the module format, based on module type and then
1005 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
1007 int skl_init_module(struct skl_sst *ctx,
1008 struct skl_module_cfg *mconfig)
1010 u16 module_config_size = 0;
1011 void *param_data = NULL;
1013 struct skl_ipc_init_instance_msg msg;
1015 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
1016 mconfig->id.module_id, mconfig->id.pvt_id);
1018 if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1019 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
1020 mconfig->pipe->state, mconfig->pipe->ppl_id);
1024 ret = skl_set_module_format(ctx, mconfig,
1025 &module_config_size, ¶m_data);
1027 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
1031 msg.module_id = mconfig->id.module_id;
1032 msg.instance_id = mconfig->id.pvt_id;
1033 msg.ppl_instance_id = mconfig->pipe->ppl_id;
1034 msg.param_data_size = module_config_size;
1035 msg.core_id = mconfig->core_id;
1036 msg.domain = mconfig->domain;
1038 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
1040 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
1044 mconfig->m_state = SKL_MODULE_INIT_DONE;
1049 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
1050 *src_module, struct skl_module_cfg *dst_module)
1052 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
1053 __func__, src_module->id.module_id, src_module->id.pvt_id);
1054 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1055 dst_module->id.module_id, dst_module->id.pvt_id);
1057 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
1058 src_module->m_state, dst_module->m_state);
1062 * On module freeup, we need to unbind the module with modules
1063 * it is already bind.
1064 * Find the pin allocated and unbind then using bind_unbind IPC
1066 int skl_unbind_modules(struct skl_sst *ctx,
1067 struct skl_module_cfg *src_mcfg,
1068 struct skl_module_cfg *dst_mcfg)
1071 struct skl_ipc_bind_unbind_msg msg;
1072 struct skl_module_inst_id src_id = src_mcfg->id;
1073 struct skl_module_inst_id dst_id = dst_mcfg->id;
1074 int in_max = dst_mcfg->module->max_input_pins;
1075 int out_max = src_mcfg->module->max_output_pins;
1076 int src_index, dst_index, src_pin_state, dst_pin_state;
1078 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1080 /* get src queue index */
1081 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1085 msg.src_queue = src_index;
1087 /* get dst queue index */
1088 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1092 msg.dst_queue = dst_index;
1094 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1095 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1097 if (src_pin_state != SKL_PIN_BIND_DONE ||
1098 dst_pin_state != SKL_PIN_BIND_DONE)
1101 msg.module_id = src_mcfg->id.module_id;
1102 msg.instance_id = src_mcfg->id.pvt_id;
1103 msg.dst_module_id = dst_mcfg->id.module_id;
1104 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1107 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1109 /* free queue only if unbind is success */
1110 skl_free_queue(src_mcfg->m_out_pin, src_index);
1111 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1114 * check only if src module bind state, bind is
1115 * always from src -> sink
1117 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1123 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
1124 struct skl_module_fmt *format)
1126 pin_fmt->number_of_channels = format->channels;
1127 pin_fmt->s_freq = format->s_freq;
1128 pin_fmt->bit_depth = format->bit_depth;
1129 pin_fmt->valid_bit_depth = format->valid_bit_depth;
1130 pin_fmt->ch_cfg = format->ch_cfg;
1131 pin_fmt->sample_type = format->sample_type;
1132 pin_fmt->channel_map = format->ch_map;
1133 pin_fmt->interleaving = format->interleaving_style;
1136 #define CPR_SINK_FMT_PARAM_ID 2
1139 * Once a module is instantiated it need to be 'bind' with other modules in
1140 * the pipeline. For binding we need to find the module pins which are bind
1142 * This function finds the pins and then sends bund_unbind IPC message to
1143 * DSP using IPC helper
1145 int skl_bind_modules(struct skl_sst *ctx,
1146 struct skl_module_cfg *src_mcfg,
1147 struct skl_module_cfg *dst_mcfg)
1150 struct skl_ipc_bind_unbind_msg msg;
1151 int in_max = dst_mcfg->module->max_input_pins;
1152 int out_max = src_mcfg->module->max_output_pins;
1153 int src_index, dst_index;
1154 struct skl_module_fmt *format;
1155 struct skl_cpr_pin_fmt pin_fmt;
1156 struct skl_module *module;
1157 struct skl_module_iface *fmt;
1159 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
1161 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1162 dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1165 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1169 msg.src_queue = src_index;
1170 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1171 if (dst_index < 0) {
1172 skl_free_queue(src_mcfg->m_out_pin, src_index);
1177 * Copier module requires the separate large_config_set_ipc to
1178 * configure the pins other than 0
1180 if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1181 pin_fmt.sink_id = src_index;
1182 module = src_mcfg->module;
1183 fmt = &module->formats[src_mcfg->fmt_idx];
1185 /* Input fmt is same as that of src module input cfg */
1186 format = &fmt->inputs[0].fmt;
1187 fill_pin_params(&(pin_fmt.src_fmt), format);
1189 format = &fmt->outputs[src_index].fmt;
1190 fill_pin_params(&(pin_fmt.dst_fmt), format);
1191 ret = skl_set_module_params(ctx, (void *)&pin_fmt,
1192 sizeof(struct skl_cpr_pin_fmt),
1193 CPR_SINK_FMT_PARAM_ID, src_mcfg);
1199 msg.dst_queue = dst_index;
1201 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
1202 msg.src_queue, msg.dst_queue);
1204 msg.module_id = src_mcfg->id.module_id;
1205 msg.instance_id = src_mcfg->id.pvt_id;
1206 msg.dst_module_id = dst_mcfg->id.module_id;
1207 msg.dst_instance_id = dst_mcfg->id.pvt_id;
1210 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
1213 src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1214 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1215 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1219 /* error case , if IPC fails, clear the queue index */
1220 skl_free_queue(src_mcfg->m_out_pin, src_index);
1221 skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1226 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
1227 enum skl_ipc_pipeline_state state)
1229 dev_dbg(ctx->dev, "%s: pipe_state = %d\n", __func__, state);
1231 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
1235 * A pipeline is a collection of modules. Before a module in instantiated a
1236 * pipeline needs to be created for it.
1237 * This function creates pipeline, by sending create pipeline IPC messages
1240 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
1244 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1246 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
1247 pipe->pipe_priority, pipe->ppl_id,
1250 dev_err(ctx->dev, "Failed to create pipeline\n");
1254 pipe->state = SKL_PIPE_CREATED;
1260 * A pipeline needs to be deleted on cleanup. If a pipeline is running,
1261 * then pause it first. Before actual deletion, pipeline should enter
1262 * reset state. Finish the procedure by sending delete pipeline IPC.
1263 * DSP will stop the DMA engines and release resources
1265 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1269 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1271 /* If pipe was not created in FW, do not try to delete it */
1272 if (pipe->state < SKL_PIPE_CREATED)
1275 /* If pipe is started, do stop the pipe in FW. */
1276 if (pipe->state >= SKL_PIPE_STARTED) {
1277 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1279 dev_err(ctx->dev, "Failed to stop pipeline\n");
1283 pipe->state = SKL_PIPE_PAUSED;
1286 /* reset pipe state before deletion */
1287 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1289 dev_err(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1293 pipe->state = SKL_PIPE_RESET;
1295 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
1297 dev_err(ctx->dev, "Failed to delete pipeline\n");
1301 pipe->state = SKL_PIPE_INVALID;
1307 * A pipeline is also a scheduling entity in DSP which can be run, stopped
1308 * For processing data the pipe need to be run by sending IPC set pipe state
1311 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1315 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1317 /* If pipe was not created in FW, do not try to pause or delete */
1318 if (pipe->state < SKL_PIPE_CREATED)
1321 /* Pipe has to be paused before it is started */
1322 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1324 dev_err(ctx->dev, "Failed to pause pipe\n");
1328 pipe->state = SKL_PIPE_PAUSED;
1330 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
1332 dev_err(ctx->dev, "Failed to start pipe\n");
1336 pipe->state = SKL_PIPE_STARTED;
1342 * Stop the pipeline by sending set pipe state IPC
1343 * DSP doesnt implement stop so we always send pause message
1345 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1349 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1351 /* If pipe was not created in FW, do not try to pause or delete */
1352 if (pipe->state < SKL_PIPE_PAUSED)
1355 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
1357 dev_dbg(ctx->dev, "Failed to stop pipe\n");
1361 pipe->state = SKL_PIPE_PAUSED;
1367 * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1370 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
1374 /* If pipe was not created in FW, do not try to pause or delete */
1375 if (pipe->state < SKL_PIPE_PAUSED)
1378 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET);
1380 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret);
1384 pipe->state = SKL_PIPE_RESET;
1389 /* Algo parameter set helper function */
1390 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
1391 u32 param_id, struct skl_module_cfg *mcfg)
1393 struct skl_ipc_large_config_msg msg;
1395 msg.module_id = mcfg->id.module_id;
1396 msg.instance_id = mcfg->id.pvt_id;
1397 msg.param_data_size = size;
1398 msg.large_param_id = param_id;
1400 return skl_ipc_set_large_config(&ctx->ipc, &msg, params);
1403 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
1404 u32 param_id, struct skl_module_cfg *mcfg)
1406 struct skl_ipc_large_config_msg msg;
1408 msg.module_id = mcfg->id.module_id;
1409 msg.instance_id = mcfg->id.pvt_id;
1410 msg.param_data_size = size;
1411 msg.large_param_id = param_id;
1413 return skl_ipc_get_large_config(&ctx->ipc, &msg, params);