1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel Smart Sound Technology (SST) DSP Core Driver
5 * Copyright (C) 2013, Intel Corporation. All rights reserved.
8 #include <linux/slab.h>
9 #include <linux/export.h>
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
14 #include <linux/delay.h>
17 #include "sst-dsp-priv.h"
19 #define CREATE_TRACE_POINTS
20 #include <trace/events/intel-sst.h>
22 /* Internal generic low-level SST IO functions - can be overidden */
23 void sst_shim32_write(void __iomem *addr, u32 offset, u32 value)
25 writel(value, addr + offset);
27 EXPORT_SYMBOL_GPL(sst_shim32_write);
29 u32 sst_shim32_read(void __iomem *addr, u32 offset)
31 return readl(addr + offset);
33 EXPORT_SYMBOL_GPL(sst_shim32_read);
35 void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value)
37 memcpy_toio(addr + offset, &value, sizeof(value));
39 EXPORT_SYMBOL_GPL(sst_shim32_write64);
41 u64 sst_shim32_read64(void __iomem *addr, u32 offset)
45 memcpy_fromio(&val, addr + offset, sizeof(val));
48 EXPORT_SYMBOL_GPL(sst_shim32_read64);
50 static inline void _sst_memcpy_toio_32(volatile u32 __iomem *dest,
51 u32 *src, size_t bytes)
53 int i, words = bytes >> 2;
55 for (i = 0; i < words; i++)
56 writel(src[i], dest + i);
59 static inline void _sst_memcpy_fromio_32(u32 *dest,
60 const volatile __iomem u32 *src, size_t bytes)
62 int i, words = bytes >> 2;
64 for (i = 0; i < words; i++)
65 dest[i] = readl(src + i);
68 void sst_memcpy_toio_32(struct sst_dsp *sst,
69 void __iomem *dest, void *src, size_t bytes)
71 _sst_memcpy_toio_32(dest, src, bytes);
73 EXPORT_SYMBOL_GPL(sst_memcpy_toio_32);
75 void sst_memcpy_fromio_32(struct sst_dsp *sst, void *dest,
76 void __iomem *src, size_t bytes)
78 _sst_memcpy_fromio_32(dest, src, bytes);
80 EXPORT_SYMBOL_GPL(sst_memcpy_fromio_32);
83 void sst_dsp_shim_write(struct sst_dsp *sst, u32 offset, u32 value)
87 spin_lock_irqsave(&sst->spinlock, flags);
88 sst->ops->write(sst->addr.shim, offset, value);
89 spin_unlock_irqrestore(&sst->spinlock, flags);
91 EXPORT_SYMBOL_GPL(sst_dsp_shim_write);
93 u32 sst_dsp_shim_read(struct sst_dsp *sst, u32 offset)
98 spin_lock_irqsave(&sst->spinlock, flags);
99 val = sst->ops->read(sst->addr.shim, offset);
100 spin_unlock_irqrestore(&sst->spinlock, flags);
104 EXPORT_SYMBOL_GPL(sst_dsp_shim_read);
106 void sst_dsp_shim_write64(struct sst_dsp *sst, u32 offset, u64 value)
110 spin_lock_irqsave(&sst->spinlock, flags);
111 sst->ops->write64(sst->addr.shim, offset, value);
112 spin_unlock_irqrestore(&sst->spinlock, flags);
114 EXPORT_SYMBOL_GPL(sst_dsp_shim_write64);
116 u64 sst_dsp_shim_read64(struct sst_dsp *sst, u32 offset)
121 spin_lock_irqsave(&sst->spinlock, flags);
122 val = sst->ops->read64(sst->addr.shim, offset);
123 spin_unlock_irqrestore(&sst->spinlock, flags);
127 EXPORT_SYMBOL_GPL(sst_dsp_shim_read64);
129 void sst_dsp_shim_write_unlocked(struct sst_dsp *sst, u32 offset, u32 value)
131 sst->ops->write(sst->addr.shim, offset, value);
133 EXPORT_SYMBOL_GPL(sst_dsp_shim_write_unlocked);
135 u32 sst_dsp_shim_read_unlocked(struct sst_dsp *sst, u32 offset)
137 return sst->ops->read(sst->addr.shim, offset);
139 EXPORT_SYMBOL_GPL(sst_dsp_shim_read_unlocked);
141 void sst_dsp_shim_write64_unlocked(struct sst_dsp *sst, u32 offset, u64 value)
143 sst->ops->write64(sst->addr.shim, offset, value);
145 EXPORT_SYMBOL_GPL(sst_dsp_shim_write64_unlocked);
147 u64 sst_dsp_shim_read64_unlocked(struct sst_dsp *sst, u32 offset)
149 return sst->ops->read64(sst->addr.shim, offset);
151 EXPORT_SYMBOL_GPL(sst_dsp_shim_read64_unlocked);
153 int sst_dsp_shim_update_bits_unlocked(struct sst_dsp *sst, u32 offset,
157 unsigned int old, new;
160 ret = sst_dsp_shim_read_unlocked(sst, offset);
163 new = (old & (~mask)) | (value & mask);
165 change = (old != new);
167 sst_dsp_shim_write_unlocked(sst, offset, new);
171 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_unlocked);
173 int sst_dsp_shim_update_bits64_unlocked(struct sst_dsp *sst, u32 offset,
179 old = sst_dsp_shim_read64_unlocked(sst, offset);
181 new = (old & (~mask)) | (value & mask);
183 change = (old != new);
185 sst_dsp_shim_write64_unlocked(sst, offset, new);
189 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits64_unlocked);
191 /* This is for registers bits with attribute RWC */
192 void sst_dsp_shim_update_bits_forced_unlocked(struct sst_dsp *sst, u32 offset,
195 unsigned int old, new;
198 ret = sst_dsp_shim_read_unlocked(sst, offset);
201 new = (old & (~mask)) | (value & mask);
203 sst_dsp_shim_write_unlocked(sst, offset, new);
205 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_forced_unlocked);
207 int sst_dsp_shim_update_bits(struct sst_dsp *sst, u32 offset,
213 spin_lock_irqsave(&sst->spinlock, flags);
214 change = sst_dsp_shim_update_bits_unlocked(sst, offset, mask, value);
215 spin_unlock_irqrestore(&sst->spinlock, flags);
218 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits);
220 int sst_dsp_shim_update_bits64(struct sst_dsp *sst, u32 offset,
226 spin_lock_irqsave(&sst->spinlock, flags);
227 change = sst_dsp_shim_update_bits64_unlocked(sst, offset, mask, value);
228 spin_unlock_irqrestore(&sst->spinlock, flags);
231 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits64);
233 /* This is for registers bits with attribute RWC */
234 void sst_dsp_shim_update_bits_forced(struct sst_dsp *sst, u32 offset,
239 spin_lock_irqsave(&sst->spinlock, flags);
240 sst_dsp_shim_update_bits_forced_unlocked(sst, offset, mask, value);
241 spin_unlock_irqrestore(&sst->spinlock, flags);
243 EXPORT_SYMBOL_GPL(sst_dsp_shim_update_bits_forced);
245 int sst_dsp_register_poll(struct sst_dsp *ctx, u32 offset, u32 mask,
246 u32 target, u32 time, char *operation)
249 unsigned long timeout;
253 * split the loop into sleeps of varying resolution. more accurately,
254 * the range of wakeups are:
255 * Phase 1(first 5ms): min sleep 0.5ms; max sleep 1ms.
256 * Phase 2:( 5ms to 10ms) : min sleep 0.5ms; max sleep 10ms
257 * (usleep_range (500, 1000) and usleep_range(5000, 10000) are
258 * both possible in this phase depending on whether k > 10 or not).
259 * Phase 3: (beyond 10 ms) min sleep 5ms; max sleep 10ms.
262 timeout = jiffies + msecs_to_jiffies(time);
263 while ((((reg = sst_dsp_shim_read_unlocked(ctx, offset)) & mask) != target)
264 && time_before(jiffies, timeout)) {
269 usleep_range(s, 2*s);
272 if ((reg & mask) == target) {
273 dev_dbg(ctx->dev, "FW Poll Status: reg=%#x %s successful\n",
279 dev_dbg(ctx->dev, "FW Poll Status: reg=%#x %s timedout\n",
283 EXPORT_SYMBOL_GPL(sst_dsp_register_poll);
285 void sst_dsp_dump(struct sst_dsp *sst)
290 EXPORT_SYMBOL_GPL(sst_dsp_dump);
292 void sst_dsp_reset(struct sst_dsp *sst)
295 sst->ops->reset(sst);
297 EXPORT_SYMBOL_GPL(sst_dsp_reset);
299 int sst_dsp_boot(struct sst_dsp *sst)
306 EXPORT_SYMBOL_GPL(sst_dsp_boot);
308 int sst_dsp_wake(struct sst_dsp *sst)
311 return sst->ops->wake(sst);
315 EXPORT_SYMBOL_GPL(sst_dsp_wake);
317 void sst_dsp_sleep(struct sst_dsp *sst)
320 sst->ops->sleep(sst);
322 EXPORT_SYMBOL_GPL(sst_dsp_sleep);
324 void sst_dsp_stall(struct sst_dsp *sst)
327 sst->ops->stall(sst);
329 EXPORT_SYMBOL_GPL(sst_dsp_stall);
331 void sst_dsp_ipc_msg_tx(struct sst_dsp *dsp, u32 msg)
333 sst_dsp_shim_write_unlocked(dsp, SST_IPCX, msg | SST_IPCX_BUSY);
334 trace_sst_ipc_msg_tx(msg);
336 EXPORT_SYMBOL_GPL(sst_dsp_ipc_msg_tx);
338 u32 sst_dsp_ipc_msg_rx(struct sst_dsp *dsp)
342 msg = sst_dsp_shim_read_unlocked(dsp, SST_IPCX);
343 trace_sst_ipc_msg_rx(msg);
347 EXPORT_SYMBOL_GPL(sst_dsp_ipc_msg_rx);
349 int sst_dsp_mailbox_init(struct sst_dsp *sst, u32 inbox_offset, size_t inbox_size,
350 u32 outbox_offset, size_t outbox_size)
352 sst->mailbox.in_base = sst->addr.lpe + inbox_offset;
353 sst->mailbox.out_base = sst->addr.lpe + outbox_offset;
354 sst->mailbox.in_size = inbox_size;
355 sst->mailbox.out_size = outbox_size;
358 EXPORT_SYMBOL_GPL(sst_dsp_mailbox_init);
360 void sst_dsp_outbox_write(struct sst_dsp *sst, void *message, size_t bytes)
364 trace_sst_ipc_outbox_write(bytes);
366 memcpy_toio(sst->mailbox.out_base, message, bytes);
368 for (i = 0; i < bytes; i += 4)
369 trace_sst_ipc_outbox_wdata(i, *(u32 *)(message + i));
371 EXPORT_SYMBOL_GPL(sst_dsp_outbox_write);
373 void sst_dsp_outbox_read(struct sst_dsp *sst, void *message, size_t bytes)
377 trace_sst_ipc_outbox_read(bytes);
379 memcpy_fromio(message, sst->mailbox.out_base, bytes);
381 for (i = 0; i < bytes; i += 4)
382 trace_sst_ipc_outbox_rdata(i, *(u32 *)(message + i));
384 EXPORT_SYMBOL_GPL(sst_dsp_outbox_read);
386 void sst_dsp_inbox_write(struct sst_dsp *sst, void *message, size_t bytes)
390 trace_sst_ipc_inbox_write(bytes);
392 memcpy_toio(sst->mailbox.in_base, message, bytes);
394 for (i = 0; i < bytes; i += 4)
395 trace_sst_ipc_inbox_wdata(i, *(u32 *)(message + i));
397 EXPORT_SYMBOL_GPL(sst_dsp_inbox_write);
399 void sst_dsp_inbox_read(struct sst_dsp *sst, void *message, size_t bytes)
403 trace_sst_ipc_inbox_read(bytes);
405 memcpy_fromio(message, sst->mailbox.in_base, bytes);
407 for (i = 0; i < bytes; i += 4)
408 trace_sst_ipc_inbox_rdata(i, *(u32 *)(message + i));
410 EXPORT_SYMBOL_GPL(sst_dsp_inbox_read);
412 /* Module information */
413 MODULE_AUTHOR("Liam Girdwood");
414 MODULE_DESCRIPTION("Intel SST Core");
415 MODULE_LICENSE("GPL v2");