Linux-libre 5.3.12-gnu
[librecmc/linux-libre.git] / sound / soc / codecs / wm0010.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * wm0010.c  --  WM0010 DSP Driver
4  *
5  * Copyright 2012 Wolfson Microelectronics PLC.
6  *
7  * Authors: Mark Brown <broonie@opensource.wolfsonmicro.com>
8  *          Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
9  *          Scott Ling <sl@opensource.wolfsonmicro.com>
10  */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/interrupt.h>
15 #include <linux/irqreturn.h>
16 #include <linux/init.h>
17 #include <linux/spi/spi.h>
18 #include <linux/firmware.h>
19 #include <linux/delay.h>
20 #include <linux/fs.h>
21 #include <linux/gpio.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/mutex.h>
24 #include <linux/workqueue.h>
25
26 #include <sound/soc.h>
27 #include <sound/wm0010.h>
28
29 #define DEVICE_ID_WM0010        10
30
31 /* We only support v1 of the .dfw INFO record */
32 #define INFO_VERSION            1
33
34 enum dfw_cmd {
35         DFW_CMD_FUSE = 0x01,
36         DFW_CMD_CODE_HDR,
37         DFW_CMD_CODE_DATA,
38         DFW_CMD_PLL,
39         DFW_CMD_INFO = 0xff
40 };
41
42 struct dfw_binrec {
43         u8 command;
44         u32 length:24;
45         u32 address;
46         uint8_t data[0];
47 } __packed;
48
49 struct dfw_inforec {
50         u8 info_version;
51         u8 tool_major_version;
52         u8 tool_minor_version;
53         u8 dsp_target;
54 };
55
56 struct dfw_pllrec {
57         u8 command;
58         u32 length:24;
59         u32 address;
60         u32 clkctrl1;
61         u32 clkctrl2;
62         u32 clkctrl3;
63         u32 ldetctrl;
64         u32 uart_div;
65         u32 spi_div;
66 } __packed;
67
68 static struct pll_clock_map {
69         int max_sysclk;
70         int max_pll_spi_speed;
71         u32 pll_clkctrl1;
72 } pll_clock_map[] = {                      /* Dividers */
73         { 22000000, 26000000, 0x00201f11 }, /* 2,32,2  */
74         { 18000000, 26000000, 0x00203f21 }, /* 2,64,4  */
75         { 14000000, 26000000, 0x00202620 }, /* 1,39,4  */
76         { 10000000, 22000000, 0x00203120 }, /* 1,50,4  */
77         {  6500000, 22000000, 0x00204520 }, /* 1,70,4  */
78         {  5500000, 22000000, 0x00103f10 }, /* 1,64,2  */
79 };
80
81 enum wm0010_state {
82         WM0010_POWER_OFF,
83         WM0010_OUT_OF_RESET,
84         WM0010_BOOTROM,
85         WM0010_STAGE2,
86         WM0010_FIRMWARE,
87 };
88
89 struct wm0010_priv {
90         struct snd_soc_component *component;
91
92         struct mutex lock;
93         struct device *dev;
94
95         struct wm0010_pdata pdata;
96
97         int gpio_reset;
98         int gpio_reset_value;
99
100         struct regulator_bulk_data core_supplies[2];
101         struct regulator *dbvdd;
102
103         int sysclk;
104
105         enum wm0010_state state;
106         bool boot_failed;
107         bool ready;
108         bool pll_running;
109         int max_spi_freq;
110         int board_max_spi_speed;
111         u32 pll_clkctrl1;
112
113         spinlock_t irq_lock;
114         int irq;
115
116         struct completion boot_completion;
117 };
118
119 struct wm0010_spi_msg {
120         struct spi_message m;
121         struct spi_transfer t;
122         u8 *tx_buf;
123         u8 *rx_buf;
124         size_t len;
125 };
126
127 static const struct snd_soc_dapm_widget wm0010_dapm_widgets[] = {
128 SND_SOC_DAPM_SUPPLY("CLKIN",  SND_SOC_NOPM, 0, 0, NULL, 0),
129 };
130
131 static const struct snd_soc_dapm_route wm0010_dapm_routes[] = {
132         { "SDI2 Capture", NULL, "SDI1 Playback" },
133         { "SDI1 Capture", NULL, "SDI2 Playback" },
134
135         { "SDI1 Capture", NULL, "CLKIN" },
136         { "SDI2 Capture", NULL, "CLKIN" },
137         { "SDI1 Playback", NULL, "CLKIN" },
138         { "SDI2 Playback", NULL, "CLKIN" },
139 };
140
141 static const char *wm0010_state_to_str(enum wm0010_state state)
142 {
143         static const char * const state_to_str[] = {
144                 "Power off",
145                 "Out of reset",
146                 "Boot ROM",
147                 "Stage2",
148                 "Firmware"
149         };
150
151         if (state < 0 || state >= ARRAY_SIZE(state_to_str))
152                 return "null";
153         return state_to_str[state];
154 }
155
156 /* Called with wm0010->lock held */
157 static void wm0010_halt(struct snd_soc_component *component)
158 {
159         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
160         unsigned long flags;
161         enum wm0010_state state;
162
163         /* Fetch the wm0010 state */
164         spin_lock_irqsave(&wm0010->irq_lock, flags);
165         state = wm0010->state;
166         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
167
168         switch (state) {
169         case WM0010_POWER_OFF:
170                 /* If there's nothing to do, bail out */
171                 return;
172         case WM0010_OUT_OF_RESET:
173         case WM0010_BOOTROM:
174         case WM0010_STAGE2:
175         case WM0010_FIRMWARE:
176                 /* Remember to put chip back into reset */
177                 gpio_set_value_cansleep(wm0010->gpio_reset,
178                                         wm0010->gpio_reset_value);
179                 /* Disable the regulators */
180                 regulator_disable(wm0010->dbvdd);
181                 regulator_bulk_disable(ARRAY_SIZE(wm0010->core_supplies),
182                                        wm0010->core_supplies);
183                 break;
184         }
185
186         spin_lock_irqsave(&wm0010->irq_lock, flags);
187         wm0010->state = WM0010_POWER_OFF;
188         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
189 }
190
191 struct wm0010_boot_xfer {
192         struct list_head list;
193         struct snd_soc_component *component;
194         struct completion *done;
195         struct spi_message m;
196         struct spi_transfer t;
197 };
198
199 /* Called with wm0010->lock held */
200 static void wm0010_mark_boot_failure(struct wm0010_priv *wm0010)
201 {
202         enum wm0010_state state;
203         unsigned long flags;
204
205         spin_lock_irqsave(&wm0010->irq_lock, flags);
206         state = wm0010->state;
207         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
208
209         dev_err(wm0010->dev, "Failed to transition from `%s' state to `%s' state\n",
210                 wm0010_state_to_str(state), wm0010_state_to_str(state + 1));
211
212         wm0010->boot_failed = true;
213 }
214
215 static void wm0010_boot_xfer_complete(void *data)
216 {
217         struct wm0010_boot_xfer *xfer = data;
218         struct snd_soc_component *component = xfer->component;
219         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
220         u32 *out32 = xfer->t.rx_buf;
221         int i;
222
223         if (xfer->m.status != 0) {
224                 dev_err(component->dev, "SPI transfer failed: %d\n",
225                         xfer->m.status);
226                 wm0010_mark_boot_failure(wm0010);
227                 if (xfer->done)
228                         complete(xfer->done);
229                 return;
230         }
231
232         for (i = 0; i < xfer->t.len / 4; i++) {
233                 dev_dbg(component->dev, "%d: %04x\n", i, out32[i]);
234
235                 switch (be32_to_cpu(out32[i])) {
236                 case 0xe0e0e0e0:
237                         dev_err(component->dev,
238                                 "%d: ROM error reported in stage 2\n", i);
239                         wm0010_mark_boot_failure(wm0010);
240                         break;
241
242                 case 0x55555555:
243                         if (wm0010->state < WM0010_STAGE2)
244                                 break;
245                         dev_err(component->dev,
246                                 "%d: ROM bootloader running in stage 2\n", i);
247                         wm0010_mark_boot_failure(wm0010);
248                         break;
249
250                 case 0x0fed0000:
251                         dev_dbg(component->dev, "Stage2 loader running\n");
252                         break;
253
254                 case 0x0fed0007:
255                         dev_dbg(component->dev, "CODE_HDR packet received\n");
256                         break;
257
258                 case 0x0fed0008:
259                         dev_dbg(component->dev, "CODE_DATA packet received\n");
260                         break;
261
262                 case 0x0fed0009:
263                         dev_dbg(component->dev, "Download complete\n");
264                         break;
265
266                 case 0x0fed000c:
267                         dev_dbg(component->dev, "Application start\n");
268                         break;
269
270                 case 0x0fed000e:
271                         dev_dbg(component->dev, "PLL packet received\n");
272                         wm0010->pll_running = true;
273                         break;
274
275                 case 0x0fed0025:
276                         dev_err(component->dev, "Device reports image too long\n");
277                         wm0010_mark_boot_failure(wm0010);
278                         break;
279
280                 case 0x0fed002c:
281                         dev_err(component->dev, "Device reports bad SPI packet\n");
282                         wm0010_mark_boot_failure(wm0010);
283                         break;
284
285                 case 0x0fed0031:
286                         dev_err(component->dev, "Device reports SPI read overflow\n");
287                         wm0010_mark_boot_failure(wm0010);
288                         break;
289
290                 case 0x0fed0032:
291                         dev_err(component->dev, "Device reports SPI underclock\n");
292                         wm0010_mark_boot_failure(wm0010);
293                         break;
294
295                 case 0x0fed0033:
296                         dev_err(component->dev, "Device reports bad header packet\n");
297                         wm0010_mark_boot_failure(wm0010);
298                         break;
299
300                 case 0x0fed0034:
301                         dev_err(component->dev, "Device reports invalid packet type\n");
302                         wm0010_mark_boot_failure(wm0010);
303                         break;
304
305                 case 0x0fed0035:
306                         dev_err(component->dev, "Device reports data before header error\n");
307                         wm0010_mark_boot_failure(wm0010);
308                         break;
309
310                 case 0x0fed0038:
311                         dev_err(component->dev, "Device reports invalid PLL packet\n");
312                         break;
313
314                 case 0x0fed003a:
315                         dev_err(component->dev, "Device reports packet alignment error\n");
316                         wm0010_mark_boot_failure(wm0010);
317                         break;
318
319                 default:
320                         dev_err(component->dev, "Unrecognised return 0x%x\n",
321                             be32_to_cpu(out32[i]));
322                         wm0010_mark_boot_failure(wm0010);
323                         break;
324                 }
325
326                 if (wm0010->boot_failed)
327                         break;
328         }
329
330         if (xfer->done)
331                 complete(xfer->done);
332 }
333
334 static void byte_swap_64(u64 *data_in, u64 *data_out, u32 len)
335 {
336         int i;
337
338         for (i = 0; i < len / 8; i++)
339                 data_out[i] = cpu_to_be64(le64_to_cpu(data_in[i]));
340 }
341
342 static int wm0010_firmware_load(const char *name, struct snd_soc_component *component)
343 {
344         struct spi_device *spi = to_spi_device(component->dev);
345         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
346         struct list_head xfer_list;
347         struct wm0010_boot_xfer *xfer;
348         int ret;
349         struct completion done;
350         const struct firmware *fw;
351         const struct dfw_binrec *rec;
352         const struct dfw_inforec *inforec;
353         u64 *img;
354         u8 *out, dsp;
355         u32 len, offset;
356
357         INIT_LIST_HEAD(&xfer_list);
358
359         ret = reject_firmware(&fw, name, component->dev);
360         if (ret != 0) {
361                 dev_err(component->dev, "Failed to request application(%s): %d\n",
362                         name, ret);
363                 return ret;
364         }
365
366         rec = (const struct dfw_binrec *)fw->data;
367         inforec = (const struct dfw_inforec *)rec->data;
368         offset = 0;
369         dsp = inforec->dsp_target;
370         wm0010->boot_failed = false;
371         if (WARN_ON(!list_empty(&xfer_list)))
372                 return -EINVAL;
373         init_completion(&done);
374
375         /* First record should be INFO */
376         if (rec->command != DFW_CMD_INFO) {
377                 dev_err(component->dev, "First record not INFO\r\n");
378                 ret = -EINVAL;
379                 goto abort;
380         }
381
382         if (inforec->info_version != INFO_VERSION) {
383                 dev_err(component->dev,
384                         "Unsupported version (%02d) of INFO record\r\n",
385                         inforec->info_version);
386                 ret = -EINVAL;
387                 goto abort;
388         }
389
390         dev_dbg(component->dev, "Version v%02d INFO record found\r\n",
391                 inforec->info_version);
392
393         /* Check it's a DSP file */
394         if (dsp != DEVICE_ID_WM0010) {
395                 dev_err(component->dev, "Not a WM0010 firmware file.\r\n");
396                 ret = -EINVAL;
397                 goto abort;
398         }
399
400         /* Skip the info record as we don't need to send it */
401         offset += ((rec->length) + 8);
402         rec = (void *)&rec->data[rec->length];
403
404         while (offset < fw->size) {
405                 dev_dbg(component->dev,
406                         "Packet: command %d, data length = 0x%x\r\n",
407                         rec->command, rec->length);
408                 len = rec->length + 8;
409
410                 xfer = kzalloc(sizeof(*xfer), GFP_KERNEL);
411                 if (!xfer) {
412                         ret = -ENOMEM;
413                         goto abort;
414                 }
415
416                 xfer->component = component;
417                 list_add_tail(&xfer->list, &xfer_list);
418
419                 out = kzalloc(len, GFP_KERNEL | GFP_DMA);
420                 if (!out) {
421                         ret = -ENOMEM;
422                         goto abort1;
423                 }
424                 xfer->t.rx_buf = out;
425
426                 img = kzalloc(len, GFP_KERNEL | GFP_DMA);
427                 if (!img) {
428                         ret = -ENOMEM;
429                         goto abort1;
430                 }
431                 xfer->t.tx_buf = img;
432
433                 byte_swap_64((u64 *)&rec->command, img, len);
434
435                 spi_message_init(&xfer->m);
436                 xfer->m.complete = wm0010_boot_xfer_complete;
437                 xfer->m.context = xfer;
438                 xfer->t.len = len;
439                 xfer->t.bits_per_word = 8;
440
441                 if (!wm0010->pll_running) {
442                         xfer->t.speed_hz = wm0010->sysclk / 6;
443                 } else {
444                         xfer->t.speed_hz = wm0010->max_spi_freq;
445
446                         if (wm0010->board_max_spi_speed &&
447                            (wm0010->board_max_spi_speed < wm0010->max_spi_freq))
448                                         xfer->t.speed_hz = wm0010->board_max_spi_speed;
449                 }
450
451                 /* Store max usable spi frequency for later use */
452                 wm0010->max_spi_freq = xfer->t.speed_hz;
453
454                 spi_message_add_tail(&xfer->t, &xfer->m);
455
456                 offset += ((rec->length) + 8);
457                 rec = (void *)&rec->data[rec->length];
458
459                 if (offset >= fw->size) {
460                         dev_dbg(component->dev, "All transfers scheduled\n");
461                         xfer->done = &done;
462                 }
463
464                 ret = spi_async(spi, &xfer->m);
465                 if (ret != 0) {
466                         dev_err(component->dev, "Write failed: %d\n", ret);
467                         goto abort1;
468                 }
469
470                 if (wm0010->boot_failed) {
471                         dev_dbg(component->dev, "Boot fail!\n");
472                         ret = -EINVAL;
473                         goto abort1;
474                 }
475         }
476
477         wait_for_completion(&done);
478
479         ret = 0;
480
481 abort1:
482         while (!list_empty(&xfer_list)) {
483                 xfer = list_first_entry(&xfer_list, struct wm0010_boot_xfer,
484                                         list);
485                 kfree(xfer->t.rx_buf);
486                 kfree(xfer->t.tx_buf);
487                 list_del(&xfer->list);
488                 kfree(xfer);
489         }
490
491 abort:
492         release_firmware(fw);
493         return ret;
494 }
495
496 static int wm0010_stage2_load(struct snd_soc_component *component)
497 {
498         struct spi_device *spi = to_spi_device(component->dev);
499         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
500         const struct firmware *fw;
501         struct spi_message m;
502         struct spi_transfer t;
503         u32 *img;
504         u8 *out;
505         int i;
506         int ret = 0;
507
508         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/", component->dev);
509         if (ret != 0) {
510                 dev_err(component->dev, "Failed to request stage2 loader: %d\n",
511                         ret);
512                 return ret;
513         }
514
515         dev_dbg(component->dev, "Downloading %zu byte stage 2 loader\n", fw->size);
516
517         /* Copy to local buffer first as vmalloc causes problems for dma */
518         img = kzalloc(fw->size, GFP_KERNEL | GFP_DMA);
519         if (!img) {
520                 ret = -ENOMEM;
521                 goto abort2;
522         }
523
524         out = kzalloc(fw->size, GFP_KERNEL | GFP_DMA);
525         if (!out) {
526                 ret = -ENOMEM;
527                 goto abort1;
528         }
529
530         memcpy(img, &fw->data[0], fw->size);
531
532         spi_message_init(&m);
533         memset(&t, 0, sizeof(t));
534         t.rx_buf = out;
535         t.tx_buf = img;
536         t.len = fw->size;
537         t.bits_per_word = 8;
538         t.speed_hz = wm0010->sysclk / 10;
539         spi_message_add_tail(&t, &m);
540
541         dev_dbg(component->dev, "Starting initial download at %dHz\n",
542                 t.speed_hz);
543
544         ret = spi_sync(spi, &m);
545         if (ret != 0) {
546                 dev_err(component->dev, "Initial download failed: %d\n", ret);
547                 goto abort;
548         }
549
550         /* Look for errors from the boot ROM */
551         for (i = 0; i < fw->size; i++) {
552                 if (out[i] != 0x55) {
553                         dev_err(component->dev, "Boot ROM error: %x in %d\n",
554                                 out[i], i);
555                         wm0010_mark_boot_failure(wm0010);
556                         ret = -EBUSY;
557                         goto abort;
558                 }
559         }
560 abort:
561         kfree(out);
562 abort1:
563         kfree(img);
564 abort2:
565         release_firmware(fw);
566
567         return ret;
568 }
569
570 static int wm0010_boot(struct snd_soc_component *component)
571 {
572         struct spi_device *spi = to_spi_device(component->dev);
573         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
574         unsigned long flags;
575         int ret;
576         struct spi_message m;
577         struct spi_transfer t;
578         struct dfw_pllrec pll_rec;
579         u32 *p, len;
580         u64 *img_swap;
581         u8 *out;
582         int i;
583
584         spin_lock_irqsave(&wm0010->irq_lock, flags);
585         if (wm0010->state != WM0010_POWER_OFF)
586                 dev_warn(wm0010->dev, "DSP already powered up!\n");
587         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
588
589         if (wm0010->sysclk > 26000000) {
590                 dev_err(component->dev, "Max DSP clock frequency is 26MHz\n");
591                 ret = -ECANCELED;
592                 goto err;
593         }
594
595         mutex_lock(&wm0010->lock);
596         wm0010->pll_running = false;
597
598         dev_dbg(component->dev, "max_spi_freq: %d\n", wm0010->max_spi_freq);
599
600         ret = regulator_bulk_enable(ARRAY_SIZE(wm0010->core_supplies),
601                                     wm0010->core_supplies);
602         if (ret != 0) {
603                 dev_err(&spi->dev, "Failed to enable core supplies: %d\n",
604                         ret);
605                 mutex_unlock(&wm0010->lock);
606                 goto err;
607         }
608
609         ret = regulator_enable(wm0010->dbvdd);
610         if (ret != 0) {
611                 dev_err(&spi->dev, "Failed to enable DBVDD: %d\n", ret);
612                 goto err_core;
613         }
614
615         /* Release reset */
616         gpio_set_value_cansleep(wm0010->gpio_reset, !wm0010->gpio_reset_value);
617         spin_lock_irqsave(&wm0010->irq_lock, flags);
618         wm0010->state = WM0010_OUT_OF_RESET;
619         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
620
621         if (!wait_for_completion_timeout(&wm0010->boot_completion,
622                                          msecs_to_jiffies(20)))
623                 dev_err(component->dev, "Failed to get interrupt from DSP\n");
624
625         spin_lock_irqsave(&wm0010->irq_lock, flags);
626         wm0010->state = WM0010_BOOTROM;
627         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
628
629         ret = wm0010_stage2_load(component);
630         if (ret)
631                 goto abort;
632
633         if (!wait_for_completion_timeout(&wm0010->boot_completion,
634                                          msecs_to_jiffies(20)))
635                 dev_err(component->dev, "Failed to get interrupt from DSP loader.\n");
636
637         spin_lock_irqsave(&wm0010->irq_lock, flags);
638         wm0010->state = WM0010_STAGE2;
639         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
640
641         /* Only initialise PLL if max_spi_freq initialised */
642         if (wm0010->max_spi_freq) {
643
644                 /* Initialise a PLL record */
645                 memset(&pll_rec, 0, sizeof(pll_rec));
646                 pll_rec.command = DFW_CMD_PLL;
647                 pll_rec.length = (sizeof(pll_rec) - 8);
648
649                 /* On wm0010 only the CLKCTRL1 value is used */
650                 pll_rec.clkctrl1 = wm0010->pll_clkctrl1;
651
652                 ret = -ENOMEM;
653                 len = pll_rec.length + 8;
654                 out = kzalloc(len, GFP_KERNEL | GFP_DMA);
655                 if (!out)
656                         goto abort;
657
658                 img_swap = kzalloc(len, GFP_KERNEL | GFP_DMA);
659                 if (!img_swap)
660                         goto abort_out;
661
662                 /* We need to re-order for 0010 */
663                 byte_swap_64((u64 *)&pll_rec, img_swap, len);
664
665                 spi_message_init(&m);
666                 memset(&t, 0, sizeof(t));
667                 t.rx_buf = out;
668                 t.tx_buf = img_swap;
669                 t.len = len;
670                 t.bits_per_word = 8;
671                 t.speed_hz = wm0010->sysclk / 6;
672                 spi_message_add_tail(&t, &m);
673
674                 ret = spi_sync(spi, &m);
675                 if (ret) {
676                         dev_err(component->dev, "First PLL write failed: %d\n", ret);
677                         goto abort_swap;
678                 }
679
680                 /* Use a second send of the message to get the return status */
681                 ret = spi_sync(spi, &m);
682                 if (ret) {
683                         dev_err(component->dev, "Second PLL write failed: %d\n", ret);
684                         goto abort_swap;
685                 }
686
687                 p = (u32 *)out;
688
689                 /* Look for PLL active code from the DSP */
690                 for (i = 0; i < len / 4; i++) {
691                         if (*p == 0x0e00ed0f) {
692                                 dev_dbg(component->dev, "PLL packet received\n");
693                                 wm0010->pll_running = true;
694                                 break;
695                         }
696                         p++;
697                 }
698
699                 kfree(img_swap);
700                 kfree(out);
701         } else
702                 dev_dbg(component->dev, "Not enabling DSP PLL.");
703
704         ret = wm0010_firmware_load("/*(DEBLOBBED)*/", component);
705
706         if (ret != 0)
707                 goto abort;
708
709         spin_lock_irqsave(&wm0010->irq_lock, flags);
710         wm0010->state = WM0010_FIRMWARE;
711         spin_unlock_irqrestore(&wm0010->irq_lock, flags);
712
713         mutex_unlock(&wm0010->lock);
714
715         return 0;
716
717 abort_swap:
718         kfree(img_swap);
719 abort_out:
720         kfree(out);
721 abort:
722         /* Put the chip back into reset */
723         wm0010_halt(component);
724         mutex_unlock(&wm0010->lock);
725         return ret;
726
727 err_core:
728         mutex_unlock(&wm0010->lock);
729         regulator_bulk_disable(ARRAY_SIZE(wm0010->core_supplies),
730                                wm0010->core_supplies);
731 err:
732         return ret;
733 }
734
735 static int wm0010_set_bias_level(struct snd_soc_component *component,
736                                  enum snd_soc_bias_level level)
737 {
738         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
739
740         switch (level) {
741         case SND_SOC_BIAS_ON:
742                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE)
743                         wm0010_boot(component);
744                 break;
745         case SND_SOC_BIAS_PREPARE:
746                 break;
747         case SND_SOC_BIAS_STANDBY:
748                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE) {
749                         mutex_lock(&wm0010->lock);
750                         wm0010_halt(component);
751                         mutex_unlock(&wm0010->lock);
752                 }
753                 break;
754         case SND_SOC_BIAS_OFF:
755                 break;
756         }
757
758         return 0;
759 }
760
761 static int wm0010_set_sysclk(struct snd_soc_component *component, int source,
762                              int clk_id, unsigned int freq, int dir)
763 {
764         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
765         unsigned int i;
766
767         wm0010->sysclk = freq;
768
769         if (freq < pll_clock_map[ARRAY_SIZE(pll_clock_map)-1].max_sysclk) {
770                 wm0010->max_spi_freq = 0;
771         } else {
772                 for (i = 0; i < ARRAY_SIZE(pll_clock_map); i++)
773                         if (freq >= pll_clock_map[i].max_sysclk) {
774                                 wm0010->max_spi_freq = pll_clock_map[i].max_pll_spi_speed;
775                                 wm0010->pll_clkctrl1 = pll_clock_map[i].pll_clkctrl1;
776                                 break;
777                         }
778         }
779
780         return 0;
781 }
782
783 static int wm0010_probe(struct snd_soc_component *component);
784
785 static const struct snd_soc_component_driver soc_component_dev_wm0010 = {
786         .probe                  = wm0010_probe,
787         .set_bias_level         = wm0010_set_bias_level,
788         .set_sysclk             = wm0010_set_sysclk,
789         .dapm_widgets           = wm0010_dapm_widgets,
790         .num_dapm_widgets       = ARRAY_SIZE(wm0010_dapm_widgets),
791         .dapm_routes            = wm0010_dapm_routes,
792         .num_dapm_routes        = ARRAY_SIZE(wm0010_dapm_routes),
793         .use_pmdown_time        = 1,
794         .endianness             = 1,
795         .non_legacy_dai_naming  = 1,
796 };
797
798 #define WM0010_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
799 #define WM0010_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
800                         SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\
801                         SNDRV_PCM_FMTBIT_S32_LE)
802
803 static struct snd_soc_dai_driver wm0010_dai[] = {
804         {
805                 .name = "wm0010-sdi1",
806                 .playback = {
807                         .stream_name = "SDI1 Playback",
808                         .channels_min = 1,
809                         .channels_max = 2,
810                         .rates = WM0010_RATES,
811                         .formats = WM0010_FORMATS,
812                 },
813                 .capture = {
814                          .stream_name = "SDI1 Capture",
815                          .channels_min = 1,
816                          .channels_max = 2,
817                          .rates = WM0010_RATES,
818                          .formats = WM0010_FORMATS,
819                  },
820         },
821         {
822                 .name = "wm0010-sdi2",
823                 .playback = {
824                         .stream_name = "SDI2 Playback",
825                         .channels_min = 1,
826                         .channels_max = 2,
827                         .rates = WM0010_RATES,
828                         .formats = WM0010_FORMATS,
829                 },
830                 .capture = {
831                          .stream_name = "SDI2 Capture",
832                          .channels_min = 1,
833                          .channels_max = 2,
834                          .rates = WM0010_RATES,
835                          .formats = WM0010_FORMATS,
836                  },
837         },
838 };
839
840 static irqreturn_t wm0010_irq(int irq, void *data)
841 {
842         struct wm0010_priv *wm0010 = data;
843
844         switch (wm0010->state) {
845         case WM0010_OUT_OF_RESET:
846         case WM0010_BOOTROM:
847         case WM0010_STAGE2:
848                 spin_lock(&wm0010->irq_lock);
849                 complete(&wm0010->boot_completion);
850                 spin_unlock(&wm0010->irq_lock);
851                 return IRQ_HANDLED;
852         default:
853                 return IRQ_NONE;
854         }
855
856         return IRQ_NONE;
857 }
858
859 static int wm0010_probe(struct snd_soc_component *component)
860 {
861         struct wm0010_priv *wm0010 = snd_soc_component_get_drvdata(component);
862
863         wm0010->component = component;
864
865         return 0;
866 }
867
868 static int wm0010_spi_probe(struct spi_device *spi)
869 {
870         unsigned long gpio_flags;
871         int ret;
872         int trigger;
873         int irq;
874         struct wm0010_priv *wm0010;
875
876         wm0010 = devm_kzalloc(&spi->dev, sizeof(*wm0010),
877                               GFP_KERNEL);
878         if (!wm0010)
879                 return -ENOMEM;
880
881         mutex_init(&wm0010->lock);
882         spin_lock_init(&wm0010->irq_lock);
883
884         spi_set_drvdata(spi, wm0010);
885         wm0010->dev = &spi->dev;
886
887         if (dev_get_platdata(&spi->dev))
888                 memcpy(&wm0010->pdata, dev_get_platdata(&spi->dev),
889                        sizeof(wm0010->pdata));
890
891         init_completion(&wm0010->boot_completion);
892
893         wm0010->core_supplies[0].supply = "AVDD";
894         wm0010->core_supplies[1].supply = "DCVDD";
895         ret = devm_regulator_bulk_get(wm0010->dev, ARRAY_SIZE(wm0010->core_supplies),
896                                       wm0010->core_supplies);
897         if (ret != 0) {
898                 dev_err(wm0010->dev, "Failed to obtain core supplies: %d\n",
899                         ret);
900                 return ret;
901         }
902
903         wm0010->dbvdd = devm_regulator_get(wm0010->dev, "DBVDD");
904         if (IS_ERR(wm0010->dbvdd)) {
905                 ret = PTR_ERR(wm0010->dbvdd);
906                 dev_err(wm0010->dev, "Failed to obtain DBVDD: %d\n", ret);
907                 return ret;
908         }
909
910         if (wm0010->pdata.gpio_reset) {
911                 wm0010->gpio_reset = wm0010->pdata.gpio_reset;
912
913                 if (wm0010->pdata.reset_active_high)
914                         wm0010->gpio_reset_value = 1;
915                 else
916                         wm0010->gpio_reset_value = 0;
917
918                 if (wm0010->gpio_reset_value)
919                         gpio_flags = GPIOF_OUT_INIT_HIGH;
920                 else
921                         gpio_flags = GPIOF_OUT_INIT_LOW;
922
923                 ret = devm_gpio_request_one(wm0010->dev, wm0010->gpio_reset,
924                                             gpio_flags, "wm0010 reset");
925                 if (ret < 0) {
926                         dev_err(wm0010->dev,
927                                 "Failed to request GPIO for DSP reset: %d\n",
928                                 ret);
929                         return ret;
930                 }
931         } else {
932                 dev_err(wm0010->dev, "No reset GPIO configured\n");
933                 return -EINVAL;
934         }
935
936         wm0010->state = WM0010_POWER_OFF;
937
938         irq = spi->irq;
939         if (wm0010->pdata.irq_flags)
940                 trigger = wm0010->pdata.irq_flags;
941         else
942                 trigger = IRQF_TRIGGER_FALLING;
943         trigger |= IRQF_ONESHOT;
944
945         ret = request_threaded_irq(irq, NULL, wm0010_irq, trigger,
946                                    "wm0010", wm0010);
947         if (ret) {
948                 dev_err(wm0010->dev, "Failed to request IRQ %d: %d\n",
949                         irq, ret);
950                 return ret;
951         }
952         wm0010->irq = irq;
953
954         ret = irq_set_irq_wake(irq, 1);
955         if (ret) {
956                 dev_err(wm0010->dev, "Failed to set IRQ %d as wake source: %d\n",
957                         irq, ret);
958                 return ret;
959         }
960
961         if (spi->max_speed_hz)
962                 wm0010->board_max_spi_speed = spi->max_speed_hz;
963         else
964                 wm0010->board_max_spi_speed = 0;
965
966         ret = devm_snd_soc_register_component(&spi->dev,
967                                      &soc_component_dev_wm0010, wm0010_dai,
968                                      ARRAY_SIZE(wm0010_dai));
969         if (ret < 0)
970                 return ret;
971
972         return 0;
973 }
974
975 static int wm0010_spi_remove(struct spi_device *spi)
976 {
977         struct wm0010_priv *wm0010 = spi_get_drvdata(spi);
978
979         gpio_set_value_cansleep(wm0010->gpio_reset,
980                                 wm0010->gpio_reset_value);
981
982         irq_set_irq_wake(wm0010->irq, 0);
983
984         if (wm0010->irq)
985                 free_irq(wm0010->irq, wm0010);
986
987         return 0;
988 }
989
990 static struct spi_driver wm0010_spi_driver = {
991         .driver = {
992                 .name   = "wm0010",
993         },
994         .probe          = wm0010_spi_probe,
995         .remove         = wm0010_spi_remove,
996 };
997
998 module_spi_driver(wm0010_spi_driver);
999
1000 MODULE_DESCRIPTION("ASoC WM0010 driver");
1001 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1002 MODULE_LICENSE("GPL");