1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
5 * Copyright 2015 Realtek Semiconductor Corp.
6 * Author: Bard Liao <bardliao@realtek.com>
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/platform_device.h>
17 #include <linux/spi/spi.h>
18 #include <linux/acpi.h>
19 #include <linux/gpio.h>
20 #include <linux/gpio/consumer.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/jack.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/rt5659.h>
34 static const struct reg_default rt5659_reg[] = {
531 static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
535 case RT5659_EJD_CTRL_2:
536 case RT5659_SILENCE_CTRL:
537 case RT5659_DAC2_DIG_VOL:
538 case RT5659_HP_IMP_GAIN_2:
539 case RT5659_PDM_OUT_CTRL:
540 case RT5659_PDM_DATA_CTRL_1:
541 case RT5659_PDM_DATA_CTRL_4:
542 case RT5659_HAPTIC_GEN_CTRL_1:
543 case RT5659_HAPTIC_GEN_CTRL_3:
544 case RT5659_HAPTIC_LPF_CTRL_3:
546 case RT5659_MICBIAS_1:
548 case RT5659_ADC_EQ_CTRL_1:
549 case RT5659_DAC_EQ_CTRL_1:
550 case RT5659_INT_ST_1:
551 case RT5659_INT_ST_2:
552 case RT5659_GPIO_STA:
553 case RT5659_SINE_GEN_CTRL_1:
554 case RT5659_IL_CMD_1:
555 case RT5659_4BTN_IL_CMD_1:
556 case RT5659_PSV_IL_CMD_1:
557 case RT5659_AJD1_CTRL:
558 case RT5659_AJD2_AJD3_CTRL:
559 case RT5659_JD_CTRL_3:
560 case RT5659_VENDOR_ID:
561 case RT5659_VENDOR_ID_1:
562 case RT5659_DEVICE_ID:
563 case RT5659_MEMORY_TEST:
564 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
565 case RT5659_VOL_TEST:
566 case RT5659_STO_NG2_CTRL_1:
567 case RT5659_STO_NG2_CTRL_5:
568 case RT5659_STO_NG2_CTRL_6:
569 case RT5659_STO_NG2_CTRL_7:
570 case RT5659_MONO_NG2_CTRL_1:
571 case RT5659_MONO_NG2_CTRL_5:
572 case RT5659_MONO_NG2_CTRL_6:
573 case RT5659_HP_IMP_SENS_CTRL_1:
574 case RT5659_HP_IMP_SENS_CTRL_3:
575 case RT5659_HP_IMP_SENS_CTRL_4:
576 case RT5659_HP_CALIB_CTRL_1:
577 case RT5659_HP_CALIB_CTRL_9:
578 case RT5659_HP_CALIB_STA_1:
579 case RT5659_HP_CALIB_STA_2:
580 case RT5659_HP_CALIB_STA_3:
581 case RT5659_HP_CALIB_STA_4:
582 case RT5659_HP_CALIB_STA_5:
583 case RT5659_HP_CALIB_STA_6:
584 case RT5659_HP_CALIB_STA_7:
585 case RT5659_HP_CALIB_STA_8:
586 case RT5659_HP_CALIB_STA_9:
587 case RT5659_MONO_AMP_CALIB_CTRL_1:
588 case RT5659_MONO_AMP_CALIB_CTRL_3:
589 case RT5659_MONO_AMP_CALIB_STA_1:
590 case RT5659_MONO_AMP_CALIB_STA_2:
591 case RT5659_MONO_AMP_CALIB_STA_3:
592 case RT5659_MONO_AMP_CALIB_STA_4:
593 case RT5659_SPK_PWR_LMT_STA_1:
594 case RT5659_SPK_PWR_LMT_STA_2:
595 case RT5659_SPK_PWR_LMT_STA_3:
596 case RT5659_SPK_PWR_LMT_STA_4:
597 case RT5659_SPK_PWR_LMT_STA_5:
598 case RT5659_SPK_PWR_LMT_STA_6:
599 case RT5659_SPK_DC_CAILB_CTRL_1:
600 case RT5659_SPK_DC_CAILB_STA_1:
601 case RT5659_SPK_DC_CAILB_STA_2:
602 case RT5659_SPK_DC_CAILB_STA_3:
603 case RT5659_SPK_DC_CAILB_STA_4:
604 case RT5659_SPK_DC_CAILB_STA_5:
605 case RT5659_SPK_DC_CAILB_STA_6:
606 case RT5659_SPK_DC_CAILB_STA_7:
607 case RT5659_SPK_DC_CAILB_STA_8:
608 case RT5659_SPK_DC_CAILB_STA_9:
609 case RT5659_SPK_DC_CAILB_STA_10:
610 case RT5659_SPK_VDD_STA_1:
611 case RT5659_SPK_VDD_STA_2:
612 case RT5659_SPK_DC_DET_CTRL_1:
613 case RT5659_PURE_DC_DET_CTRL_1:
614 case RT5659_PURE_DC_DET_CTRL_2:
615 case RT5659_DRC1_PRIV_1:
616 case RT5659_DRC1_PRIV_4:
617 case RT5659_DRC1_PRIV_5:
618 case RT5659_DRC1_PRIV_6:
619 case RT5659_DRC1_PRIV_7:
620 case RT5659_DRC2_PRIV_1:
621 case RT5659_DRC2_PRIV_4:
622 case RT5659_DRC2_PRIV_5:
623 case RT5659_DRC2_PRIV_6:
624 case RT5659_DRC2_PRIV_7:
625 case RT5659_ALC_PGA_STA_1:
626 case RT5659_ALC_PGA_STA_2:
627 case RT5659_ALC_PGA_STA_3:
634 static bool rt5659_readable_register(struct device *dev, unsigned int reg)
641 case RT5659_MONO_OUT:
642 case RT5659_HPL_GAIN:
643 case RT5659_HPR_GAIN:
644 case RT5659_MONO_GAIN:
645 case RT5659_SPDIF_CTRL_1:
646 case RT5659_SPDIF_CTRL_2:
647 case RT5659_CAL_BST_CTRL:
650 case RT5659_INL1_INR1_VOL:
651 case RT5659_EJD_CTRL_1:
652 case RT5659_EJD_CTRL_2:
653 case RT5659_EJD_CTRL_3:
654 case RT5659_SILENCE_CTRL:
655 case RT5659_PSV_CTRL:
656 case RT5659_SIDETONE_CTRL:
657 case RT5659_DAC1_DIG_VOL:
658 case RT5659_DAC2_DIG_VOL:
659 case RT5659_DAC_CTRL:
660 case RT5659_STO1_ADC_DIG_VOL:
661 case RT5659_MONO_ADC_DIG_VOL:
662 case RT5659_STO2_ADC_DIG_VOL:
663 case RT5659_STO1_BOOST:
664 case RT5659_MONO_BOOST:
665 case RT5659_STO2_BOOST:
666 case RT5659_HP_IMP_GAIN_1:
667 case RT5659_HP_IMP_GAIN_2:
668 case RT5659_STO1_ADC_MIXER:
669 case RT5659_MONO_ADC_MIXER:
670 case RT5659_AD_DA_MIXER:
671 case RT5659_STO_DAC_MIXER:
672 case RT5659_MONO_DAC_MIXER:
673 case RT5659_DIG_MIXER:
674 case RT5659_A_DAC_MUX:
675 case RT5659_DIG_INF23_DATA:
676 case RT5659_PDM_OUT_CTRL:
677 case RT5659_PDM_DATA_CTRL_1:
678 case RT5659_PDM_DATA_CTRL_2:
679 case RT5659_PDM_DATA_CTRL_3:
680 case RT5659_PDM_DATA_CTRL_4:
681 case RT5659_SPDIF_CTRL:
682 case RT5659_REC1_GAIN:
683 case RT5659_REC1_L1_MIXER:
684 case RT5659_REC1_L2_MIXER:
685 case RT5659_REC1_R1_MIXER:
686 case RT5659_REC1_R2_MIXER:
688 case RT5659_REC2_L1_MIXER:
689 case RT5659_REC2_L2_MIXER:
690 case RT5659_REC2_R1_MIXER:
691 case RT5659_REC2_R2_MIXER:
692 case RT5659_SPK_L_MIXER:
693 case RT5659_SPK_R_MIXER:
694 case RT5659_SPO_AMP_GAIN:
695 case RT5659_ALC_BACK_GAIN:
696 case RT5659_MONOMIX_GAIN:
697 case RT5659_MONOMIX_IN_GAIN:
698 case RT5659_OUT_L_GAIN:
699 case RT5659_OUT_L_MIXER:
700 case RT5659_OUT_R_GAIN:
701 case RT5659_OUT_R_MIXER:
702 case RT5659_LOUT_MIXER:
703 case RT5659_HAPTIC_GEN_CTRL_1:
704 case RT5659_HAPTIC_GEN_CTRL_2:
705 case RT5659_HAPTIC_GEN_CTRL_3:
706 case RT5659_HAPTIC_GEN_CTRL_4:
707 case RT5659_HAPTIC_GEN_CTRL_5:
708 case RT5659_HAPTIC_GEN_CTRL_6:
709 case RT5659_HAPTIC_GEN_CTRL_7:
710 case RT5659_HAPTIC_GEN_CTRL_8:
711 case RT5659_HAPTIC_GEN_CTRL_9:
712 case RT5659_HAPTIC_GEN_CTRL_10:
713 case RT5659_HAPTIC_GEN_CTRL_11:
714 case RT5659_HAPTIC_LPF_CTRL_1:
715 case RT5659_HAPTIC_LPF_CTRL_2:
716 case RT5659_HAPTIC_LPF_CTRL_3:
717 case RT5659_PWR_DIG_1:
718 case RT5659_PWR_DIG_2:
719 case RT5659_PWR_ANLG_1:
720 case RT5659_PWR_ANLG_2:
721 case RT5659_PWR_ANLG_3:
722 case RT5659_PWR_MIXER:
724 case RT5659_PRIV_INDEX:
726 case RT5659_PRIV_DATA:
727 case RT5659_PRE_DIV_1:
728 case RT5659_PRE_DIV_2:
729 case RT5659_I2S1_SDP:
730 case RT5659_I2S2_SDP:
731 case RT5659_I2S3_SDP:
732 case RT5659_ADDA_CLK_1:
733 case RT5659_ADDA_CLK_2:
734 case RT5659_DMIC_CTRL_1:
735 case RT5659_DMIC_CTRL_2:
736 case RT5659_TDM_CTRL_1:
737 case RT5659_TDM_CTRL_2:
738 case RT5659_TDM_CTRL_3:
739 case RT5659_TDM_CTRL_4:
740 case RT5659_TDM_CTRL_5:
742 case RT5659_PLL_CTRL_1:
743 case RT5659_PLL_CTRL_2:
757 case RT5659_HP_CHARGE_PUMP_1:
758 case RT5659_HP_CHARGE_PUMP_2:
759 case RT5659_MICBIAS_1:
760 case RT5659_MICBIAS_2:
764 case RT5659_REC_M1_M2_GAIN_CTRL:
765 case RT5659_RC_CLK_CTRL:
766 case RT5659_CLASSD_CTRL_1:
767 case RT5659_CLASSD_CTRL_2:
768 case RT5659_ADC_EQ_CTRL_1:
769 case RT5659_ADC_EQ_CTRL_2:
770 case RT5659_DAC_EQ_CTRL_1:
771 case RT5659_DAC_EQ_CTRL_2:
772 case RT5659_DAC_EQ_CTRL_3:
773 case RT5659_IRQ_CTRL_1:
774 case RT5659_IRQ_CTRL_2:
775 case RT5659_IRQ_CTRL_3:
776 case RT5659_IRQ_CTRL_4:
777 case RT5659_IRQ_CTRL_5:
778 case RT5659_IRQ_CTRL_6:
779 case RT5659_INT_ST_1:
780 case RT5659_INT_ST_2:
781 case RT5659_GPIO_CTRL_1:
782 case RT5659_GPIO_CTRL_2:
783 case RT5659_GPIO_CTRL_3:
784 case RT5659_GPIO_CTRL_4:
785 case RT5659_GPIO_CTRL_5:
786 case RT5659_GPIO_STA:
787 case RT5659_SINE_GEN_CTRL_1:
788 case RT5659_SINE_GEN_CTRL_2:
789 case RT5659_SINE_GEN_CTRL_3:
790 case RT5659_HP_AMP_DET_CTRL_1:
791 case RT5659_HP_AMP_DET_CTRL_2:
792 case RT5659_SV_ZCD_1:
793 case RT5659_SV_ZCD_2:
794 case RT5659_IL_CMD_1:
795 case RT5659_IL_CMD_2:
796 case RT5659_IL_CMD_3:
797 case RT5659_IL_CMD_4:
798 case RT5659_4BTN_IL_CMD_1:
799 case RT5659_4BTN_IL_CMD_2:
800 case RT5659_4BTN_IL_CMD_3:
801 case RT5659_PSV_IL_CMD_1:
802 case RT5659_PSV_IL_CMD_2:
803 case RT5659_ADC_STO1_HP_CTRL_1:
804 case RT5659_ADC_STO1_HP_CTRL_2:
805 case RT5659_ADC_MONO_HP_CTRL_1:
806 case RT5659_ADC_MONO_HP_CTRL_2:
807 case RT5659_AJD1_CTRL:
808 case RT5659_AJD2_AJD3_CTRL:
812 case RT5659_JD_CTRL_1:
813 case RT5659_JD_CTRL_2:
814 case RT5659_JD_CTRL_3:
815 case RT5659_JD_CTRL_4:
816 case RT5659_DIG_MISC:
819 case RT5659_VENDOR_ID:
820 case RT5659_VENDOR_ID_1:
821 case RT5659_DEVICE_ID:
822 case RT5659_DAC_ADC_DIG_VOL:
823 case RT5659_BIAS_CUR_CTRL_1:
824 case RT5659_BIAS_CUR_CTRL_2:
825 case RT5659_BIAS_CUR_CTRL_3:
826 case RT5659_BIAS_CUR_CTRL_4:
827 case RT5659_BIAS_CUR_CTRL_5:
828 case RT5659_BIAS_CUR_CTRL_6:
829 case RT5659_BIAS_CUR_CTRL_7:
830 case RT5659_BIAS_CUR_CTRL_8:
831 case RT5659_BIAS_CUR_CTRL_9:
832 case RT5659_BIAS_CUR_CTRL_10:
833 case RT5659_MEMORY_TEST:
834 case RT5659_VREF_REC_OP_FB_CAP_CTRL:
835 case RT5659_CLASSD_0:
836 case RT5659_CLASSD_1:
837 case RT5659_CLASSD_2:
838 case RT5659_CLASSD_3:
839 case RT5659_CLASSD_4:
840 case RT5659_CLASSD_5:
841 case RT5659_CLASSD_6:
842 case RT5659_CLASSD_7:
843 case RT5659_CLASSD_8:
844 case RT5659_CLASSD_9:
845 case RT5659_CLASSD_10:
846 case RT5659_CHARGE_PUMP_1:
847 case RT5659_CHARGE_PUMP_2:
848 case RT5659_DIG_IN_CTRL_1:
849 case RT5659_DIG_IN_CTRL_2:
850 case RT5659_PAD_DRIVING_CTRL:
851 case RT5659_SOFT_RAMP_DEPOP:
853 case RT5659_CHOP_DAC:
854 case RT5659_CHOP_ADC:
855 case RT5659_CALIB_ADC_CTRL:
856 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
857 case RT5659_VOL_TEST:
858 case RT5659_TEST_MODE_CTRL_1:
859 case RT5659_TEST_MODE_CTRL_2:
860 case RT5659_TEST_MODE_CTRL_3:
861 case RT5659_TEST_MODE_CTRL_4:
862 case RT5659_BASSBACK_CTRL:
863 case RT5659_MP3_PLUS_CTRL_1:
864 case RT5659_MP3_PLUS_CTRL_2:
865 case RT5659_MP3_HPF_A1:
866 case RT5659_MP3_HPF_A2:
867 case RT5659_MP3_HPF_H0:
868 case RT5659_MP3_LPF_H0:
869 case RT5659_3D_SPK_CTRL:
870 case RT5659_3D_SPK_COEF_1:
871 case RT5659_3D_SPK_COEF_2:
872 case RT5659_3D_SPK_COEF_3:
873 case RT5659_3D_SPK_COEF_4:
874 case RT5659_3D_SPK_COEF_5:
875 case RT5659_3D_SPK_COEF_6:
876 case RT5659_3D_SPK_COEF_7:
877 case RT5659_STO_NG2_CTRL_1:
878 case RT5659_STO_NG2_CTRL_2:
879 case RT5659_STO_NG2_CTRL_3:
880 case RT5659_STO_NG2_CTRL_4:
881 case RT5659_STO_NG2_CTRL_5:
882 case RT5659_STO_NG2_CTRL_6:
883 case RT5659_STO_NG2_CTRL_7:
884 case RT5659_STO_NG2_CTRL_8:
885 case RT5659_MONO_NG2_CTRL_1:
886 case RT5659_MONO_NG2_CTRL_2:
887 case RT5659_MONO_NG2_CTRL_3:
888 case RT5659_MONO_NG2_CTRL_4:
889 case RT5659_MONO_NG2_CTRL_5:
890 case RT5659_MONO_NG2_CTRL_6:
891 case RT5659_MID_HP_AMP_DET:
892 case RT5659_LOW_HP_AMP_DET:
893 case RT5659_LDO_CTRL:
894 case RT5659_HP_DECROSS_CTRL_1:
895 case RT5659_HP_DECROSS_CTRL_2:
896 case RT5659_HP_DECROSS_CTRL_3:
897 case RT5659_HP_DECROSS_CTRL_4:
898 case RT5659_HP_IMP_SENS_CTRL_1:
899 case RT5659_HP_IMP_SENS_CTRL_2:
900 case RT5659_HP_IMP_SENS_CTRL_3:
901 case RT5659_HP_IMP_SENS_CTRL_4:
902 case RT5659_HP_IMP_SENS_MAP_1:
903 case RT5659_HP_IMP_SENS_MAP_2:
904 case RT5659_HP_IMP_SENS_MAP_3:
905 case RT5659_HP_IMP_SENS_MAP_4:
906 case RT5659_HP_IMP_SENS_MAP_5:
907 case RT5659_HP_IMP_SENS_MAP_6:
908 case RT5659_HP_IMP_SENS_MAP_7:
909 case RT5659_HP_IMP_SENS_MAP_8:
910 case RT5659_HP_LOGIC_CTRL_1:
911 case RT5659_HP_LOGIC_CTRL_2:
912 case RT5659_HP_CALIB_CTRL_1:
913 case RT5659_HP_CALIB_CTRL_2:
914 case RT5659_HP_CALIB_CTRL_3:
915 case RT5659_HP_CALIB_CTRL_4:
916 case RT5659_HP_CALIB_CTRL_5:
917 case RT5659_HP_CALIB_CTRL_6:
918 case RT5659_HP_CALIB_CTRL_7:
919 case RT5659_HP_CALIB_CTRL_9:
920 case RT5659_HP_CALIB_CTRL_10:
921 case RT5659_HP_CALIB_CTRL_11:
922 case RT5659_HP_CALIB_STA_1:
923 case RT5659_HP_CALIB_STA_2:
924 case RT5659_HP_CALIB_STA_3:
925 case RT5659_HP_CALIB_STA_4:
926 case RT5659_HP_CALIB_STA_5:
927 case RT5659_HP_CALIB_STA_6:
928 case RT5659_HP_CALIB_STA_7:
929 case RT5659_HP_CALIB_STA_8:
930 case RT5659_HP_CALIB_STA_9:
931 case RT5659_MONO_AMP_CALIB_CTRL_1:
932 case RT5659_MONO_AMP_CALIB_CTRL_2:
933 case RT5659_MONO_AMP_CALIB_CTRL_3:
934 case RT5659_MONO_AMP_CALIB_CTRL_4:
935 case RT5659_MONO_AMP_CALIB_CTRL_5:
936 case RT5659_MONO_AMP_CALIB_STA_1:
937 case RT5659_MONO_AMP_CALIB_STA_2:
938 case RT5659_MONO_AMP_CALIB_STA_3:
939 case RT5659_MONO_AMP_CALIB_STA_4:
940 case RT5659_SPK_PWR_LMT_CTRL_1:
941 case RT5659_SPK_PWR_LMT_CTRL_2:
942 case RT5659_SPK_PWR_LMT_CTRL_3:
943 case RT5659_SPK_PWR_LMT_STA_1:
944 case RT5659_SPK_PWR_LMT_STA_2:
945 case RT5659_SPK_PWR_LMT_STA_3:
946 case RT5659_SPK_PWR_LMT_STA_4:
947 case RT5659_SPK_PWR_LMT_STA_5:
948 case RT5659_SPK_PWR_LMT_STA_6:
949 case RT5659_FLEX_SPK_BST_CTRL_1:
950 case RT5659_FLEX_SPK_BST_CTRL_2:
951 case RT5659_FLEX_SPK_BST_CTRL_3:
952 case RT5659_FLEX_SPK_BST_CTRL_4:
953 case RT5659_SPK_EX_LMT_CTRL_1:
954 case RT5659_SPK_EX_LMT_CTRL_2:
955 case RT5659_SPK_EX_LMT_CTRL_3:
956 case RT5659_SPK_EX_LMT_CTRL_4:
957 case RT5659_SPK_EX_LMT_CTRL_5:
958 case RT5659_SPK_EX_LMT_CTRL_6:
959 case RT5659_SPK_EX_LMT_CTRL_7:
960 case RT5659_ADJ_HPF_CTRL_1:
961 case RT5659_ADJ_HPF_CTRL_2:
962 case RT5659_SPK_DC_CAILB_CTRL_1:
963 case RT5659_SPK_DC_CAILB_CTRL_2:
964 case RT5659_SPK_DC_CAILB_CTRL_3:
965 case RT5659_SPK_DC_CAILB_CTRL_4:
966 case RT5659_SPK_DC_CAILB_CTRL_5:
967 case RT5659_SPK_DC_CAILB_STA_1:
968 case RT5659_SPK_DC_CAILB_STA_2:
969 case RT5659_SPK_DC_CAILB_STA_3:
970 case RT5659_SPK_DC_CAILB_STA_4:
971 case RT5659_SPK_DC_CAILB_STA_5:
972 case RT5659_SPK_DC_CAILB_STA_6:
973 case RT5659_SPK_DC_CAILB_STA_7:
974 case RT5659_SPK_DC_CAILB_STA_8:
975 case RT5659_SPK_DC_CAILB_STA_9:
976 case RT5659_SPK_DC_CAILB_STA_10:
977 case RT5659_SPK_VDD_STA_1:
978 case RT5659_SPK_VDD_STA_2:
979 case RT5659_SPK_DC_DET_CTRL_1:
980 case RT5659_SPK_DC_DET_CTRL_2:
981 case RT5659_SPK_DC_DET_CTRL_3:
982 case RT5659_PURE_DC_DET_CTRL_1:
983 case RT5659_PURE_DC_DET_CTRL_2:
987 case RT5659_DRC1_CTRL_1:
988 case RT5659_DRC1_CTRL_2:
989 case RT5659_DRC1_CTRL_3:
990 case RT5659_DRC1_CTRL_4:
991 case RT5659_DRC1_CTRL_5:
992 case RT5659_DRC1_CTRL_6:
993 case RT5659_DRC1_HARD_LMT_CTRL_1:
994 case RT5659_DRC1_HARD_LMT_CTRL_2:
995 case RT5659_DRC2_CTRL_1:
996 case RT5659_DRC2_CTRL_2:
997 case RT5659_DRC2_CTRL_3:
998 case RT5659_DRC2_CTRL_4:
999 case RT5659_DRC2_CTRL_5:
1000 case RT5659_DRC2_CTRL_6:
1001 case RT5659_DRC2_HARD_LMT_CTRL_1:
1002 case RT5659_DRC2_HARD_LMT_CTRL_2:
1003 case RT5659_DRC1_PRIV_1:
1004 case RT5659_DRC1_PRIV_2:
1005 case RT5659_DRC1_PRIV_3:
1006 case RT5659_DRC1_PRIV_4:
1007 case RT5659_DRC1_PRIV_5:
1008 case RT5659_DRC1_PRIV_6:
1009 case RT5659_DRC1_PRIV_7:
1010 case RT5659_DRC2_PRIV_1:
1011 case RT5659_DRC2_PRIV_2:
1012 case RT5659_DRC2_PRIV_3:
1013 case RT5659_DRC2_PRIV_4:
1014 case RT5659_DRC2_PRIV_5:
1015 case RT5659_DRC2_PRIV_6:
1016 case RT5659_DRC2_PRIV_7:
1017 case RT5659_MULTI_DRC_CTRL:
1018 case RT5659_CROSS_OVER_1:
1019 case RT5659_CROSS_OVER_2:
1020 case RT5659_CROSS_OVER_3:
1021 case RT5659_CROSS_OVER_4:
1022 case RT5659_CROSS_OVER_5:
1023 case RT5659_CROSS_OVER_6:
1024 case RT5659_CROSS_OVER_7:
1025 case RT5659_CROSS_OVER_8:
1026 case RT5659_CROSS_OVER_9:
1027 case RT5659_CROSS_OVER_10:
1028 case RT5659_ALC_PGA_CTRL_1:
1029 case RT5659_ALC_PGA_CTRL_2:
1030 case RT5659_ALC_PGA_CTRL_3:
1031 case RT5659_ALC_PGA_CTRL_4:
1032 case RT5659_ALC_PGA_CTRL_5:
1033 case RT5659_ALC_PGA_CTRL_6:
1034 case RT5659_ALC_PGA_CTRL_7:
1035 case RT5659_ALC_PGA_CTRL_8:
1036 case RT5659_ALC_PGA_STA_1:
1037 case RT5659_ALC_PGA_STA_2:
1038 case RT5659_ALC_PGA_STA_3:
1039 case RT5659_DAC_L_EQ_PRE_VOL:
1040 case RT5659_DAC_R_EQ_PRE_VOL:
1041 case RT5659_DAC_L_EQ_POST_VOL:
1042 case RT5659_DAC_R_EQ_POST_VOL:
1043 case RT5659_DAC_L_EQ_LPF1_A1:
1044 case RT5659_DAC_L_EQ_LPF1_H0:
1045 case RT5659_DAC_R_EQ_LPF1_A1:
1046 case RT5659_DAC_R_EQ_LPF1_H0:
1047 case RT5659_DAC_L_EQ_BPF2_A1:
1048 case RT5659_DAC_L_EQ_BPF2_A2:
1049 case RT5659_DAC_L_EQ_BPF2_H0:
1050 case RT5659_DAC_R_EQ_BPF2_A1:
1051 case RT5659_DAC_R_EQ_BPF2_A2:
1052 case RT5659_DAC_R_EQ_BPF2_H0:
1053 case RT5659_DAC_L_EQ_BPF3_A1:
1054 case RT5659_DAC_L_EQ_BPF3_A2:
1055 case RT5659_DAC_L_EQ_BPF3_H0:
1056 case RT5659_DAC_R_EQ_BPF3_A1:
1057 case RT5659_DAC_R_EQ_BPF3_A2:
1058 case RT5659_DAC_R_EQ_BPF3_H0:
1059 case RT5659_DAC_L_EQ_BPF4_A1:
1060 case RT5659_DAC_L_EQ_BPF4_A2:
1061 case RT5659_DAC_L_EQ_BPF4_H0:
1062 case RT5659_DAC_R_EQ_BPF4_A1:
1063 case RT5659_DAC_R_EQ_BPF4_A2:
1064 case RT5659_DAC_R_EQ_BPF4_H0:
1065 case RT5659_DAC_L_EQ_HPF1_A1:
1066 case RT5659_DAC_L_EQ_HPF1_H0:
1067 case RT5659_DAC_R_EQ_HPF1_A1:
1068 case RT5659_DAC_R_EQ_HPF1_H0:
1069 case RT5659_DAC_L_EQ_HPF2_A1:
1070 case RT5659_DAC_L_EQ_HPF2_A2:
1071 case RT5659_DAC_L_EQ_HPF2_H0:
1072 case RT5659_DAC_R_EQ_HPF2_A1:
1073 case RT5659_DAC_R_EQ_HPF2_A2:
1074 case RT5659_DAC_R_EQ_HPF2_H0:
1075 case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1076 case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1077 case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1078 case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1079 case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1080 case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1081 case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1082 case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1083 case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1084 case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1085 case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1086 case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1087 case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1088 case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1089 case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1090 case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1091 case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1092 case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1093 case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1094 case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1095 case RT5659_ADC_L_EQ_LPF1_A1:
1096 case RT5659_ADC_R_EQ_LPF1_A1:
1097 case RT5659_ADC_L_EQ_LPF1_H0:
1098 case RT5659_ADC_R_EQ_LPF1_H0:
1099 case RT5659_ADC_L_EQ_BPF1_A1:
1100 case RT5659_ADC_R_EQ_BPF1_A1:
1101 case RT5659_ADC_L_EQ_BPF1_A2:
1102 case RT5659_ADC_R_EQ_BPF1_A2:
1103 case RT5659_ADC_L_EQ_BPF1_H0:
1104 case RT5659_ADC_R_EQ_BPF1_H0:
1105 case RT5659_ADC_L_EQ_BPF2_A1:
1106 case RT5659_ADC_R_EQ_BPF2_A1:
1107 case RT5659_ADC_L_EQ_BPF2_A2:
1108 case RT5659_ADC_R_EQ_BPF2_A2:
1109 case RT5659_ADC_L_EQ_BPF2_H0:
1110 case RT5659_ADC_R_EQ_BPF2_H0:
1111 case RT5659_ADC_L_EQ_BPF3_A1:
1112 case RT5659_ADC_R_EQ_BPF3_A1:
1113 case RT5659_ADC_L_EQ_BPF3_A2:
1114 case RT5659_ADC_R_EQ_BPF3_A2:
1115 case RT5659_ADC_L_EQ_BPF3_H0:
1116 case RT5659_ADC_R_EQ_BPF3_H0:
1117 case RT5659_ADC_L_EQ_BPF4_A1:
1118 case RT5659_ADC_R_EQ_BPF4_A1:
1119 case RT5659_ADC_L_EQ_BPF4_A2:
1120 case RT5659_ADC_R_EQ_BPF4_A2:
1121 case RT5659_ADC_L_EQ_BPF4_H0:
1122 case RT5659_ADC_R_EQ_BPF4_H0:
1123 case RT5659_ADC_L_EQ_HPF1_A1:
1124 case RT5659_ADC_R_EQ_HPF1_A1:
1125 case RT5659_ADC_L_EQ_HPF1_H0:
1126 case RT5659_ADC_R_EQ_HPF1_H0:
1127 case RT5659_ADC_L_EQ_PRE_VOL:
1128 case RT5659_ADC_R_EQ_PRE_VOL:
1129 case RT5659_ADC_L_EQ_POST_VOL:
1130 case RT5659_ADC_R_EQ_POST_VOL:
1137 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1138 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1139 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1140 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1141 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1142 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1143 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1145 /* Interface data select */
1146 static const char * const rt5659_data_select[] = {
1147 "L/R", "R/L", "L/L", "R/R"
1150 static SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1151 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1153 static SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1154 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1156 static SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1157 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1159 static SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1160 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1162 static SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1163 RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1165 static SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1166 RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1168 static SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1169 RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1171 static SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1172 RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1174 static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1175 SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1177 static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1178 SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1180 static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1181 SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1183 static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1184 SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1186 static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1187 SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1189 static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1190 SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1192 static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1193 SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1195 static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1196 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1198 static const char * const rt5659_asrc_clk_src[] = {
1199 "clk_sysy_div_out", "clk_i2s1_track", "clk_i2s2_track",
1200 "clk_i2s3_track", "clk_sys2", "clk_sys3"
1203 static unsigned int rt5659_asrc_clk_map_values[] = {
1207 static SOC_VALUE_ENUM_SINGLE_DECL(
1208 rt5659_da_sto_asrc_enum, RT5659_ASRC_2, RT5659_DA_STO_T_SFT, 0x7,
1209 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1211 static SOC_VALUE_ENUM_SINGLE_DECL(
1212 rt5659_da_monol_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_L_T_SFT, 0x7,
1213 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1215 static SOC_VALUE_ENUM_SINGLE_DECL(
1216 rt5659_da_monor_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_R_T_SFT, 0x7,
1217 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1219 static SOC_VALUE_ENUM_SINGLE_DECL(
1220 rt5659_ad_sto1_asrc_enum, RT5659_ASRC_2, RT5659_AD_STO1_T_SFT, 0x7,
1221 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1223 static SOC_VALUE_ENUM_SINGLE_DECL(
1224 rt5659_ad_sto2_asrc_enum, RT5659_ASRC_3, RT5659_AD_STO2_T_SFT, 0x7,
1225 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1227 static SOC_VALUE_ENUM_SINGLE_DECL(
1228 rt5659_ad_monol_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_L_T_SFT, 0x7,
1229 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1231 static SOC_VALUE_ENUM_SINGLE_DECL(
1232 rt5659_ad_monor_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_R_T_SFT, 0x7,
1233 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1235 static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1236 struct snd_ctl_elem_value *ucontrol)
1238 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1239 int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1241 if (snd_soc_component_read32(component, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1242 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1243 RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1244 snd_soc_component_update_bits(component, RT5659_STO_NG2_CTRL_1,
1245 RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1251 static void rt5659_enable_push_button_irq(struct snd_soc_component *component,
1254 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1257 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, 0x000b);
1259 /* MICBIAS1 and Mic Det Power for button detect*/
1260 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1261 snd_soc_dapm_force_enable_pin(dapm,
1263 snd_soc_dapm_sync(dapm);
1265 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_2,
1266 RT5659_PWR_MB1, RT5659_PWR_MB1);
1267 snd_soc_component_update_bits(component, RT5659_PWR_VOL,
1268 RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1270 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1271 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1272 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1273 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1275 snd_soc_component_update_bits(component, RT5659_4BTN_IL_CMD_2,
1276 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1277 snd_soc_component_update_bits(component, RT5659_IRQ_CTRL_2,
1278 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1279 /* MICBIAS1 and Mic Det Power for button detect*/
1280 snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1281 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1282 snd_soc_dapm_sync(dapm);
1287 * rt5659_headset_detect - Detect headset.
1288 * @component: SoC audio component device.
1289 * @jack_insert: Jack insert or not.
1291 * Detect whether is headset or not when jack inserted.
1293 * Returns detect status.
1296 static int rt5659_headset_detect(struct snd_soc_component *component, int jack_insert)
1298 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
1299 int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1302 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1305 snd_soc_dapm_force_enable_pin(dapm,
1307 snd_soc_dapm_sync(dapm);
1308 reg_63 = snd_soc_component_read32(component, RT5659_PWR_ANLG_1);
1310 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1311 RT5659_PWR_VREF2 | RT5659_PWR_MB,
1312 RT5659_PWR_VREF2 | RT5659_PWR_MB);
1314 snd_soc_component_update_bits(component, RT5659_PWR_ANLG_1,
1315 RT5659_PWR_FV2, RT5659_PWR_FV2);
1317 snd_soc_component_write(component, RT5659_EJD_CTRL_2, 0x4160);
1318 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1321 snd_soc_component_update_bits(component, RT5659_EJD_CTRL_1,
1325 msleep(sleep_time[i]);
1326 val = snd_soc_component_read32(component, RT5659_EJD_CTRL_2) & 0x0003;
1328 if (val == 0x1 || val == 0x2 || val == 0x3)
1334 rt5659->jack_type = SND_JACK_HEADSET;
1335 rt5659_enable_push_button_irq(component, true);
1338 snd_soc_component_write(component, RT5659_PWR_ANLG_1, reg_63);
1339 rt5659->jack_type = SND_JACK_HEADPHONE;
1340 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1341 snd_soc_dapm_sync(dapm);
1345 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1346 snd_soc_dapm_sync(dapm);
1347 if (rt5659->jack_type == SND_JACK_HEADSET)
1348 rt5659_enable_push_button_irq(component, false);
1349 rt5659->jack_type = 0;
1352 dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1353 return rt5659->jack_type;
1356 static int rt5659_button_detect(struct snd_soc_component *component)
1360 val = snd_soc_component_read32(component, RT5659_4BTN_IL_CMD_1);
1361 btn_type = val & 0xfff0;
1362 snd_soc_component_write(component, RT5659_4BTN_IL_CMD_1, val);
1367 static irqreturn_t rt5659_irq(int irq, void *data)
1369 struct rt5659_priv *rt5659 = data;
1371 queue_delayed_work(system_power_efficient_wq,
1372 &rt5659->jack_detect_work, msecs_to_jiffies(250));
1377 int rt5659_set_jack_detect(struct snd_soc_component *component,
1378 struct snd_soc_jack *hs_jack)
1380 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1382 rt5659->hs_jack = hs_jack;
1384 rt5659_irq(0, rt5659);
1388 EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1390 static void rt5659_jack_detect_work(struct work_struct *work)
1392 struct rt5659_priv *rt5659 =
1393 container_of(work, struct rt5659_priv, jack_detect_work.work);
1394 int val, btn_type, report = 0;
1396 if (!rt5659->component)
1399 val = snd_soc_component_read32(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1402 if (rt5659->jack_type == 0) {
1403 /* jack was out, report jack type */
1404 report = rt5659_headset_detect(rt5659->component, 1);
1406 /* jack is already in, report button event */
1407 report = SND_JACK_HEADSET;
1408 btn_type = rt5659_button_detect(rt5659->component);
1410 * rt5659 can report three kinds of button behavior,
1411 * one click, double click and hold. However,
1412 * currently we will report button pressed/released
1413 * event. So all the three button behaviors are
1414 * treated as button pressed.
1420 report |= SND_JACK_BTN_0;
1425 report |= SND_JACK_BTN_1;
1430 report |= SND_JACK_BTN_2;
1435 report |= SND_JACK_BTN_3;
1437 case 0x0000: /* unpressed */
1441 dev_err(rt5659->component->dev,
1442 "Unexpected button code 0x%04x\n",
1447 /* button release or spurious interrput*/
1449 report = rt5659->jack_type;
1453 report = rt5659_headset_detect(rt5659->component, 0);
1456 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1457 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1458 SND_JACK_BTN_2 | SND_JACK_BTN_3);
1461 static void rt5659_jack_detect_intel_hd_header(struct work_struct *work)
1463 struct rt5659_priv *rt5659 =
1464 container_of(work, struct rt5659_priv, jack_detect_work.work);
1466 bool hp_flag, mic_flag;
1468 if (!rt5659->hs_jack)
1471 /* headphone jack */
1472 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1473 hp_flag = (!(value & 0x8)) ? true : false;
1475 if (hp_flag != rt5659->hda_hp_plugged) {
1476 rt5659->hda_hp_plugged = hp_flag;
1479 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1481 rt5659->jack_type |= SND_JACK_HEADPHONE;
1483 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1485 rt5659->jack_type = rt5659->jack_type &
1486 (~SND_JACK_HEADPHONE);
1489 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1490 SND_JACK_HEADPHONE);
1494 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1495 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1496 mic_flag = (value & 0x2000) ? true : false;
1498 if (mic_flag != rt5659->hda_mic_plugged) {
1499 rt5659->hda_mic_plugged = mic_flag;
1501 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1503 rt5659->jack_type |= SND_JACK_MICROPHONE;
1505 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1507 rt5659->jack_type = rt5659->jack_type
1508 & (~SND_JACK_MICROPHONE);
1511 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1512 SND_JACK_MICROPHONE);
1516 static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1517 /* Speaker Output Volume */
1518 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1519 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1521 /* Headphone Output Volume */
1522 SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1523 RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1524 rt5659_hp_vol_put, hp_vol_tlv),
1526 /* Mono Output Volume */
1527 SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1528 RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1531 SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1532 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1534 /* DAC Digital Volume */
1535 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1536 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1537 SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1538 RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1540 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1541 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1542 SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1543 RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1545 /* IN1/IN2/IN3/IN4 Volume */
1546 SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1547 RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1548 SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1549 RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1550 SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1551 RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1552 SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1553 RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1555 /* INL/INR Volume Control */
1556 SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1557 RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1559 /* ADC Digital Volume Control */
1560 SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1561 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1562 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1563 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1564 SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1565 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1566 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1567 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1568 SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1569 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1570 SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1571 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1573 /* ADC Boost Volume Control */
1574 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1575 RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1578 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1579 RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1582 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1583 RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1586 SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1587 SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1588 SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1589 SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1593 * set_dmic_clk - Set parameter of dmic.
1596 * @kcontrol: The kcontrol of this widget.
1599 * Choose dmic clock between 1MHz and 3MHz.
1600 * It is better for clock to approximate 3MHz.
1602 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1603 struct snd_kcontrol *kcontrol, int event)
1605 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1606 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
1607 int pd, idx = -EINVAL;
1609 pd = rl6231_get_pre_div(rt5659->regmap,
1610 RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1611 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1614 dev_err(component->dev, "Failed to set DMIC clock\n");
1616 snd_soc_component_update_bits(component, RT5659_DMIC_CTRL_1,
1617 RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1622 static int set_adc1_clk(struct snd_soc_dapm_widget *w,
1623 struct snd_kcontrol *kcontrol, int event)
1625 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1628 case SND_SOC_DAPM_POST_PMU:
1629 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1630 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK,
1631 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK);
1634 case SND_SOC_DAPM_PRE_PMD:
1635 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1636 RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0);
1647 static int set_adc2_clk(struct snd_soc_dapm_widget *w,
1648 struct snd_kcontrol *kcontrol, int event)
1650 struct snd_soc_component *component =
1651 snd_soc_dapm_to_component(w->dapm);
1654 case SND_SOC_DAPM_POST_PMU:
1655 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1656 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK,
1657 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK);
1660 case SND_SOC_DAPM_PRE_PMD:
1661 snd_soc_component_update_bits(component, RT5659_CHOP_ADC,
1662 RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0);
1673 static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1674 struct snd_kcontrol *kcontrol, int event)
1676 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1679 case SND_SOC_DAPM_PRE_PMU:
1681 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0009);
1683 case SND_SOC_DAPM_POST_PMD:
1684 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1693 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1694 struct snd_soc_dapm_widget *sink)
1697 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1699 val = snd_soc_component_read32(component, RT5659_GLB_CLK);
1700 val &= RT5659_SCLK_SRC_MASK;
1701 if (val == RT5659_SCLK_SRC_PLL1)
1707 static int is_using_asrc(struct snd_soc_dapm_widget *w,
1708 struct snd_soc_dapm_widget *sink)
1710 unsigned int reg, shift, val;
1711 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1714 case RT5659_ADC_MONO_R_ASRC_SFT:
1715 reg = RT5659_ASRC_3;
1716 shift = RT5659_AD_MONO_R_T_SFT;
1718 case RT5659_ADC_MONO_L_ASRC_SFT:
1719 reg = RT5659_ASRC_3;
1720 shift = RT5659_AD_MONO_L_T_SFT;
1722 case RT5659_ADC_STO1_ASRC_SFT:
1723 reg = RT5659_ASRC_2;
1724 shift = RT5659_AD_STO1_T_SFT;
1726 case RT5659_DAC_MONO_R_ASRC_SFT:
1727 reg = RT5659_ASRC_2;
1728 shift = RT5659_DA_MONO_R_T_SFT;
1730 case RT5659_DAC_MONO_L_ASRC_SFT:
1731 reg = RT5659_ASRC_2;
1732 shift = RT5659_DA_MONO_L_T_SFT;
1734 case RT5659_DAC_STO_ASRC_SFT:
1735 reg = RT5659_ASRC_2;
1736 shift = RT5659_DA_STO_T_SFT;
1742 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
1747 /* I2S_Pre_Div1 should be 1 in asrc mode */
1748 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
1749 RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1758 static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1759 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1760 RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1761 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1762 RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1765 static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1766 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1767 RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1768 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1769 RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1772 static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1773 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1774 RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1775 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1776 RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1779 static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1780 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1781 RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1782 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1783 RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1786 static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1787 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1788 RT5659_M_ADCMIX_L_SFT, 1, 1),
1789 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1790 RT5659_M_DAC1_L_SFT, 1, 1),
1793 static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1794 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1795 RT5659_M_ADCMIX_R_SFT, 1, 1),
1796 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1797 RT5659_M_DAC1_R_SFT, 1, 1),
1800 static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1801 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1802 RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1803 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1804 RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1805 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1806 RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1807 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1808 RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1811 static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1812 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1813 RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1814 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1815 RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1816 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1817 RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1818 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1819 RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1822 static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1823 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1824 RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1825 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1826 RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1827 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1828 RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1829 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1830 RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1833 static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1834 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1835 RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1836 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1837 RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1838 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1839 RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1840 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1841 RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1844 /* Analog Input Mixer */
1845 static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1846 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1847 RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1848 SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1849 RT5659_M_INL_RM1_L_SFT, 1, 1),
1850 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1851 RT5659_M_BST4_RM1_L_SFT, 1, 1),
1852 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1853 RT5659_M_BST3_RM1_L_SFT, 1, 1),
1854 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1855 RT5659_M_BST2_RM1_L_SFT, 1, 1),
1856 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1857 RT5659_M_BST1_RM1_L_SFT, 1, 1),
1860 static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1861 SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1862 RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1863 SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1864 RT5659_M_INR_RM1_R_SFT, 1, 1),
1865 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1866 RT5659_M_BST4_RM1_R_SFT, 1, 1),
1867 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1868 RT5659_M_BST3_RM1_R_SFT, 1, 1),
1869 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1870 RT5659_M_BST2_RM1_R_SFT, 1, 1),
1871 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1872 RT5659_M_BST1_RM1_R_SFT, 1, 1),
1875 static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1876 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1877 RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1878 SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1879 RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1880 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1881 RT5659_M_BST4_RM2_L_SFT, 1, 1),
1882 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1883 RT5659_M_BST3_RM2_L_SFT, 1, 1),
1884 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1885 RT5659_M_BST2_RM2_L_SFT, 1, 1),
1886 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1887 RT5659_M_BST1_RM2_L_SFT, 1, 1),
1890 static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1891 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1892 RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1893 SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1894 RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1895 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1896 RT5659_M_BST4_RM2_R_SFT, 1, 1),
1897 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1898 RT5659_M_BST3_RM2_R_SFT, 1, 1),
1899 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1900 RT5659_M_BST2_RM2_R_SFT, 1, 1),
1901 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1902 RT5659_M_BST1_RM2_R_SFT, 1, 1),
1905 static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1906 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1907 RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1908 SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1909 RT5659_M_BST1_SM_L_SFT, 1, 1),
1910 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1911 RT5659_M_IN_L_SM_L_SFT, 1, 1),
1912 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1913 RT5659_M_IN_R_SM_L_SFT, 1, 1),
1914 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1915 RT5659_M_BST3_SM_L_SFT, 1, 1),
1918 static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1919 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1920 RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1921 SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1922 RT5659_M_BST4_SM_R_SFT, 1, 1),
1923 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1924 RT5659_M_IN_L_SM_R_SFT, 1, 1),
1925 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1926 RT5659_M_IN_R_SM_R_SFT, 1, 1),
1927 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1928 RT5659_M_BST3_SM_R_SFT, 1, 1),
1931 static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1932 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1933 RT5659_M_DAC_L2_MM_SFT, 1, 1),
1934 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1935 RT5659_M_DAC_R2_MM_SFT, 1, 1),
1936 SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1937 RT5659_M_BST1_MM_SFT, 1, 1),
1938 SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1939 RT5659_M_BST2_MM_SFT, 1, 1),
1940 SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1941 RT5659_M_BST3_MM_SFT, 1, 1),
1944 static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1945 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1946 RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1947 SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1948 RT5659_M_IN_L_OM_L_SFT, 1, 1),
1949 SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1950 RT5659_M_BST1_OM_L_SFT, 1, 1),
1951 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1952 RT5659_M_BST2_OM_L_SFT, 1, 1),
1953 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1954 RT5659_M_BST3_OM_L_SFT, 1, 1),
1957 static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1958 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1959 RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1960 SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1961 RT5659_M_IN_R_OM_R_SFT, 1, 1),
1962 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1963 RT5659_M_BST2_OM_R_SFT, 1, 1),
1964 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1965 RT5659_M_BST3_OM_R_SFT, 1, 1),
1966 SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1967 RT5659_M_BST4_OM_R_SFT, 1, 1),
1970 static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1971 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1972 RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1973 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1974 RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1977 static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1978 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1979 RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1980 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1981 RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1984 static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1985 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1986 RT5659_M_DAC_L2_MA_SFT, 1, 1),
1987 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1988 RT5659_M_MONOVOL_MA_SFT, 1, 1),
1991 static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1992 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1993 RT5659_M_DAC_L2_LM_SFT, 1, 1),
1994 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1995 RT5659_M_OV_L_LM_SFT, 1, 1),
1998 static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
1999 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
2000 RT5659_M_DAC_R2_LM_SFT, 1, 1),
2001 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
2002 RT5659_M_OV_R_LM_SFT, 1, 1),
2006 /*MX-1B [6:4], MX-1B [2:0]*/
2007 static const char * const rt5659_dac2_src[] = {
2008 "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
2011 static SOC_ENUM_SINGLE_DECL(
2012 rt5659_dac_l2_enum, RT5659_DAC_CTRL,
2013 RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
2015 static const struct snd_kcontrol_new rt5659_dac_l2_mux =
2016 SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
2018 static SOC_ENUM_SINGLE_DECL(
2019 rt5659_dac_r2_enum, RT5659_DAC_CTRL,
2020 RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
2022 static const struct snd_kcontrol_new rt5659_dac_r2_mux =
2023 SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
2026 /* STO1 ADC1 Source */
2028 static const char * const rt5659_sto1_adc1_src[] = {
2032 static SOC_ENUM_SINGLE_DECL(
2033 rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
2034 RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
2036 static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
2037 SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
2039 /* STO1 ADC Source */
2041 static const char * const rt5659_sto1_adc_src[] = {
2045 static SOC_ENUM_SINGLE_DECL(
2046 rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
2047 RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
2049 static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
2050 SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
2052 /* STO1 ADC2 Source */
2054 static const char * const rt5659_sto1_adc2_src[] = {
2058 static SOC_ENUM_SINGLE_DECL(
2059 rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
2060 RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
2062 static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
2063 SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2065 /* STO1 DMIC Source */
2067 static const char * const rt5659_sto1_dmic_src[] = {
2071 static SOC_ENUM_SINGLE_DECL(
2072 rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
2073 RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
2075 static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
2076 SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
2079 /* MONO ADC L2 Source */
2081 static const char * const rt5659_mono_adc_l2_src[] = {
2082 "Mono DAC MIXL", "DMIC"
2085 static SOC_ENUM_SINGLE_DECL(
2086 rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2087 RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2089 static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2090 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2093 /* MONO ADC L1 Source */
2095 static const char * const rt5659_mono_adc_l1_src[] = {
2096 "Mono DAC MIXL", "ADC"
2099 static SOC_ENUM_SINGLE_DECL(
2100 rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2101 RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2103 static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2104 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2106 /* MONO ADC L Source, MONO ADC R Source*/
2107 /* MX-27 [10:9], MX-27 [2:1] */
2108 static const char * const rt5659_mono_adc_src[] = {
2109 "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2112 static SOC_ENUM_SINGLE_DECL(
2113 rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2114 RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2116 static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2117 SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2119 static SOC_ENUM_SINGLE_DECL(
2120 rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2121 RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2123 static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2124 SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2126 /* MONO DMIC L Source */
2128 static const char * const rt5659_mono_dmic_l_src[] = {
2129 "DMIC1 L", "DMIC2 L"
2132 static SOC_ENUM_SINGLE_DECL(
2133 rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2134 RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2136 static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2137 SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2139 /* MONO ADC R2 Source */
2141 static const char * const rt5659_mono_adc_r2_src[] = {
2142 "Mono DAC MIXR", "DMIC"
2145 static SOC_ENUM_SINGLE_DECL(
2146 rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2147 RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2149 static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2150 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2152 /* MONO ADC R1 Source */
2154 static const char * const rt5659_mono_adc_r1_src[] = {
2155 "Mono DAC MIXR", "ADC"
2158 static SOC_ENUM_SINGLE_DECL(
2159 rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2160 RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2162 static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2163 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2165 /* MONO DMIC R Source */
2167 static const char * const rt5659_mono_dmic_r_src[] = {
2168 "DMIC1 R", "DMIC2 R"
2171 static SOC_ENUM_SINGLE_DECL(
2172 rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2173 RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2175 static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2176 SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2179 /* DAC R1 Source, DAC L1 Source*/
2180 /* MX-29 [11:10], MX-29 [9:8]*/
2181 static const char * const rt5659_dac1_src[] = {
2182 "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2185 static SOC_ENUM_SINGLE_DECL(
2186 rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2187 RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2189 static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2190 SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2192 static SOC_ENUM_SINGLE_DECL(
2193 rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2194 RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2196 static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2197 SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2199 /* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2200 /* MX-2C [6], MX-2C [4]*/
2201 static const char * const rt5659_dig_dac_mix_src[] = {
2202 "Stereo DAC Mixer", "Mono DAC Mixer"
2205 static SOC_ENUM_SINGLE_DECL(
2206 rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2207 RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2209 static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2210 SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2212 static SOC_ENUM_SINGLE_DECL(
2213 rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2214 RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2216 static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2217 SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2219 /* Analog DAC L1 Source, Analog DAC R1 Source*/
2220 /* MX-2D [3], MX-2D [2]*/
2221 static const char * const rt5659_alg_dac1_src[] = {
2222 "DAC", "Stereo DAC Mixer"
2225 static SOC_ENUM_SINGLE_DECL(
2226 rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2227 RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2229 static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2230 SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2232 static SOC_ENUM_SINGLE_DECL(
2233 rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2234 RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2236 static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2237 SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2239 /* Analog DAC LR Source, Analog DAC R2 Source*/
2240 /* MX-2D [1], MX-2D [0]*/
2241 static const char * const rt5659_alg_dac2_src[] = {
2242 "Stereo DAC Mixer", "Mono DAC Mixer"
2245 static SOC_ENUM_SINGLE_DECL(
2246 rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2247 RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2249 static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2250 SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2252 static SOC_ENUM_SINGLE_DECL(
2253 rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2254 RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2256 static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2257 SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2259 /* Interface2 ADC Data Input*/
2261 static const char * const rt5659_if2_adc_in_src[] = {
2262 "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2265 static SOC_ENUM_SINGLE_DECL(
2266 rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2267 RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2269 static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2270 SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2272 /* Interface3 ADC Data Input*/
2274 static const char * const rt5659_if3_adc_in_src[] = {
2275 "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2278 static SOC_ENUM_SINGLE_DECL(
2279 rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2280 RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2282 static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2283 SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2286 /* MX-31 [15] [13] */
2287 static const char * const rt5659_pdm_src[] = {
2288 "Mono DAC", "Stereo DAC"
2291 static SOC_ENUM_SINGLE_DECL(
2292 rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2293 RT5659_PDM1_L_SFT, rt5659_pdm_src);
2295 static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2296 SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2298 static SOC_ENUM_SINGLE_DECL(
2299 rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2300 RT5659_PDM1_R_SFT, rt5659_pdm_src);
2302 static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2303 SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2305 /* SPDIF Output source*/
2307 static const char * const rt5659_spdif_src[] = {
2308 "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2311 static SOC_ENUM_SINGLE_DECL(
2312 rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2313 RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2315 static const struct snd_kcontrol_new rt5659_spdif_mux =
2316 SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2318 /* I2S1 TDM ADCDAT Source */
2320 static const char * const rt5659_rx_adc_data_src[] = {
2321 "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2322 "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2323 "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2324 "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2325 "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2326 "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2327 "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2328 "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2331 static SOC_ENUM_SINGLE_DECL(
2332 rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2333 RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2335 static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2336 SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2338 /* Out Volume Switch */
2339 static const struct snd_kcontrol_new spkvol_l_switch =
2340 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2342 static const struct snd_kcontrol_new spkvol_r_switch =
2343 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2345 static const struct snd_kcontrol_new monovol_switch =
2346 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2348 static const struct snd_kcontrol_new outvol_l_switch =
2349 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2351 static const struct snd_kcontrol_new outvol_r_switch =
2352 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2355 static const struct snd_kcontrol_new spo_switch =
2356 SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2358 static const struct snd_kcontrol_new mono_switch =
2359 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2361 static const struct snd_kcontrol_new hpo_l_switch =
2362 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2364 static const struct snd_kcontrol_new hpo_r_switch =
2365 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2367 static const struct snd_kcontrol_new lout_l_switch =
2368 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2370 static const struct snd_kcontrol_new lout_r_switch =
2371 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2373 static const struct snd_kcontrol_new pdm_l_switch =
2374 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2377 static const struct snd_kcontrol_new pdm_r_switch =
2378 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2381 static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2382 struct snd_kcontrol *kcontrol, int event)
2384 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2387 case SND_SOC_DAPM_PRE_PMU:
2388 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2389 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2390 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2391 RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2392 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0803);
2393 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2396 case SND_SOC_DAPM_POST_PMD:
2397 snd_soc_component_write(component, RT5659_CLASSD_1, 0x0011);
2398 snd_soc_component_update_bits(component, RT5659_CLASSD_2,
2399 RT5659_M_RI_DIG, 0x0);
2400 snd_soc_component_write(component, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2401 snd_soc_component_update_bits(component, RT5659_CLASSD_CTRL_1,
2402 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2413 static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2414 struct snd_kcontrol *kcontrol, int event)
2416 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2419 case SND_SOC_DAPM_PRE_PMU:
2420 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2423 case SND_SOC_DAPM_POST_PMD:
2424 snd_soc_component_write(component, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2435 static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2436 struct snd_kcontrol *kcontrol, int event)
2438 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2441 case SND_SOC_DAPM_POST_PMU:
2442 snd_soc_component_write(component, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2443 snd_soc_component_update_bits(component, RT5659_DEPOP_1, 0x0010, 0x0010);
2446 case SND_SOC_DAPM_PRE_PMD:
2447 snd_soc_component_write(component, RT5659_DEPOP_1, 0x0000);
2457 static int set_dmic_power(struct snd_soc_dapm_widget *w,
2458 struct snd_kcontrol *kcontrol, int event)
2461 case SND_SOC_DAPM_POST_PMU:
2462 /*Add delay to avoid pop noise*/
2473 static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2474 SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2476 SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2478 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2479 RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2480 SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2481 RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2484 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2485 RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2486 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2487 RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2488 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2489 RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2490 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2491 RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2492 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2493 RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2494 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2495 RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2496 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2497 RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2498 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2499 RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2500 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2501 RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2504 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2506 SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2508 SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2512 SND_SOC_DAPM_INPUT("DMIC L1"),
2513 SND_SOC_DAPM_INPUT("DMIC R1"),
2514 SND_SOC_DAPM_INPUT("DMIC L2"),
2515 SND_SOC_DAPM_INPUT("DMIC R2"),
2517 SND_SOC_DAPM_INPUT("IN1P"),
2518 SND_SOC_DAPM_INPUT("IN1N"),
2519 SND_SOC_DAPM_INPUT("IN2P"),
2520 SND_SOC_DAPM_INPUT("IN2N"),
2521 SND_SOC_DAPM_INPUT("IN3P"),
2522 SND_SOC_DAPM_INPUT("IN3N"),
2523 SND_SOC_DAPM_INPUT("IN4P"),
2524 SND_SOC_DAPM_INPUT("IN4N"),
2526 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2527 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2529 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2530 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2531 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2532 RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2533 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2534 RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2537 SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2538 RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2539 SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2540 RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2541 SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2542 RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2543 SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2544 RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2545 SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2546 RT5659_PWR_BST1_BIT, 0, NULL, 0),
2547 SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2548 RT5659_PWR_BST2_BIT, 0, NULL, 0),
2549 SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2550 RT5659_PWR_BST3_BIT, 0, NULL, 0),
2551 SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2552 RT5659_PWR_BST4_BIT, 0, NULL, 0),
2556 SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2558 SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2562 SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2563 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2564 SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2565 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2566 SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2567 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2568 SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2569 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2572 SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2573 SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2574 SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2575 SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2577 SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2578 RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2579 SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2580 RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2581 SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2582 RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2583 SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2584 RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2585 SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk,
2586 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2587 SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2588 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2591 SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2592 &rt5659_sto1_dmic_mux),
2593 SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2594 &rt5659_sto1_dmic_mux),
2595 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2596 &rt5659_sto1_adc1_mux),
2597 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2598 &rt5659_sto1_adc1_mux),
2599 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2600 &rt5659_sto1_adc2_mux),
2601 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2602 &rt5659_sto1_adc2_mux),
2603 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2604 &rt5659_sto1_adc_mux),
2605 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2606 &rt5659_sto1_adc_mux),
2607 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2608 &rt5659_mono_adc_l2_mux),
2609 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2610 &rt5659_mono_adc_r2_mux),
2611 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2612 &rt5659_mono_adc_l1_mux),
2613 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2614 &rt5659_mono_adc_r1_mux),
2615 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2616 &rt5659_mono_dmic_l_mux),
2617 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2618 &rt5659_mono_dmic_r_mux),
2619 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2620 &rt5659_mono_adc_l_mux),
2621 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2622 &rt5659_mono_adc_r_mux),
2624 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2625 RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2626 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2627 RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2628 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2629 0, 0, rt5659_sto1_adc_l_mix,
2630 ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2631 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2632 0, 0, rt5659_sto1_adc_r_mix,
2633 ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2634 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2635 RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2636 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2637 RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2638 ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2639 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2640 RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2641 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2642 RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2643 ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2646 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2647 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2648 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2649 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2650 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2651 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2652 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2653 SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2655 SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2656 RT5659_L_MUTE_SFT, 1, NULL, 0),
2657 SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2658 RT5659_R_MUTE_SFT, 1, NULL, 0),
2660 /* Digital Interface */
2661 SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2663 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2664 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2665 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2666 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2667 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2668 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2669 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2670 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2671 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2672 SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2674 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2675 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2676 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2677 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2678 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2679 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2680 SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2682 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2683 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2684 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2685 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2686 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2687 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2689 /* Digital Interface Select */
2690 SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2691 SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2692 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2693 &rt5659_rx_adc_dac_mux),
2694 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2695 &rt5659_if2_adc_in_mux),
2696 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2697 &rt5659_if3_adc_in_mux),
2698 SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2699 &rt5659_if1_01_adc_swap_mux),
2700 SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2701 &rt5659_if1_23_adc_swap_mux),
2702 SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2703 &rt5659_if1_45_adc_swap_mux),
2704 SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2705 &rt5659_if1_67_adc_swap_mux),
2706 SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2707 &rt5659_if2_dac_swap_mux),
2708 SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2709 &rt5659_if2_adc_swap_mux),
2710 SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2711 &rt5659_if3_dac_swap_mux),
2712 SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2713 &rt5659_if3_adc_swap_mux),
2715 /* Audio Interface */
2716 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2717 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2718 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2719 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2720 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2721 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2724 /* DAC mixer before sound effect */
2725 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2726 rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2727 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2728 rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2730 /* DAC channel Mux */
2731 SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2732 SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2733 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2734 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2736 SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2737 &rt5659_alg_dac_l1_mux),
2738 SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2739 &rt5659_alg_dac_r1_mux),
2740 SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2741 &rt5659_alg_dac_l2_mux),
2742 SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2743 &rt5659_alg_dac_r2_mux),
2746 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2747 RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2748 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2749 RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2750 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2751 RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2752 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2753 rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2754 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2755 rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2756 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2757 rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2758 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2759 rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2760 SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2761 &rt5659_dig_dac_mixl_mux),
2762 SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2763 &rt5659_dig_dac_mixr_mux),
2766 SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2767 RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2768 SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2769 RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2770 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2771 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2773 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2774 RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2775 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2776 RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2777 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2778 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2779 SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2782 SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2783 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2784 SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2785 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2786 SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2787 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2788 SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2789 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2790 SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2791 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2794 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2796 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2798 SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2800 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2802 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2805 /* SPO/MONO/HPO/LOUT */
2806 SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2807 ARRAY_SIZE(rt5659_spo_l_mix)),
2808 SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2809 ARRAY_SIZE(rt5659_spo_r_mix)),
2810 SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2811 ARRAY_SIZE(rt5659_mono_mix)),
2812 SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2813 ARRAY_SIZE(rt5659_lout_l_mix)),
2814 SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2815 ARRAY_SIZE(rt5659_lout_r_mix)),
2817 SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2818 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2819 SND_SOC_DAPM_PRE_PMU),
2820 SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2821 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2822 SND_SOC_DAPM_PRE_PMU),
2823 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2824 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2825 SND_SOC_DAPM_PGA_S("LOUT Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_LM_BIT,
2828 SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2829 rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2830 SND_SOC_DAPM_POST_PMD),
2832 SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2833 SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2835 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2837 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2839 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2841 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2843 SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2845 SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2849 SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2850 RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2851 SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2852 RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2853 SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2854 RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2857 SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2859 SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2860 SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2863 SND_SOC_DAPM_OUTPUT("HPOL"),
2864 SND_SOC_DAPM_OUTPUT("HPOR"),
2865 SND_SOC_DAPM_OUTPUT("SPOL"),
2866 SND_SOC_DAPM_OUTPUT("SPOR"),
2867 SND_SOC_DAPM_OUTPUT("LOUTL"),
2868 SND_SOC_DAPM_OUTPUT("LOUTR"),
2869 SND_SOC_DAPM_OUTPUT("MONOOUT"),
2870 SND_SOC_DAPM_OUTPUT("PDML"),
2871 SND_SOC_DAPM_OUTPUT("PDMR"),
2872 SND_SOC_DAPM_OUTPUT("SPDIF"),
2875 static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2877 { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2878 { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2879 { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2880 { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2881 { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2882 { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2883 { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2886 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2887 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2888 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2889 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2890 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2891 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2893 { "SYS CLK DET", NULL, "CLKDET" },
2895 { "I2S1", NULL, "I2S1 ASRC" },
2896 { "I2S2", NULL, "I2S2 ASRC" },
2897 { "I2S3", NULL, "I2S3 ASRC" },
2899 { "DMIC1", NULL, "DMIC L1" },
2900 { "DMIC1", NULL, "DMIC R1" },
2901 { "DMIC2", NULL, "DMIC L2" },
2902 { "DMIC2", NULL, "DMIC R2" },
2904 { "BST1", NULL, "IN1P" },
2905 { "BST1", NULL, "IN1N" },
2906 { "BST1", NULL, "BST1 Power" },
2907 { "BST2", NULL, "IN2P" },
2908 { "BST2", NULL, "IN2N" },
2909 { "BST2", NULL, "BST2 Power" },
2910 { "BST3", NULL, "IN3P" },
2911 { "BST3", NULL, "IN3N" },
2912 { "BST3", NULL, "BST3 Power" },
2913 { "BST4", NULL, "IN4P" },
2914 { "BST4", NULL, "IN4N" },
2915 { "BST4", NULL, "BST4 Power" },
2917 { "INL VOL", NULL, "IN2P" },
2918 { "INR VOL", NULL, "IN2N" },
2920 { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2921 { "RECMIX1L", "INL Switch", "INL VOL" },
2922 { "RECMIX1L", "BST4 Switch", "BST4" },
2923 { "RECMIX1L", "BST3 Switch", "BST3" },
2924 { "RECMIX1L", "BST2 Switch", "BST2" },
2925 { "RECMIX1L", "BST1 Switch", "BST1" },
2927 { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2928 { "RECMIX1R", "INR Switch", "INR VOL" },
2929 { "RECMIX1R", "BST4 Switch", "BST4" },
2930 { "RECMIX1R", "BST3 Switch", "BST3" },
2931 { "RECMIX1R", "BST2 Switch", "BST2" },
2932 { "RECMIX1R", "BST1 Switch", "BST1" },
2934 { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2935 { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2936 { "RECMIX2L", "BST4 Switch", "BST4" },
2937 { "RECMIX2L", "BST3 Switch", "BST3" },
2938 { "RECMIX2L", "BST2 Switch", "BST2" },
2939 { "RECMIX2L", "BST1 Switch", "BST1" },
2941 { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2942 { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2943 { "RECMIX2R", "BST4 Switch", "BST4" },
2944 { "RECMIX2R", "BST3 Switch", "BST3" },
2945 { "RECMIX2R", "BST2 Switch", "BST2" },
2946 { "RECMIX2R", "BST1 Switch", "BST1" },
2948 { "ADC1 L", NULL, "RECMIX1L" },
2949 { "ADC1 L", NULL, "ADC1 L Power" },
2950 { "ADC1 L", NULL, "ADC1 clock" },
2951 { "ADC1 R", NULL, "RECMIX1R" },
2952 { "ADC1 R", NULL, "ADC1 R Power" },
2953 { "ADC1 R", NULL, "ADC1 clock" },
2955 { "ADC2 L", NULL, "RECMIX2L" },
2956 { "ADC2 L", NULL, "ADC2 L Power" },
2957 { "ADC2 L", NULL, "ADC2 clock" },
2958 { "ADC2 R", NULL, "RECMIX2R" },
2959 { "ADC2 R", NULL, "ADC2 R Power" },
2960 { "ADC2 R", NULL, "ADC2 clock" },
2962 { "DMIC L1", NULL, "DMIC CLK" },
2963 { "DMIC L1", NULL, "DMIC1 Power" },
2964 { "DMIC R1", NULL, "DMIC CLK" },
2965 { "DMIC R1", NULL, "DMIC1 Power" },
2966 { "DMIC L2", NULL, "DMIC CLK" },
2967 { "DMIC L2", NULL, "DMIC2 Power" },
2968 { "DMIC R2", NULL, "DMIC CLK" },
2969 { "DMIC R2", NULL, "DMIC2 Power" },
2971 { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2972 { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2974 { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2975 { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2977 { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2978 { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2980 { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2981 { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2983 { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2984 { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2985 { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2986 { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2988 { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2989 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2990 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2991 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2993 { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
2994 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2995 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
2996 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2998 { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2999 { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
3000 { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
3001 { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
3003 { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
3004 { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
3005 { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
3006 { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
3008 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
3009 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
3010 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
3011 { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
3013 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
3014 { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
3015 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
3016 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
3018 { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
3019 { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
3020 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
3022 { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
3023 { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
3024 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
3026 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
3027 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
3028 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
3030 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
3031 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
3032 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
3034 { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
3035 { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
3037 { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
3038 { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
3039 { "IF_ADC2", NULL, "Mono ADC MIXL" },
3040 { "IF_ADC2", NULL, "Mono ADC MIXR" },
3042 { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
3043 { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
3044 { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
3045 { "TDM AD2:DAC", NULL, "IF_ADC2" },
3046 { "TDM AD2:DAC", NULL, "DAC_REF" },
3047 { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
3048 { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
3049 { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
3050 { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
3051 { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
3052 { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
3053 { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
3054 { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
3055 { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
3056 { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
3057 { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
3058 { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
3059 { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
3060 { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
3061 { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
3062 { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
3063 { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
3064 { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
3065 { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
3066 { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
3067 { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
3068 { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
3069 { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
3070 { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
3071 { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
3072 { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
3073 { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
3074 { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3075 { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3076 { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3077 { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3078 { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3079 { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3080 { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3081 { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3082 { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3083 { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3084 { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3085 { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3086 { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3087 { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3088 { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3089 { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3090 { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3091 { "IF1 ADC", NULL, "I2S1" },
3093 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3094 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3095 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3096 { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3097 { "IF2 ADC", NULL, "IF2 ADC Mux"},
3098 { "IF2 ADC", NULL, "I2S2" },
3100 { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3101 { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3102 { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3103 { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3104 { "IF3 ADC", NULL, "IF3 ADC Mux"},
3105 { "IF3 ADC", NULL, "I2S3" },
3107 { "AIF1TX", NULL, "IF1 ADC" },
3108 { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3109 { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3110 { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3111 { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3112 { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3113 { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3114 { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3115 { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3116 { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3117 { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3119 { "IF1 DAC1", NULL, "AIF1RX" },
3120 { "IF1 DAC2", NULL, "AIF1RX" },
3121 { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3122 { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3123 { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3124 { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3125 { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3126 { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3127 { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3128 { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3129 { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3130 { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3132 { "IF1 DAC1", NULL, "I2S1" },
3133 { "IF1 DAC2", NULL, "I2S1" },
3134 { "IF2 DAC", NULL, "I2S2" },
3135 { "IF3 DAC", NULL, "I2S3" },
3137 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3138 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3139 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3140 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3141 { "IF2 DAC L", NULL, "IF2 DAC" },
3142 { "IF2 DAC R", NULL, "IF2 DAC" },
3143 { "IF3 DAC L", NULL, "IF3 DAC" },
3144 { "IF3 DAC R", NULL, "IF3 DAC" },
3146 { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3147 { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3148 { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3149 { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3151 { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3152 { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3153 { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3154 { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3156 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3157 { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3158 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3159 { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3161 { "DAC_REF", NULL, "DAC1 MIXL" },
3162 { "DAC_REF", NULL, "DAC1 MIXR" },
3164 { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3165 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3166 { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3167 { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3168 { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3170 { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3171 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3172 { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3173 { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3174 { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3176 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3177 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3178 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3179 { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3181 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3182 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3183 { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3184 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3186 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3187 { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3188 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3189 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3190 { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3191 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3192 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3193 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3195 { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3196 { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3197 { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3198 { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3200 { "DAC L1 Source", NULL, "DAC L1 Power" },
3201 { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3202 { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3203 { "DAC R1 Source", NULL, "DAC R1 Power" },
3204 { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3205 { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3206 { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3207 { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3208 { "DAC L2 Source", NULL, "DAC L2 Power" },
3209 { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3210 { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3211 { "DAC R2 Source", NULL, "DAC R2 Power" },
3213 { "DAC L1", NULL, "DAC L1 Source" },
3214 { "DAC R1", NULL, "DAC R1 Source" },
3215 { "DAC L2", NULL, "DAC L2 Source" },
3216 { "DAC R2", NULL, "DAC R2 Source" },
3218 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3219 { "SPK MIXL", "BST1 Switch", "BST1" },
3220 { "SPK MIXL", "INL Switch", "INL VOL" },
3221 { "SPK MIXL", "INR Switch", "INR VOL" },
3222 { "SPK MIXL", "BST3 Switch", "BST3" },
3223 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3224 { "SPK MIXR", "BST4 Switch", "BST4" },
3225 { "SPK MIXR", "INL Switch", "INL VOL" },
3226 { "SPK MIXR", "INR Switch", "INR VOL" },
3227 { "SPK MIXR", "BST3 Switch", "BST3" },
3229 { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3230 { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3231 { "MONOVOL MIX", "BST1 Switch", "BST1" },
3232 { "MONOVOL MIX", "BST2 Switch", "BST2" },
3233 { "MONOVOL MIX", "BST3 Switch", "BST3" },
3235 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3236 { "OUT MIXL", "INL Switch", "INL VOL" },
3237 { "OUT MIXL", "BST1 Switch", "BST1" },
3238 { "OUT MIXL", "BST2 Switch", "BST2" },
3239 { "OUT MIXL", "BST3 Switch", "BST3" },
3240 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3241 { "OUT MIXR", "INR Switch", "INR VOL" },
3242 { "OUT MIXR", "BST2 Switch", "BST2" },
3243 { "OUT MIXR", "BST3 Switch", "BST3" },
3244 { "OUT MIXR", "BST4 Switch", "BST4" },
3246 { "SPKVOL L", "Switch", "SPK MIXL" },
3247 { "SPKVOL R", "Switch", "SPK MIXR" },
3248 { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3249 { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3250 { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3251 { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3252 { "SPK Amp", NULL, "SPO L MIX" },
3253 { "SPK Amp", NULL, "SPO R MIX" },
3254 { "SPK Amp", NULL, "SYS CLK DET" },
3255 { "SPO Playback", "Switch", "SPK Amp" },
3256 { "SPOL", NULL, "SPO Playback" },
3257 { "SPOR", NULL, "SPO Playback" },
3259 { "MONOVOL", "Switch", "MONOVOL MIX" },
3260 { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3261 { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3262 { "Mono Amp", NULL, "Mono MIX" },
3263 { "Mono Amp", NULL, "Mono Vref" },
3264 { "Mono Amp", NULL, "SYS CLK DET" },
3265 { "Mono Playback", "Switch", "Mono Amp" },
3266 { "MONOOUT", NULL, "Mono Playback" },
3268 { "HP Amp", NULL, "DAC L1" },
3269 { "HP Amp", NULL, "DAC R1" },
3270 { "HP Amp", NULL, "Charge Pump" },
3271 { "HP Amp", NULL, "SYS CLK DET" },
3272 { "HPO L Playback", "Switch", "HP Amp"},
3273 { "HPO R Playback", "Switch", "HP Amp"},
3274 { "HPOL", NULL, "HPO L Playback" },
3275 { "HPOR", NULL, "HPO R Playback" },
3277 { "OUTVOL L", "Switch", "OUT MIXL" },
3278 { "OUTVOL R", "Switch", "OUT MIXR" },
3279 { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3280 { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3281 { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3282 { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3283 { "LOUT Amp", NULL, "LOUT L MIX" },
3284 { "LOUT Amp", NULL, "LOUT R MIX" },
3285 { "LOUT Amp", NULL, "Charge Pump" },
3286 { "LOUT Amp", NULL, "SYS CLK DET" },
3287 { "LOUT L Playback", "Switch", "LOUT Amp" },
3288 { "LOUT R Playback", "Switch", "LOUT Amp" },
3289 { "LOUTL", NULL, "LOUT L Playback" },
3290 { "LOUTR", NULL, "LOUT R Playback" },
3292 { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3293 { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3294 { "PDM L Mux", NULL, "PDM Power" },
3295 { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3296 { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3297 { "PDM R Mux", NULL, "PDM Power" },
3298 { "PDM L Playback", "Switch", "PDM L Mux" },
3299 { "PDM R Playback", "Switch", "PDM R Mux" },
3300 { "PDML", NULL, "PDM L Playback" },
3301 { "PDMR", NULL, "PDM R Playback" },
3303 { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3304 { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3305 { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3306 { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3307 { "SPDIF", NULL, "SPDIF Mux" },
3310 static int rt5659_hw_params(struct snd_pcm_substream *substream,
3311 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3313 struct snd_soc_component *component = dai->component;
3314 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3315 unsigned int val_len = 0, val_clk, mask_clk;
3316 int pre_div, frame_size;
3318 rt5659->lrck[dai->id] = params_rate(params);
3319 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3321 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3322 rt5659->lrck[dai->id], dai->id);
3325 frame_size = snd_soc_params_to_frame_size(params);
3326 if (frame_size < 0) {
3327 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3331 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3332 rt5659->lrck[dai->id], pre_div, dai->id);
3334 switch (params_width(params)) {
3338 val_len |= RT5659_I2S_DL_20;
3341 val_len |= RT5659_I2S_DL_24;
3344 val_len |= RT5659_I2S_DL_8;
3352 mask_clk = RT5659_I2S_PD1_MASK;
3353 val_clk = pre_div << RT5659_I2S_PD1_SFT;
3354 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3355 RT5659_I2S_DL_MASK, val_len);
3358 mask_clk = RT5659_I2S_PD2_MASK;
3359 val_clk = pre_div << RT5659_I2S_PD2_SFT;
3360 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3361 RT5659_I2S_DL_MASK, val_len);
3364 mask_clk = RT5659_I2S_PD3_MASK;
3365 val_clk = pre_div << RT5659_I2S_PD3_SFT;
3366 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3367 RT5659_I2S_DL_MASK, val_len);
3370 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3374 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3376 switch (rt5659->lrck[dai->id]) {
3378 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3379 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3382 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3383 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3386 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3387 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3394 static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3396 struct snd_soc_component *component = dai->component;
3397 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3398 unsigned int reg_val = 0;
3400 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3401 case SND_SOC_DAIFMT_CBM_CFM:
3402 rt5659->master[dai->id] = 1;
3404 case SND_SOC_DAIFMT_CBS_CFS:
3405 reg_val |= RT5659_I2S_MS_S;
3406 rt5659->master[dai->id] = 0;
3412 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3413 case SND_SOC_DAIFMT_NB_NF:
3415 case SND_SOC_DAIFMT_IB_NF:
3416 reg_val |= RT5659_I2S_BP_INV;
3422 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3423 case SND_SOC_DAIFMT_I2S:
3425 case SND_SOC_DAIFMT_LEFT_J:
3426 reg_val |= RT5659_I2S_DF_LEFT;
3428 case SND_SOC_DAIFMT_DSP_A:
3429 reg_val |= RT5659_I2S_DF_PCM_A;
3431 case SND_SOC_DAIFMT_DSP_B:
3432 reg_val |= RT5659_I2S_DF_PCM_B;
3440 snd_soc_component_update_bits(component, RT5659_I2S1_SDP,
3441 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3442 RT5659_I2S_DF_MASK, reg_val);
3445 snd_soc_component_update_bits(component, RT5659_I2S2_SDP,
3446 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3447 RT5659_I2S_DF_MASK, reg_val);
3450 snd_soc_component_update_bits(component, RT5659_I2S3_SDP,
3451 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3452 RT5659_I2S_DF_MASK, reg_val);
3455 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3461 static int rt5659_set_component_sysclk(struct snd_soc_component *component, int clk_id,
3462 int source, unsigned int freq, int dir)
3464 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3465 unsigned int reg_val = 0;
3467 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3471 case RT5659_SCLK_S_MCLK:
3472 reg_val |= RT5659_SCLK_SRC_MCLK;
3474 case RT5659_SCLK_S_PLL1:
3475 reg_val |= RT5659_SCLK_SRC_PLL1;
3477 case RT5659_SCLK_S_RCCLK:
3478 reg_val |= RT5659_SCLK_SRC_RCCLK;
3481 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3484 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3485 RT5659_SCLK_SRC_MASK, reg_val);
3486 rt5659->sysclk = freq;
3487 rt5659->sysclk_src = clk_id;
3489 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3495 static int rt5659_set_component_pll(struct snd_soc_component *component, int pll_id,
3496 int source, unsigned int freq_in,
3497 unsigned int freq_out)
3499 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3500 struct rl6231_pll_code pll_code;
3503 if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3504 freq_out == rt5659->pll_out)
3507 if (!freq_in || !freq_out) {
3508 dev_dbg(component->dev, "PLL disabled\n");
3511 rt5659->pll_out = 0;
3512 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3513 RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3518 case RT5659_PLL1_S_MCLK:
3519 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3520 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3522 case RT5659_PLL1_S_BCLK1:
3523 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3524 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3526 case RT5659_PLL1_S_BCLK2:
3527 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3528 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3530 case RT5659_PLL1_S_BCLK3:
3531 snd_soc_component_update_bits(component, RT5659_GLB_CLK,
3532 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3535 dev_err(component->dev, "Unknown PLL source %d\n", source);
3539 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3541 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
3545 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3546 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3547 pll_code.n_code, pll_code.k_code);
3549 snd_soc_component_write(component, RT5659_PLL_CTRL_1,
3550 pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3551 snd_soc_component_write(component, RT5659_PLL_CTRL_2,
3552 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT |
3553 pll_code.m_bp << RT5659_PLL_M_BP_SFT);
3555 rt5659->pll_in = freq_in;
3556 rt5659->pll_out = freq_out;
3557 rt5659->pll_src = source;
3562 static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3563 unsigned int rx_mask, int slots, int slot_width)
3565 struct snd_soc_component *component = dai->component;
3566 unsigned int val = 0;
3568 if (rx_mask || tx_mask)
3590 switch (slot_width) {
3609 snd_soc_component_update_bits(component, RT5659_TDM_CTRL_1, 0x8ff0, val);
3614 static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3616 struct snd_soc_component *component = dai->component;
3617 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3619 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3621 rt5659->bclk[dai->id] = ratio;
3626 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3627 RT5659_I2S_BCLK_MS2_MASK,
3628 RT5659_I2S_BCLK_MS2_64);
3631 snd_soc_component_update_bits(component, RT5659_ADDA_CLK_1,
3632 RT5659_I2S_BCLK_MS3_MASK,
3633 RT5659_I2S_BCLK_MS3_64);
3641 static int rt5659_set_bias_level(struct snd_soc_component *component,
3642 enum snd_soc_bias_level level)
3644 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3645 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3649 case SND_SOC_BIAS_PREPARE:
3650 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3651 RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3652 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3653 RT5659_PWR_LDO, RT5659_PWR_LDO);
3654 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3655 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3656 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3658 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3659 RT5659_PWR_FV1 | RT5659_PWR_FV2,
3660 RT5659_PWR_FV1 | RT5659_PWR_FV2);
3663 case SND_SOC_BIAS_STANDBY:
3664 if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3665 ret = clk_prepare_enable(rt5659->mclk);
3667 dev_err(component->dev,
3668 "failed to enable MCLK: %d\n", ret);
3674 case SND_SOC_BIAS_OFF:
3675 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3677 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3678 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3679 | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3680 RT5659_PWR_MB | RT5659_PWR_VREF2);
3681 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3682 RT5659_DIG_GATE_CTRL, 0);
3683 clk_disable_unprepare(rt5659->mclk);
3693 static int rt5659_probe(struct snd_soc_component *component)
3695 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3697 rt5659->component = component;
3702 static void rt5659_remove(struct snd_soc_component *component)
3704 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3706 regmap_write(rt5659->regmap, RT5659_RESET, 0);
3710 static int rt5659_suspend(struct snd_soc_component *component)
3712 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3714 regcache_cache_only(rt5659->regmap, true);
3715 regcache_mark_dirty(rt5659->regmap);
3719 static int rt5659_resume(struct snd_soc_component *component)
3721 struct rt5659_priv *rt5659 = snd_soc_component_get_drvdata(component);
3723 regcache_cache_only(rt5659->regmap, false);
3724 regcache_sync(rt5659->regmap);
3729 #define rt5659_suspend NULL
3730 #define rt5659_resume NULL
3733 #define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3734 #define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3735 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3737 static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3738 .hw_params = rt5659_hw_params,
3739 .set_fmt = rt5659_set_dai_fmt,
3740 .set_tdm_slot = rt5659_set_tdm_slot,
3741 .set_bclk_ratio = rt5659_set_bclk_ratio,
3744 static struct snd_soc_dai_driver rt5659_dai[] = {
3746 .name = "rt5659-aif1",
3749 .stream_name = "AIF1 Playback",
3752 .rates = RT5659_STEREO_RATES,
3753 .formats = RT5659_FORMATS,
3756 .stream_name = "AIF1 Capture",
3759 .rates = RT5659_STEREO_RATES,
3760 .formats = RT5659_FORMATS,
3762 .ops = &rt5659_aif_dai_ops,
3765 .name = "rt5659-aif2",
3768 .stream_name = "AIF2 Playback",
3771 .rates = RT5659_STEREO_RATES,
3772 .formats = RT5659_FORMATS,
3775 .stream_name = "AIF2 Capture",
3778 .rates = RT5659_STEREO_RATES,
3779 .formats = RT5659_FORMATS,
3781 .ops = &rt5659_aif_dai_ops,
3784 .name = "rt5659-aif3",
3787 .stream_name = "AIF3 Playback",
3790 .rates = RT5659_STEREO_RATES,
3791 .formats = RT5659_FORMATS,
3794 .stream_name = "AIF3 Capture",
3797 .rates = RT5659_STEREO_RATES,
3798 .formats = RT5659_FORMATS,
3800 .ops = &rt5659_aif_dai_ops,
3804 static const struct snd_soc_component_driver soc_component_dev_rt5659 = {
3805 .probe = rt5659_probe,
3806 .remove = rt5659_remove,
3807 .suspend = rt5659_suspend,
3808 .resume = rt5659_resume,
3809 .set_bias_level = rt5659_set_bias_level,
3810 .controls = rt5659_snd_controls,
3811 .num_controls = ARRAY_SIZE(rt5659_snd_controls),
3812 .dapm_widgets = rt5659_dapm_widgets,
3813 .num_dapm_widgets = ARRAY_SIZE(rt5659_dapm_widgets),
3814 .dapm_routes = rt5659_dapm_routes,
3815 .num_dapm_routes = ARRAY_SIZE(rt5659_dapm_routes),
3816 .set_sysclk = rt5659_set_component_sysclk,
3817 .set_pll = rt5659_set_component_pll,
3818 .use_pmdown_time = 1,
3820 .non_legacy_dai_naming = 1,
3824 static const struct regmap_config rt5659_regmap = {
3827 .max_register = 0x0400,
3828 .volatile_reg = rt5659_volatile_register,
3829 .readable_reg = rt5659_readable_register,
3830 .cache_type = REGCACHE_RBTREE,
3831 .reg_defaults = rt5659_reg,
3832 .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3835 static const struct i2c_device_id rt5659_i2c_id[] = {
3840 MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3842 static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3844 rt5659->pdata.in1_diff = device_property_read_bool(dev,
3845 "realtek,in1-differential");
3846 rt5659->pdata.in3_diff = device_property_read_bool(dev,
3847 "realtek,in3-differential");
3848 rt5659->pdata.in4_diff = device_property_read_bool(dev,
3849 "realtek,in4-differential");
3852 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3853 &rt5659->pdata.dmic1_data_pin);
3854 device_property_read_u32(dev, "realtek,dmic2-data-pin",
3855 &rt5659->pdata.dmic2_data_pin);
3856 device_property_read_u32(dev, "realtek,jd-src",
3857 &rt5659->pdata.jd_src);
3862 static void rt5659_calibrate(struct rt5659_priv *rt5659)
3866 /* Calibrate HPO Start */
3867 /* Fine tune HP Performance */
3868 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3869 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3871 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3872 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3873 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3874 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3875 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3877 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3879 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3881 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3882 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3884 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3885 usleep_range(10000, 10005);
3886 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3888 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3890 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3893 /* Enalbe K ADC Power And Clock */
3894 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3896 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3897 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3898 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3901 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3902 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3903 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3904 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3907 /* Manual K ADC Offset */
3908 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3909 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3910 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3911 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3916 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3918 usleep_range(10000, 10005);
3923 dev_err(rt5659->component->dev,
3924 "HP Calibration 1 Failure\n");
3931 /* Manual K Internal Path Offset */
3932 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3933 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3934 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3935 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3936 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3941 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3943 usleep_range(10000, 10005);
3948 dev_err(rt5659->component->dev,
3949 "HP Calibration 2 Failure\n");
3956 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3957 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3958 /* Calibrate HPO End */
3960 /* Calibrate SPO Start */
3961 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3962 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3963 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3964 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3965 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3966 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3967 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3968 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3969 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3970 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3971 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3972 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3974 /* Enalbe K ADC Power And Clock */
3975 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3976 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3979 /* Start Calibration */
3980 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3981 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3982 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3983 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3988 regmap_read(rt5659->regmap,
3989 RT5659_SPK_DC_CAILB_CTRL_1, &value);
3991 usleep_range(10000, 10005);
3996 dev_err(rt5659->component->dev,
3997 "SPK Calibration Failure\n");
4003 /* Calibrate SPO End */
4005 /* Calibrate MONO Start */
4006 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
4007 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
4008 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
4009 /* MONO NG2 GAIN 5dB */
4010 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
4011 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
4013 /* Start Calibration */
4014 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
4015 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
4016 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4021 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4024 usleep_range(10000, 10005);
4029 dev_err(rt5659->component->dev,
4030 "Mono Calibration Failure\n");
4037 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4038 /* Calibrate MONO End */
4041 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4042 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4043 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4044 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4045 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4046 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4047 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4048 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4049 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4050 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4051 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4052 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4053 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4054 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4055 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4056 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4057 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4058 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4059 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4060 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4061 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4064 static void rt5659_intel_hd_header_probe_setup(struct rt5659_priv *rt5659)
4068 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4069 if (!(value & 0x8)) {
4070 rt5659->hda_hp_plugged = true;
4071 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4074 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4078 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4079 RT5659_PWR_VREF2 | RT5659_PWR_MB,
4080 RT5659_PWR_VREF2 | RT5659_PWR_MB);
4082 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4083 RT5659_PWR_FV2, RT5659_PWR_FV2);
4085 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4087 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4089 regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4090 RT5659_PWR_MIC_DET);
4093 regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4094 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
4095 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4096 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4097 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4099 if (value & 0x2000) {
4100 rt5659->hda_mic_plugged = true;
4101 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4104 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4108 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4109 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
4112 static int rt5659_i2c_probe(struct i2c_client *i2c,
4113 const struct i2c_device_id *id)
4115 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4116 struct rt5659_priv *rt5659;
4120 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4126 i2c_set_clientdata(i2c, rt5659);
4129 rt5659->pdata = *pdata;
4131 rt5659_parse_dt(rt5659, &i2c->dev);
4133 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4135 if (IS_ERR(rt5659->gpiod_ldo1_en))
4136 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4138 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4141 /* Sleep for 300 ms miniumum */
4144 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4145 if (IS_ERR(rt5659->regmap)) {
4146 ret = PTR_ERR(rt5659->regmap);
4147 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4152 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4153 if (val != DEVICE_ID) {
4155 "Device with ID register %x is not rt5659\n", val);
4159 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4161 /* Check if MCLK provided */
4162 rt5659->mclk = devm_clk_get(&i2c->dev, "mclk");
4163 if (IS_ERR(rt5659->mclk)) {
4164 if (PTR_ERR(rt5659->mclk) != -ENOENT)
4165 return PTR_ERR(rt5659->mclk);
4166 /* Otherwise mark the mclk pointer to NULL */
4167 rt5659->mclk = NULL;
4170 rt5659_calibrate(rt5659);
4172 /* line in diff mode*/
4173 if (rt5659->pdata.in1_diff)
4174 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4175 RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4176 if (rt5659->pdata.in3_diff)
4177 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4178 RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4179 if (rt5659->pdata.in4_diff)
4180 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4181 RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4184 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4185 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4186 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4187 RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4189 switch (rt5659->pdata.dmic1_data_pin) {
4190 case RT5659_DMIC1_DATA_IN2N:
4191 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4192 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4195 case RT5659_DMIC1_DATA_GPIO5:
4196 regmap_update_bits(rt5659->regmap,
4198 RT5659_I2S2_PIN_MASK,
4199 RT5659_I2S2_PIN_GPIO);
4200 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4201 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4202 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4203 RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4206 case RT5659_DMIC1_DATA_GPIO9:
4207 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4208 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4209 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4210 RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4213 case RT5659_DMIC1_DATA_GPIO11:
4214 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4215 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4216 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4217 RT5659_GP11_PIN_MASK,
4218 RT5659_GP11_PIN_DMIC1_SDA);
4222 dev_dbg(&i2c->dev, "no DMIC1\n");
4226 switch (rt5659->pdata.dmic2_data_pin) {
4227 case RT5659_DMIC2_DATA_IN2P:
4228 regmap_update_bits(rt5659->regmap,
4230 RT5659_DMIC_2_DP_MASK,
4231 RT5659_DMIC_2_DP_IN2P);
4234 case RT5659_DMIC2_DATA_GPIO6:
4235 regmap_update_bits(rt5659->regmap,
4237 RT5659_DMIC_2_DP_MASK,
4238 RT5659_DMIC_2_DP_GPIO6);
4239 regmap_update_bits(rt5659->regmap,
4241 RT5659_GP6_PIN_MASK,
4242 RT5659_GP6_PIN_DMIC2_SDA);
4245 case RT5659_DMIC2_DATA_GPIO10:
4246 regmap_update_bits(rt5659->regmap,
4248 RT5659_DMIC_2_DP_MASK,
4249 RT5659_DMIC_2_DP_GPIO10);
4250 regmap_update_bits(rt5659->regmap,
4252 RT5659_GP10_PIN_MASK,
4253 RT5659_GP10_PIN_DMIC2_SDA);
4256 case RT5659_DMIC2_DATA_GPIO12:
4257 regmap_update_bits(rt5659->regmap,
4259 RT5659_DMIC_2_DP_MASK,
4260 RT5659_DMIC_2_DP_GPIO12);
4261 regmap_update_bits(rt5659->regmap,
4263 RT5659_GP12_PIN_MASK,
4264 RT5659_GP12_PIN_DMIC2_SDA);
4268 dev_dbg(&i2c->dev, "no DMIC2\n");
4273 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4274 RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4275 RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4276 RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4277 RT5659_GP12_PIN_MASK,
4278 RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4279 RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4280 RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4281 RT5659_GP12_PIN_GPIO12);
4282 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4283 RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4284 RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4287 switch (rt5659->pdata.jd_src) {
4289 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4290 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4291 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4292 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4293 RT5659_PWR_MB, RT5659_PWR_MB);
4294 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4295 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4296 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4297 rt5659_jack_detect_work);
4299 case RT5659_JD_HDA_HEADER:
4300 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4301 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4302 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0);
4303 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000);
4304 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040);
4305 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4306 rt5659_jack_detect_intel_hd_header);
4307 rt5659_intel_hd_header_probe_setup(rt5659);
4314 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4315 rt5659_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4316 | IRQF_ONESHOT, "rt5659", rt5659);
4318 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4320 /* Enable IRQ output for GPIO1 pin any way */
4321 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4322 RT5659_GP1_PIN_MASK, RT5659_GP1_PIN_IRQ);
4325 return devm_snd_soc_register_component(&i2c->dev,
4326 &soc_component_dev_rt5659,
4327 rt5659_dai, ARRAY_SIZE(rt5659_dai));
4330 static void rt5659_i2c_shutdown(struct i2c_client *client)
4332 struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4334 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4338 static const struct of_device_id rt5659_of_match[] = {
4339 { .compatible = "realtek,rt5658", },
4340 { .compatible = "realtek,rt5659", },
4343 MODULE_DEVICE_TABLE(of, rt5659_of_match);
4347 static const struct acpi_device_id rt5659_acpi_match[] = {
4352 MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4355 static struct i2c_driver rt5659_i2c_driver = {
4358 .of_match_table = of_match_ptr(rt5659_of_match),
4359 .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4361 .probe = rt5659_i2c_probe,
4362 .shutdown = rt5659_i2c_shutdown,
4363 .id_table = rt5659_i2c_id,
4365 module_i2c_driver(rt5659_i2c_driver);
4367 MODULE_DESCRIPTION("ASoC RT5659 driver");
4368 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4369 MODULE_LICENSE("GPL v2");
projects / librecmc / linux-libre.git / blob