sound/soc/codecs/rt1308.h

   1 /*
   2  * RT1308.h  --  RT1308 ALSA SoC amplifier component driver
   3  *
   4  * Copyright 2019 Realtek Semiconductor Corp.
   5  * Author: Derek Fang <derek.fang@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #ifndef _RT1308_H_
  13 #define _RT1308_H_
  14
  15 #define RT1308_DEVICE_ID_NUM                    0x10ec1300
  16
  17 #define RT1308_RESET                            0x00
  18 #define RT1308_RESET_N                          0x01
  19 #define RT1308_CLK_GATING                       0x02
  20 #define RT1308_PLL_1                            0x03
  21 #define RT1308_PLL_2                            0x04
  22 #define RT1308_PLL_INT                          0x05
  23 #define RT1308_CLK_1                            0x06
  24 #define RT1308_DATA_PATH                        0x07
  25 #define RT1308_CLK_2                            0x08
  26 #define RT1308_SIL_DET                          0x09
  27 #define RT1308_CLK_DET                          0x0a
  28 #define RT1308_DC_DET                           0x0b
  29 #define RT1308_DC_DET_THRES                     0x0c
  30 #define RT1308_DAC_SET                          0x10
  31 #define RT1308_SRC_SET                          0x11
  32 #define RT1308_DAC_BUF                          0x12
  33 #define RT1308_ADC_SET                          0x13
  34 #define RT1308_ADC_SET_INT                      0x14
  35 #define RT1308_I2S_SET_1                        0x15
  36 #define RT1308_I2S_SET_2                        0x16
  37 #define RT1308_I2C_I2S_SDW_SET                  0x17
  38 #define RT1308_SDW_REG_RW                       0x18
  39 #define RT1308_SDW_REG_RDATA                    0x19
  40 #define RT1308_IV_SENSE                         0x1a
  41 #define RT1308_I2S_TX_DAC_SET                   0x1b
  42 #define RT1308_AD_FILTER_SET                    0x1c
  43 #define RT1308_DC_CAL_1                         0x20
  44 #define RT1308_DC_CAL_2                         0x21
  45 #define RT1308_DC_CAL_L_OFFSET                  0x22
  46 #define RT1308_DC_CAL_R_OFFSET                  0x23
  47 #define RT1308_PVDD_OFFSET_CTL                  0x24
  48 #define RT1308_PVDD_OFFSET_L                    0x25
  49 #define RT1308_PVDD_OFFSET_R                    0x26
  50 #define RT1308_PVDD_OFFSET_PBTL                 0x27
  51 #define RT1308_PVDD_OFFSET_PVDD                 0x28
  52 #define RT1308_CAL_OFFSET_DAC_PBTL              0x29
  53 #define RT1308_CAL_OFFSET_DAC_L                 0x2a
  54 #define RT1308_CAL_OFFSET_DAC_R                 0x2b
  55 #define RT1308_CAL_OFFSET_PWM_L                 0x2c
  56 #define RT1308_CAL_OFFSET_PWM_R                 0x2d
  57 #define RT1308_CAL_PWM_VOS_ADC_L                0x2e
  58 #define RT1308_CAL_PWM_VOS_ADC_R                0x2f
  59 #define RT1308_CLASS_D_SET_1                    0x30
  60 #define RT1308_CLASS_D_SET_2                    0x31
  61 #define RT1308_POWER                            0x32
  62 #define RT1308_LDO                              0x33
  63 #define RT1308_VREF                             0x34
  64 #define RT1308_MBIAS                            0x35
  65 #define RT1308_POWER_STATUS                     0x36
  66 #define RT1308_POWER_INT                        0x37
  67 #define RT1308_SINE_TONE_GEN_1                  0x50
  68 #define RT1308_SINE_TONE_GEN_2                  0x51
  69 #define RT1308_BQ_SET                           0x54
  70 #define RT1308_BQ_PARA_UPDATE                   0x55
  71 #define RT1308_BQ_PRE_VOL_L                     0x56
  72 #define RT1308_BQ_PRE_VOL_R                     0x57
  73 #define RT1308_BQ_POST_VOL_L                    0x58
  74 #define RT1308_BQ_POST_VOL_R                    0x59
  75 #define RT1308_BQ1_L_H0                         0x5b
  76 #define RT1308_BQ1_L_B1                         0x5c
  77 #define RT1308_BQ1_L_B2                         0x5d
  78 #define RT1308_BQ1_L_A1                         0x5e
  79 #define RT1308_BQ1_L_A2                         0x5f
  80 #define RT1308_BQ1_R_H0                         0x60
  81 #define RT1308_BQ1_R_B1                         0x61
  82 #define RT1308_BQ1_R_B2                         0x62
  83 #define RT1308_BQ1_R_A1                         0x63
  84 #define RT1308_BQ1_R_A2                         0x64
  85 #define RT1308_BQ2_L_H0                         0x65
  86 #define RT1308_BQ2_L_B1                         0x66
  87 #define RT1308_BQ2_L_B2                         0x67
  88 #define RT1308_BQ2_L_A1                         0x68
  89 #define RT1308_BQ2_L_A2                         0x69
  90 #define RT1308_BQ2_R_H0                         0x6a
  91 #define RT1308_BQ2_R_B1                         0x6b
  92 #define RT1308_BQ2_R_B2                         0x6c
  93 #define RT1308_BQ2_R_A1                         0x6d
  94 #define RT1308_BQ2_R_A2                         0x6e
  95 #define RT1308_VEN_DEV_ID                       0x70
  96 #define RT1308_VERSION_ID                       0x71
  97 #define RT1308_SPK_BOUND                        0x72
  98 #define RT1308_BQ1_EQ_L_1                       0x73
  99 #define RT1308_BQ1_EQ_L_2                       0x74
 100 #define RT1308_BQ1_EQ_L_3                       0x75
 101 #define RT1308_BQ1_EQ_R_1                       0x76
 102 #define RT1308_BQ1_EQ_R_2                       0x77
 103 #define RT1308_BQ1_EQ_R_3                       0x78
 104 #define RT1308_BQ2_EQ_L_1                       0x79
 105 #define RT1308_BQ2_EQ_L_2                       0x7a
 106 #define RT1308_BQ2_EQ_L_3                       0x7b
 107 #define RT1308_BQ2_EQ_R_1                       0x7c
 108 #define RT1308_BQ2_EQ_R_2                       0x7d
 109 #define RT1308_BQ2_EQ_R_3                       0x7e
 110 #define RT1308_EFUSE_1                          0x7f
 111 #define RT1308_EFUSE_2                          0x80
 112 #define RT1308_EFUSE_PROG_PVDD_L                0x81
 113 #define RT1308_EFUSE_PROG_PVDD_R                0x82
 114 #define RT1308_EFUSE_PROG_R0_L                  0x83
 115 #define RT1308_EFUSE_PROG_R0_R                  0x84
 116 #define RT1308_EFUSE_PROG_DEV                   0x85
 117 #define RT1308_EFUSE_READ_PVDD_L                0x86
 118 #define RT1308_EFUSE_READ_PVDD_R                0x87
 119 #define RT1308_EFUSE_READ_PVDD_PTBL             0x88
 120 #define RT1308_EFUSE_READ_DEV                   0x89
 121 #define RT1308_EFUSE_READ_R0                    0x8a
 122 #define RT1308_EFUSE_READ_ADC_L                 0x8b
 123 #define RT1308_EFUSE_READ_ADC_R                 0x8c
 124 #define RT1308_EFUSE_READ_ADC_PBTL              0x8d
 125 #define RT1308_EFUSE_RESERVE                    0x8e
 126 #define RT1308_PADS_1                           0x90
 127 #define RT1308_PADS_2                           0x91
 128 #define RT1308_TEST_MODE                        0xa0
 129 #define RT1308_TEST_1                           0xa1
 130 #define RT1308_TEST_2                           0xa2
 131 #define RT1308_TEST_3                           0xa3
 132 #define RT1308_TEST_4                           0xa4
 133 #define RT1308_EFUSE_DATA_0_MSB                 0xb0
 134 #define RT1308_EFUSE_DATA_0_LSB                 0xb1
 135 #define RT1308_EFUSE_DATA_1_MSB                 0xb2
 136 #define RT1308_EFUSE_DATA_1_LSB                 0xb3
 137 #define RT1308_EFUSE_DATA_2_MSB                 0xb4
 138 #define RT1308_EFUSE_DATA_2_LSB                 0xb5
 139 #define RT1308_EFUSE_DATA_3_MSB                 0xb6
 140 #define RT1308_EFUSE_DATA_3_LSB                 0xb7
 141 #define RT1308_EFUSE_DATA_TEST_MSB              0xb8
 142 #define RT1308_EFUSE_DATA_TEST_LSB              0xb9
 143 #define RT1308_EFUSE_STATUS_1                   0xba
 144 #define RT1308_EFUSE_STATUS_2                   0xbb
 145 #define RT1308_TCON_1                           0xc0
 146 #define RT1308_TCON_2                           0xc1
 147 #define RT1308_DUMMY_REG                        0xf0
 148 #define RT1308_MAX_REG                          0xff
 149
 150 /* PLL1 M/N/K Code-1 (0x03) */
 151 #define RT1308_PLL1_K_SFT                       24
 152 #define RT1308_PLL1_K_MASK                      (0x1f << 24)
 153 #define RT1308_PLL1_M_BYPASS_MASK               (0x1 << 23)
 154 #define RT1308_PLL1_M_BYPASS_SFT                23
 155 #define RT1308_PLL1_M_BYPASS                    (0x1 << 23)
 156 #define RT1308_PLL1_M_MASK                      (0x3f << 16)
 157 #define RT1308_PLL1_M_SFT                       16
 158 #define RT1308_PLL1_N_MASK                      (0x7f << 8)
 159 #define RT1308_PLL1_N_SFT                       8
 160
 161 /* CLOCK-1 (0x06) */
 162 #define RT1308_DIV_FS_SYS_MASK                  (0xf << 28)
 163 #define RT1308_DIV_FS_SYS_SFT                   28
 164 #define RT1308_SEL_FS_SYS_MASK                  (0x7 << 24)
 165 #define RT1308_SEL_FS_SYS_SFT                   24
 166 #define RT1308_SEL_FS_SYS_SRC_MCLK              (0x0 << 24)
 167 #define RT1308_SEL_FS_SYS_SRC_BCLK              (0x1 << 24)
 168 #define RT1308_SEL_FS_SYS_SRC_PLL               (0x2 << 24)
 169 #define RT1308_SEL_FS_SYS_SRC_RCCLK             (0x4 << 24)
 170
 171 /* CLOCK-2 (0x08) */
 172 #define RT1308_DIV_PRE_PLL_MASK                 (0xf << 28)
 173 #define RT1308_DIV_PRE_PLL_SFT                  28
 174 #define RT1308_SEL_PLL_SRC_MASK                 (0x7 << 24)
 175 #define RT1308_SEL_PLL_SRC_SFT                  24
 176 #define RT1308_SEL_PLL_SRC_MCLK                 (0x0 << 24)
 177 #define RT1308_SEL_PLL_SRC_BCLK                 (0x1 << 24)
 178 #define RT1308_SEL_PLL_SRC_RCCLK                (0x4 << 24)
 179
 180 /* Clock Detect (0x0a) */
 181 #define RT1308_MCLK_DET_EN_MASK                 (0x1 << 25)
 182 #define RT1308_MCLK_DET_EN_SFT                  25
 183 #define RT1308_MCLK_DET_EN                      (0x1 << 25)
 184 #define RT1308_BCLK_DET_EN_MASK                 (0x1 << 24)
 185 #define RT1308_BCLK_DET_EN_SFT                  24
 186 #define RT1308_BCLK_DET_EN                      (0x1 << 24)
 187
 188 /* DAC Setting (0x10) */
 189 #define RT1308_DVOL_MUTE_R_EN_SFT               7
 190 #define RT1308_DVOL_MUTE_L_EN_SFT               6
 191
 192 /* I2S Setting-1 (0x15) */
 193 #define RT1308_I2S_DF_SEL_MASK                  (0x3 << 12)
 194 #define RT1308_I2S_DF_SEL_SFT                   12
 195 #define RT1308_I2S_DF_SEL_I2S                   (0x0 << 12)
 196 #define RT1308_I2S_DF_SEL_LEFT                  (0x1 << 12)
 197 #define RT1308_I2S_DF_SEL_PCM_A                 (0x2 << 12)
 198 #define RT1308_I2S_DF_SEL_PCM_B                 (0x3 << 12)
 199 #define RT1308_I2S_DL_RX_SEL_MASK               (0x7 << 4)
 200 #define RT1308_I2S_DL_RX_SEL_SFT                4
 201 #define RT1308_I2S_DL_RX_SEL_16B                (0x0 << 4)
 202 #define RT1308_I2S_DL_RX_SEL_20B                (0x1 << 4)
 203 #define RT1308_I2S_DL_RX_SEL_24B                (0x2 << 4)
 204 #define RT1308_I2S_DL_RX_SEL_32B                (0x3 << 4)
 205 #define RT1308_I2S_DL_RX_SEL_8B                 (0x4 << 4)
 206 #define RT1308_I2S_DL_TX_SEL_MASK               (0x7 << 0)
 207 #define RT1308_I2S_DL_TX_SEL_SFT                0
 208 #define RT1308_I2S_DL_TX_SEL_16B                (0x0 << 0)
 209 #define RT1308_I2S_DL_TX_SEL_20B                (0x1 << 0)
 210 #define RT1308_I2S_DL_TX_SEL_24B                (0x2 << 0)
 211 #define RT1308_I2S_DL_TX_SEL_32B                (0x3 << 0)
 212 #define RT1308_I2S_DL_TX_SEL_8B                 (0x4 << 0)
 213
 214 /* I2S Setting-2 (0x16) */
 215 #define RT1308_I2S_DL_SEL_MASK                  (0x7 << 24)
 216 #define RT1308_I2S_DL_SEL_SFT                   24
 217 #define RT1308_I2S_DL_SEL_16B                   (0x0 << 24)
 218 #define RT1308_I2S_DL_SEL_20B                   (0x1 << 24)
 219 #define RT1308_I2S_DL_SEL_24B                   (0x2 << 24)
 220 #define RT1308_I2S_DL_SEL_32B                   (0x3 << 24)
 221 #define RT1308_I2S_DL_SEL_8B                    (0x4 << 24)
 222 #define RT1308_I2S_BCLK_MASK                    (0x1 << 14)
 223 #define RT1308_I2S_BCLK_SFT                     14
 224 #define RT1308_I2S_BCLK_NORMAL                  (0x0 << 14)
 225 #define RT1308_I2S_BCLK_INV                     (0x1 << 14)
 226
 227 /* Power Control-1 (0x32) */
 228 #define RT1308_POW_MBIAS20U                     (0x1 << 31)
 229 #define RT1308_POW_MBIAS20U_BIT                 31
 230 #define RT1308_POW_ALDO                         (0x1 << 30)
 231 #define RT1308_POW_ALDO_BIT                     30
 232 #define RT1308_POW_DBG                          (0x1 << 29)
 233 #define RT1308_POW_DBG_BIT                      29
 234 #define RT1308_POW_DACL                         (0x1 << 28)
 235 #define RT1308_POW_DACL_BIT                     28
 236 #define RT1308_POW_DAC1                         (0x1 << 27)
 237 #define RT1308_POW_DAC1_BIT                     27
 238 #define RT1308_POW_CLK25M                       (0x1 << 26)
 239 #define RT1308_POW_CLK25M_BIT                   26
 240 #define RT1308_POW_ADC_R                        (0x1 << 25)
 241 #define RT1308_POW_ADC_R_BIT                    25
 242 #define RT1308_POW_ADC_L                        (0x1 << 24)
 243 #define RT1308_POW_ADC_L_BIT                    24
 244 #define RT1308_POW_DLDO                         (0x1 << 21)
 245 #define RT1308_POW_DLDO_BIT                     21
 246 #define RT1308_POW_VREF                         (0x1 << 20)
 247 #define RT1308_POW_VREF_BIT                     20
 248 #define RT1308_POW_MIXER_R                      (0x1 << 18)
 249 #define RT1308_POW_MIXER_R_BIT                  18
 250 #define RT1308_POW_MIXER_L                      (0x1 << 17)
 251 #define RT1308_POW_MIXER_L_BIT                  17
 252 #define RT1308_POW_MBIAS4U                      (0x1 << 16)
 253 #define RT1308_POW_MBIAS4U_BIT                  16
 254 #define RT1308_POW_PLL2_LDO_EN                  (0x1 << 12)
 255 #define RT1308_POW_PLL2_LDO_EN_BIT              12
 256 #define RT1308_POW_PLL2B_EN                     (0x1 << 11)
 257 #define RT1308_POW_PLL2B_EN_BIT                 11
 258 #define RT1308_POW_PLL2F_EN                     (0x1 << 10)
 259 #define RT1308_POW_PLL2F_EN_BIT                 10
 260 #define RT1308_POW_PLL2F2_EN                    (0x1 << 9)
 261 #define RT1308_POW_PLL2F2_EN_BIT                9
 262 #define RT1308_POW_PLL2B2_EN                    (0x1 << 8)
 263 #define RT1308_POW_PLL2B2_EN_BIT                8
 264
 265 /* Power Control-2 (0x36) */
 266 #define RT1308_POW_PDB_SRC_BIT                  (0x1 << 27)
 267 #define RT1308_POW_PDB_MN_BIT                   (0x1 << 25)
 268 #define RT1308_POW_PDB_REG_BIT                  (0x1 << 24)
 269
 270
 271 /* System Clock Source */
 272 enum {
 273         RT1308_FS_SYS_S_MCLK,
 274         RT1308_FS_SYS_S_BCLK,
 275         RT1308_FS_SYS_S_PLL,
 276         RT1308_FS_SYS_S_RCCLK,  /* 25.0 MHz */
 277 };
 278
 279 /* PLL Source */
 280 enum {
 281         RT1308_PLL_S_MCLK,
 282         RT1308_PLL_S_BCLK,
 283         RT1308_PLL_S_RCCLK,
 284 };
 285
 286 enum {
 287         RT1308_AIF1,
 288         RT1308_AIFS
 289 };
 290
 291 #endif          /* end of _RT1308_H_ */