1 // SPDX-License-Identifier: GPL-2.0-only
3 // Cirrus Logic Madera class codecs common support
5 // Copyright (C) 2015-2019 Cirrus Logic, Inc. and
6 // Cirrus Logic International Semiconductor Ltd.
9 #include <linux/delay.h>
10 #include <linux/gcd.h>
11 #include <linux/module.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/slab.h>
14 #include <sound/pcm.h>
15 #include <sound/pcm_params.h>
16 #include <sound/tlv.h>
18 #include <linux/irqchip/irq-madera.h>
19 #include <linux/mfd/madera/core.h>
20 #include <linux/mfd/madera/registers.h>
21 #include <linux/mfd/madera/pdata.h>
22 #include <sound/madera-pdata.h>
24 #include <dt-bindings/sound/madera.h>
28 #define MADERA_AIF_BCLK_CTRL 0x00
29 #define MADERA_AIF_TX_PIN_CTRL 0x01
30 #define MADERA_AIF_RX_PIN_CTRL 0x02
31 #define MADERA_AIF_RATE_CTRL 0x03
32 #define MADERA_AIF_FORMAT 0x04
33 #define MADERA_AIF_RX_BCLK_RATE 0x06
34 #define MADERA_AIF_FRAME_CTRL_1 0x07
35 #define MADERA_AIF_FRAME_CTRL_2 0x08
36 #define MADERA_AIF_FRAME_CTRL_3 0x09
37 #define MADERA_AIF_FRAME_CTRL_4 0x0A
38 #define MADERA_AIF_FRAME_CTRL_5 0x0B
39 #define MADERA_AIF_FRAME_CTRL_6 0x0C
40 #define MADERA_AIF_FRAME_CTRL_7 0x0D
41 #define MADERA_AIF_FRAME_CTRL_8 0x0E
42 #define MADERA_AIF_FRAME_CTRL_9 0x0F
43 #define MADERA_AIF_FRAME_CTRL_10 0x10
44 #define MADERA_AIF_FRAME_CTRL_11 0x11
45 #define MADERA_AIF_FRAME_CTRL_12 0x12
46 #define MADERA_AIF_FRAME_CTRL_13 0x13
47 #define MADERA_AIF_FRAME_CTRL_14 0x14
48 #define MADERA_AIF_FRAME_CTRL_15 0x15
49 #define MADERA_AIF_FRAME_CTRL_16 0x16
50 #define MADERA_AIF_FRAME_CTRL_17 0x17
51 #define MADERA_AIF_FRAME_CTRL_18 0x18
52 #define MADERA_AIF_TX_ENABLES 0x19
53 #define MADERA_AIF_RX_ENABLES 0x1A
54 #define MADERA_AIF_FORCE_WRITE 0x1B
56 #define MADERA_DSP_CONFIG_1_OFFS 0x00
57 #define MADERA_DSP_CONFIG_2_OFFS 0x02
59 #define MADERA_DSP_CLK_SEL_MASK 0x70000
60 #define MADERA_DSP_CLK_SEL_SHIFT 16
62 #define MADERA_DSP_RATE_MASK 0x7800
63 #define MADERA_DSP_RATE_SHIFT 11
65 #define MADERA_SYSCLK_6MHZ 0
66 #define MADERA_SYSCLK_12MHZ 1
67 #define MADERA_SYSCLK_24MHZ 2
68 #define MADERA_SYSCLK_49MHZ 3
69 #define MADERA_SYSCLK_98MHZ 4
71 #define MADERA_DSPCLK_9MHZ 0
72 #define MADERA_DSPCLK_18MHZ 1
73 #define MADERA_DSPCLK_36MHZ 2
74 #define MADERA_DSPCLK_73MHZ 3
75 #define MADERA_DSPCLK_147MHZ 4
77 #define MADERA_FLL_VCO_CORNER 141900000
78 #define MADERA_FLL_MAX_FREF 13500000
79 #define MADERA_FLL_MAX_N 1023
80 #define MADERA_FLL_MIN_FOUT 90000000
81 #define MADERA_FLL_MAX_FOUT 100000000
82 #define MADERA_FLL_MAX_FRATIO 16
83 #define MADERA_FLL_MAX_REFDIV 8
84 #define MADERA_FLL_OUTDIV 3
85 #define MADERA_FLL_VCO_MULT 3
86 #define MADERA_FLLAO_MAX_FREF 12288000
87 #define MADERA_FLLAO_MIN_N 4
88 #define MADERA_FLLAO_MAX_N 1023
89 #define MADERA_FLLAO_MAX_FBDIV 254
91 #define MADERA_FLL_SYNCHRONISER_OFFS 0x10
92 #define CS47L35_FLL_SYNCHRONISER_OFFS 0xE
93 #define MADERA_FLL_CONTROL_1_OFFS 0x1
94 #define MADERA_FLL_CONTROL_2_OFFS 0x2
95 #define MADERA_FLL_CONTROL_3_OFFS 0x3
96 #define MADERA_FLL_CONTROL_4_OFFS 0x4
97 #define MADERA_FLL_CONTROL_5_OFFS 0x5
98 #define MADERA_FLL_CONTROL_6_OFFS 0x6
99 #define MADERA_FLL_CONTROL_7_OFFS 0x9
100 #define MADERA_FLL_EFS_2_OFFS 0xA
101 #define MADERA_FLL_SYNCHRONISER_1_OFFS 0x1
102 #define MADERA_FLL_SYNCHRONISER_2_OFFS 0x2
103 #define MADERA_FLL_SYNCHRONISER_3_OFFS 0x3
104 #define MADERA_FLL_SYNCHRONISER_4_OFFS 0x4
105 #define MADERA_FLL_SYNCHRONISER_5_OFFS 0x5
106 #define MADERA_FLL_SYNCHRONISER_6_OFFS 0x6
107 #define MADERA_FLL_SYNCHRONISER_7_OFFS 0x7
108 #define MADERA_FLL_SPREAD_SPECTRUM_OFFS 0x9
109 #define MADERA_FLL_GPIO_CLOCK_OFFS 0xA
111 #define MADERA_FLLAO_CONTROL_1_OFFS 0x1
112 #define MADERA_FLLAO_CONTROL_2_OFFS 0x2
113 #define MADERA_FLLAO_CONTROL_3_OFFS 0x3
114 #define MADERA_FLLAO_CONTROL_4_OFFS 0x4
115 #define MADERA_FLLAO_CONTROL_5_OFFS 0x5
116 #define MADERA_FLLAO_CONTROL_6_OFFS 0x6
117 #define MADERA_FLLAO_CONTROL_7_OFFS 0x8
118 #define MADERA_FLLAO_CONTROL_8_OFFS 0xA
119 #define MADERA_FLLAO_CONTROL_9_OFFS 0xB
120 #define MADERA_FLLAO_CONTROL_10_OFFS 0xC
121 #define MADERA_FLLAO_CONTROL_11_OFFS 0xD
123 #define MADERA_FMT_DSP_MODE_A 0
124 #define MADERA_FMT_DSP_MODE_B 1
125 #define MADERA_FMT_I2S_MODE 2
126 #define MADERA_FMT_LEFT_JUSTIFIED_MODE 3
128 #define madera_fll_err(_fll, fmt, ...) \
129 dev_err(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
130 #define madera_fll_warn(_fll, fmt, ...) \
131 dev_warn(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
132 #define madera_fll_dbg(_fll, fmt, ...) \
133 dev_dbg(_fll->madera->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
135 #define madera_aif_err(_dai, fmt, ...) \
136 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
137 #define madera_aif_warn(_dai, fmt, ...) \
138 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
139 #define madera_aif_dbg(_dai, fmt, ...) \
140 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
142 static const int madera_dsp_bus_error_irqs[MADERA_MAX_ADSP] = {
143 MADERA_IRQ_DSP1_BUS_ERR,
144 MADERA_IRQ_DSP2_BUS_ERR,
145 MADERA_IRQ_DSP3_BUS_ERR,
146 MADERA_IRQ_DSP4_BUS_ERR,
147 MADERA_IRQ_DSP5_BUS_ERR,
148 MADERA_IRQ_DSP6_BUS_ERR,
149 MADERA_IRQ_DSP7_BUS_ERR,
152 static void madera_spin_sysclk(struct madera_priv *priv)
154 struct madera *madera = priv->madera;
158 /* Skip this if the chip is down */
159 if (pm_runtime_suspended(madera->dev))
163 * Just read a register a few times to ensure the internal
164 * oscillator sends out a few clocks.
166 for (i = 0; i < 4; i++) {
167 ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &val);
170 "Failed to read sysclk spin %d: %d\n", i, ret);
176 int madera_sysclk_ev(struct snd_soc_dapm_widget *w,
177 struct snd_kcontrol *kcontrol, int event)
179 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
180 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
182 madera_spin_sysclk(priv);
186 EXPORT_SYMBOL_GPL(madera_sysclk_ev);
188 static int madera_check_speaker_overheat(struct madera *madera,
189 bool *warn, bool *shutdown)
194 ret = regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_15, &val);
196 dev_err(madera->dev, "Failed to read thermal status: %d\n",
201 *warn = val & MADERA_SPK_OVERHEAT_WARN_STS1;
202 *shutdown = val & MADERA_SPK_OVERHEAT_STS1;
207 int madera_spk_ev(struct snd_soc_dapm_widget *w,
208 struct snd_kcontrol *kcontrol, int event)
210 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
211 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
212 struct madera *madera = priv->madera;
217 case SND_SOC_DAPM_POST_PMU:
218 ret = madera_check_speaker_overheat(madera, &warn, &shutdown);
223 dev_crit(madera->dev,
224 "Speaker not enabled due to temperature\n");
228 regmap_update_bits(madera->regmap, MADERA_OUTPUT_ENABLES_1,
229 1 << w->shift, 1 << w->shift);
231 case SND_SOC_DAPM_PRE_PMD:
232 regmap_update_bits(madera->regmap, MADERA_OUTPUT_ENABLES_1,
241 EXPORT_SYMBOL_GPL(madera_spk_ev);
243 static irqreturn_t madera_thermal_warn(int irq, void *data)
245 struct madera *madera = data;
249 ret = madera_check_speaker_overheat(madera, &warn, &shutdown);
250 if (ret || shutdown) { /* for safety attempt to shutdown on error */
251 dev_crit(madera->dev, "Thermal shutdown\n");
252 ret = regmap_update_bits(madera->regmap,
253 MADERA_OUTPUT_ENABLES_1,
255 MADERA_OUT4R_ENA, 0);
257 dev_crit(madera->dev,
258 "Failed to disable speaker outputs: %d\n",
261 dev_alert(madera->dev, "Thermal warning\n");
263 dev_info(madera->dev, "Spurious thermal warning\n");
270 int madera_init_overheat(struct madera_priv *priv)
272 struct madera *madera = priv->madera;
273 struct device *dev = madera->dev;
276 ret = madera_request_irq(madera, MADERA_IRQ_SPK_OVERHEAT_WARN,
277 "Thermal warning", madera_thermal_warn,
280 dev_err(dev, "Failed to get thermal warning IRQ: %d\n", ret);
282 ret = madera_request_irq(madera, MADERA_IRQ_SPK_OVERHEAT,
283 "Thermal shutdown", madera_thermal_warn,
286 dev_err(dev, "Failed to get thermal shutdown IRQ: %d\n", ret);
290 EXPORT_SYMBOL_GPL(madera_init_overheat);
292 int madera_free_overheat(struct madera_priv *priv)
294 struct madera *madera = priv->madera;
296 madera_free_irq(madera, MADERA_IRQ_SPK_OVERHEAT_WARN, madera);
297 madera_free_irq(madera, MADERA_IRQ_SPK_OVERHEAT, madera);
301 EXPORT_SYMBOL_GPL(madera_free_overheat);
303 int madera_core_init(struct madera_priv *priv)
307 /* trap undersized array initializers */
308 BUILD_BUG_ON(!madera_mixer_texts[MADERA_NUM_MIXER_INPUTS - 1]);
309 BUILD_BUG_ON(!madera_mixer_values[MADERA_NUM_MIXER_INPUTS - 1]);
311 mutex_init(&priv->rate_lock);
313 for (i = 0; i < MADERA_MAX_HP_OUTPUT; i++)
314 priv->madera->out_clamp[i] = true;
318 EXPORT_SYMBOL_GPL(madera_core_init);
320 int madera_core_free(struct madera_priv *priv)
322 mutex_destroy(&priv->rate_lock);
326 EXPORT_SYMBOL_GPL(madera_core_free);
328 static void madera_debug_dump_domain_groups(const struct madera_priv *priv)
330 struct madera *madera = priv->madera;
333 for (i = 0; i < ARRAY_SIZE(priv->domain_group_ref); ++i)
334 dev_dbg(madera->dev, "domain_grp_ref[%d]=%d\n", i,
335 priv->domain_group_ref[i]);
338 int madera_domain_clk_ev(struct snd_soc_dapm_widget *w,
339 struct snd_kcontrol *kcontrol,
342 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
343 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
344 int dom_grp = w->shift;
346 if (dom_grp >= ARRAY_SIZE(priv->domain_group_ref)) {
347 WARN(true, "%s dom_grp exceeds array size\n", __func__);
352 * We can't rely on the DAPM mutex for locking because we need a lock
353 * that can safely be called in hw_params
355 mutex_lock(&priv->rate_lock);
358 case SND_SOC_DAPM_PRE_PMU:
359 dev_dbg(priv->madera->dev, "Inc ref on domain group %d\n",
361 ++priv->domain_group_ref[dom_grp];
363 case SND_SOC_DAPM_POST_PMD:
364 dev_dbg(priv->madera->dev, "Dec ref on domain group %d\n",
366 --priv->domain_group_ref[dom_grp];
372 madera_debug_dump_domain_groups(priv);
374 mutex_unlock(&priv->rate_lock);
378 EXPORT_SYMBOL_GPL(madera_domain_clk_ev);
380 int madera_out1_demux_put(struct snd_kcontrol *kcontrol,
381 struct snd_ctl_elem_value *ucontrol)
383 struct snd_soc_component *component =
384 snd_soc_dapm_kcontrol_component(kcontrol);
385 struct snd_soc_dapm_context *dapm =
386 snd_soc_dapm_kcontrol_dapm(kcontrol);
387 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
388 struct madera *madera = priv->madera;
389 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
390 unsigned int ep_sel, mux, change;
394 if (ucontrol->value.enumerated.item[0] > e->items - 1)
397 mux = ucontrol->value.enumerated.item[0];
399 snd_soc_dapm_mutex_lock(dapm);
401 ep_sel = mux << MADERA_EP_SEL_SHIFT;
403 change = snd_soc_component_test_bits(component, MADERA_OUTPUT_ENABLES_1,
409 /* EP_SEL should not be modified while HP or EP driver is enabled */
410 ret = regmap_update_bits(madera->regmap, MADERA_OUTPUT_ENABLES_1,
411 MADERA_OUT1L_ENA | MADERA_OUT1R_ENA, 0);
413 dev_warn(madera->dev, "Failed to disable outputs: %d\n", ret);
415 usleep_range(2000, 3000); /* wait for wseq to complete */
417 /* change demux setting */
418 if (madera->out_clamp[0])
419 ret = regmap_update_bits(madera->regmap,
420 MADERA_OUTPUT_ENABLES_1,
421 MADERA_EP_SEL_MASK, ep_sel);
423 dev_err(madera->dev, "Failed to set OUT1 demux: %d\n", ret);
425 /* apply correct setting for mono mode */
426 if (!ep_sel && !madera->pdata.codec.out_mono[0])
427 out_mono = false; /* stereo HP */
429 out_mono = true; /* EP or mono HP */
431 ret = madera_set_output_mode(component, 1, out_mono);
433 dev_warn(madera->dev,
434 "Failed to set output mode: %d\n", ret);
438 * if HPDET has disabled the clamp while switching to HPOUT
439 * OUT1 should remain disabled
442 (madera->out_clamp[0] && !madera->out_shorted[0])) {
443 ret = regmap_update_bits(madera->regmap,
444 MADERA_OUTPUT_ENABLES_1,
445 MADERA_OUT1L_ENA | MADERA_OUT1R_ENA,
448 dev_warn(madera->dev,
449 "Failed to restore earpiece outputs: %d\n",
451 else if (madera->hp_ena)
452 msleep(34); /* wait for enable wseq */
454 usleep_range(2000, 3000); /* wait for disable wseq */
458 snd_soc_dapm_mutex_unlock(dapm);
460 return snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
462 EXPORT_SYMBOL_GPL(madera_out1_demux_put);
464 int madera_out1_demux_get(struct snd_kcontrol *kcontrol,
465 struct snd_ctl_elem_value *ucontrol)
467 struct snd_soc_component *component =
468 snd_soc_dapm_kcontrol_component(kcontrol);
472 ret = snd_soc_component_read(component, MADERA_OUTPUT_ENABLES_1, &val);
476 val &= MADERA_EP_SEL_MASK;
477 val >>= MADERA_EP_SEL_SHIFT;
478 ucontrol->value.enumerated.item[0] = val;
482 EXPORT_SYMBOL_GPL(madera_out1_demux_get);
484 static int madera_inmux_put(struct snd_kcontrol *kcontrol,
485 struct snd_ctl_elem_value *ucontrol)
487 struct snd_soc_component *component =
488 snd_soc_dapm_kcontrol_component(kcontrol);
489 struct snd_soc_dapm_context *dapm =
490 snd_soc_dapm_kcontrol_dapm(kcontrol);
491 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
492 struct madera *madera = priv->madera;
493 struct regmap *regmap = madera->regmap;
494 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
495 unsigned int mux, val, mask;
500 mux = ucontrol->value.enumerated.item[0];
504 val = mux << e->shift_l;
505 mask = (e->mask << e->shift_l) | MADERA_IN1L_SRC_SE_MASK;
508 case MADERA_ADC_DIGITAL_VOLUME_1L:
509 inmode = madera->pdata.codec.inmode[0][2 * mux];
511 case MADERA_ADC_DIGITAL_VOLUME_1R:
512 inmode = madera->pdata.codec.inmode[0][1 + (2 * mux)];
514 case MADERA_ADC_DIGITAL_VOLUME_2L:
515 inmode = madera->pdata.codec.inmode[1][2 * mux];
517 case MADERA_ADC_DIGITAL_VOLUME_2R:
518 inmode = madera->pdata.codec.inmode[1][1 + (2 * mux)];
524 if (inmode & MADERA_INMODE_SE)
525 val |= 1 << MADERA_IN1L_SRC_SE_SHIFT;
527 dev_dbg(madera->dev, "mux=%u reg=0x%x inmode=0x%x mask=0x%x val=0x%x\n",
528 mux, e->reg, inmode, mask, val);
530 ret = regmap_update_bits_check(regmap, e->reg, mask, val, &changed);
535 return snd_soc_dapm_mux_update_power(dapm, kcontrol,
541 static const char * const madera_inmux_texts[] = {
546 static SOC_ENUM_SINGLE_DECL(madera_in1muxl_enum,
547 MADERA_ADC_DIGITAL_VOLUME_1L,
548 MADERA_IN1L_SRC_SHIFT,
551 static SOC_ENUM_SINGLE_DECL(madera_in1muxr_enum,
552 MADERA_ADC_DIGITAL_VOLUME_1R,
553 MADERA_IN1R_SRC_SHIFT,
556 static SOC_ENUM_SINGLE_DECL(madera_in2muxl_enum,
557 MADERA_ADC_DIGITAL_VOLUME_2L,
558 MADERA_IN2L_SRC_SHIFT,
561 static SOC_ENUM_SINGLE_DECL(madera_in2muxr_enum,
562 MADERA_ADC_DIGITAL_VOLUME_2R,
563 MADERA_IN2R_SRC_SHIFT,
566 const struct snd_kcontrol_new madera_inmux[] = {
567 SOC_DAPM_ENUM_EXT("IN1L Mux", madera_in1muxl_enum,
568 snd_soc_dapm_get_enum_double, madera_inmux_put),
569 SOC_DAPM_ENUM_EXT("IN1R Mux", madera_in1muxr_enum,
570 snd_soc_dapm_get_enum_double, madera_inmux_put),
571 SOC_DAPM_ENUM_EXT("IN2L Mux", madera_in2muxl_enum,
572 snd_soc_dapm_get_enum_double, madera_inmux_put),
573 SOC_DAPM_ENUM_EXT("IN2R Mux", madera_in2muxr_enum,
574 snd_soc_dapm_get_enum_double, madera_inmux_put),
576 EXPORT_SYMBOL_GPL(madera_inmux);
578 static const char * const madera_dmode_texts[] = {
583 static SOC_ENUM_SINGLE_DECL(madera_in1dmode_enum,
585 MADERA_IN1_MODE_SHIFT,
588 static SOC_ENUM_SINGLE_DECL(madera_in2dmode_enum,
590 MADERA_IN2_MODE_SHIFT,
593 static SOC_ENUM_SINGLE_DECL(madera_in3dmode_enum,
595 MADERA_IN3_MODE_SHIFT,
598 const struct snd_kcontrol_new madera_inmode[] = {
599 SOC_DAPM_ENUM("IN1 Mode", madera_in1dmode_enum),
600 SOC_DAPM_ENUM("IN2 Mode", madera_in2dmode_enum),
601 SOC_DAPM_ENUM("IN3 Mode", madera_in3dmode_enum),
603 EXPORT_SYMBOL_GPL(madera_inmode);
605 static bool madera_can_change_grp_rate(const struct madera_priv *priv,
611 case MADERA_FX_CTRL1:
612 count = priv->domain_group_ref[MADERA_DOM_GRP_FX];
614 case MADERA_ASRC1_RATE1:
615 case MADERA_ASRC1_RATE2:
616 count = priv->domain_group_ref[MADERA_DOM_GRP_ASRC1];
618 case MADERA_ASRC2_RATE1:
619 case MADERA_ASRC2_RATE2:
620 count = priv->domain_group_ref[MADERA_DOM_GRP_ASRC2];
622 case MADERA_ISRC_1_CTRL_1:
623 case MADERA_ISRC_1_CTRL_2:
624 count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC1];
626 case MADERA_ISRC_2_CTRL_1:
627 case MADERA_ISRC_2_CTRL_2:
628 count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC2];
630 case MADERA_ISRC_3_CTRL_1:
631 case MADERA_ISRC_3_CTRL_2:
632 count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC3];
634 case MADERA_ISRC_4_CTRL_1:
635 case MADERA_ISRC_4_CTRL_2:
636 count = priv->domain_group_ref[MADERA_DOM_GRP_ISRC4];
638 case MADERA_OUTPUT_RATE_1:
639 count = priv->domain_group_ref[MADERA_DOM_GRP_OUT];
641 case MADERA_SPD1_TX_CONTROL:
642 count = priv->domain_group_ref[MADERA_DOM_GRP_SPD];
644 case MADERA_DSP1_CONFIG_1:
645 case MADERA_DSP1_CONFIG_2:
646 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP1];
648 case MADERA_DSP2_CONFIG_1:
649 case MADERA_DSP2_CONFIG_2:
650 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP2];
652 case MADERA_DSP3_CONFIG_1:
653 case MADERA_DSP3_CONFIG_2:
654 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP3];
656 case MADERA_DSP4_CONFIG_1:
657 case MADERA_DSP4_CONFIG_2:
658 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP4];
660 case MADERA_DSP5_CONFIG_1:
661 case MADERA_DSP5_CONFIG_2:
662 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP5];
664 case MADERA_DSP6_CONFIG_1:
665 case MADERA_DSP6_CONFIG_2:
666 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP6];
668 case MADERA_DSP7_CONFIG_1:
669 case MADERA_DSP7_CONFIG_2:
670 count = priv->domain_group_ref[MADERA_DOM_GRP_DSP7];
672 case MADERA_AIF1_RATE_CTRL:
673 count = priv->domain_group_ref[MADERA_DOM_GRP_AIF1];
675 case MADERA_AIF2_RATE_CTRL:
676 count = priv->domain_group_ref[MADERA_DOM_GRP_AIF2];
678 case MADERA_AIF3_RATE_CTRL:
679 count = priv->domain_group_ref[MADERA_DOM_GRP_AIF3];
681 case MADERA_AIF4_RATE_CTRL:
682 count = priv->domain_group_ref[MADERA_DOM_GRP_AIF4];
684 case MADERA_SLIMBUS_RATES_1:
685 case MADERA_SLIMBUS_RATES_2:
686 case MADERA_SLIMBUS_RATES_3:
687 case MADERA_SLIMBUS_RATES_4:
688 case MADERA_SLIMBUS_RATES_5:
689 case MADERA_SLIMBUS_RATES_6:
690 case MADERA_SLIMBUS_RATES_7:
691 case MADERA_SLIMBUS_RATES_8:
692 count = priv->domain_group_ref[MADERA_DOM_GRP_SLIMBUS];
694 case MADERA_PWM_DRIVE_1:
695 count = priv->domain_group_ref[MADERA_DOM_GRP_PWM];
701 dev_dbg(priv->madera->dev, "Rate reg 0x%x group ref %d\n", reg, count);
709 static int madera_adsp_rate_get(struct snd_kcontrol *kcontrol,
710 struct snd_ctl_elem_value *ucontrol)
712 struct snd_soc_component *component =
713 snd_soc_kcontrol_component(kcontrol);
714 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
715 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
716 unsigned int cached_rate;
717 const int adsp_num = e->shift_l;
720 mutex_lock(&priv->rate_lock);
721 cached_rate = priv->adsp_rate_cache[adsp_num];
722 mutex_unlock(&priv->rate_lock);
724 item = snd_soc_enum_val_to_item(e, cached_rate);
725 ucontrol->value.enumerated.item[0] = item;
730 static int madera_adsp_rate_put(struct snd_kcontrol *kcontrol,
731 struct snd_ctl_elem_value *ucontrol)
733 struct snd_soc_component *component =
734 snd_soc_kcontrol_component(kcontrol);
735 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
736 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
737 const int adsp_num = e->shift_l;
738 const unsigned int item = ucontrol->value.enumerated.item[0];
741 if (item >= e->items)
745 * We don't directly write the rate register here but we want to
746 * maintain consistent behaviour that rate domains cannot be changed
747 * while in use since this is a hardware requirement
749 mutex_lock(&priv->rate_lock);
751 if (!madera_can_change_grp_rate(priv, priv->adsp[adsp_num].base)) {
752 dev_warn(priv->madera->dev,
753 "Cannot change '%s' while in use by active audio paths\n",
757 /* Volatile register so defer until the codec is powered up */
758 priv->adsp_rate_cache[adsp_num] = e->values[item];
762 mutex_unlock(&priv->rate_lock);
767 static const struct soc_enum madera_adsp_rate_enum[] = {
768 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 0, 0xf, MADERA_RATE_ENUM_SIZE,
769 madera_rate_text, madera_rate_val),
770 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 1, 0xf, MADERA_RATE_ENUM_SIZE,
771 madera_rate_text, madera_rate_val),
772 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 2, 0xf, MADERA_RATE_ENUM_SIZE,
773 madera_rate_text, madera_rate_val),
774 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 3, 0xf, MADERA_RATE_ENUM_SIZE,
775 madera_rate_text, madera_rate_val),
776 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 4, 0xf, MADERA_RATE_ENUM_SIZE,
777 madera_rate_text, madera_rate_val),
778 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 5, 0xf, MADERA_RATE_ENUM_SIZE,
779 madera_rate_text, madera_rate_val),
780 SOC_VALUE_ENUM_SINGLE(SND_SOC_NOPM, 6, 0xf, MADERA_RATE_ENUM_SIZE,
781 madera_rate_text, madera_rate_val),
784 const struct snd_kcontrol_new madera_adsp_rate_controls[] = {
785 SOC_ENUM_EXT("DSP1 Rate", madera_adsp_rate_enum[0],
786 madera_adsp_rate_get, madera_adsp_rate_put),
787 SOC_ENUM_EXT("DSP2 Rate", madera_adsp_rate_enum[1],
788 madera_adsp_rate_get, madera_adsp_rate_put),
789 SOC_ENUM_EXT("DSP3 Rate", madera_adsp_rate_enum[2],
790 madera_adsp_rate_get, madera_adsp_rate_put),
791 SOC_ENUM_EXT("DSP4 Rate", madera_adsp_rate_enum[3],
792 madera_adsp_rate_get, madera_adsp_rate_put),
793 SOC_ENUM_EXT("DSP5 Rate", madera_adsp_rate_enum[4],
794 madera_adsp_rate_get, madera_adsp_rate_put),
795 SOC_ENUM_EXT("DSP6 Rate", madera_adsp_rate_enum[5],
796 madera_adsp_rate_get, madera_adsp_rate_put),
797 SOC_ENUM_EXT("DSP7 Rate", madera_adsp_rate_enum[6],
798 madera_adsp_rate_get, madera_adsp_rate_put),
800 EXPORT_SYMBOL_GPL(madera_adsp_rate_controls);
802 static int madera_write_adsp_clk_setting(struct madera_priv *priv,
807 unsigned int mask = MADERA_DSP_RATE_MASK;
810 val = priv->adsp_rate_cache[dsp->num - 1] << MADERA_DSP_RATE_SHIFT;
812 switch (priv->madera->type) {
816 /* use legacy frequency registers */
817 mask |= MADERA_DSP_CLK_SEL_MASK;
818 val |= (freq << MADERA_DSP_CLK_SEL_SHIFT);
821 /* Configure exact dsp frequency */
822 dev_dbg(priv->madera->dev, "Set DSP frequency to 0x%x\n", freq);
824 ret = regmap_write(dsp->regmap,
825 dsp->base + MADERA_DSP_CONFIG_2_OFFS, freq);
831 ret = regmap_update_bits(dsp->regmap,
832 dsp->base + MADERA_DSP_CONFIG_1_OFFS,
837 dev_dbg(priv->madera->dev, "Set DSP clocking to 0x%x\n", val);
842 dev_err(dsp->dev, "Failed to set DSP%d clock: %d\n", dsp->num, ret);
847 int madera_set_adsp_clk(struct madera_priv *priv, int dsp_num,
850 struct wm_adsp *dsp = &priv->adsp[dsp_num];
851 struct madera *madera = priv->madera;
852 unsigned int cur, new;
856 * This is called at a higher DAPM priority than the mux widgets so
857 * the muxes are still off at this point and it's safe to change
858 * the rate domain control.
859 * Also called at a lower DAPM priority than the domain group widgets
860 * so locking the reads of adsp_rate_cache is not necessary as we know
861 * changes are locked out by the domain_group_ref reference count.
864 ret = regmap_read(dsp->regmap, dsp->base, &cur);
867 "Failed to read current DSP rate: %d\n", ret);
871 cur &= MADERA_DSP_RATE_MASK;
873 new = priv->adsp_rate_cache[dsp->num - 1] << MADERA_DSP_RATE_SHIFT;
876 dev_dbg(madera->dev, "DSP rate not changed\n");
877 return madera_write_adsp_clk_setting(priv, dsp, freq);
879 dev_dbg(madera->dev, "DSP rate changed\n");
881 /* The write must be guarded by a number of SYSCLK cycles */
882 madera_spin_sysclk(priv);
883 ret = madera_write_adsp_clk_setting(priv, dsp, freq);
884 madera_spin_sysclk(priv);
888 EXPORT_SYMBOL_GPL(madera_set_adsp_clk);
890 int madera_rate_put(struct snd_kcontrol *kcontrol,
891 struct snd_ctl_elem_value *ucontrol)
893 struct snd_soc_component *component =
894 snd_soc_kcontrol_component(kcontrol);
895 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
896 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
897 unsigned int item = ucontrol->value.enumerated.item[0];
901 if (item >= e->items)
905 * Prevent the domain powering up while we're checking whether it's
906 * safe to change rate domain
908 mutex_lock(&priv->rate_lock);
910 ret = snd_soc_component_read(component, e->reg, &val);
912 dev_warn(priv->madera->dev, "Failed to read 0x%x (%d)\n",
918 if (snd_soc_enum_item_to_val(e, item) == val) {
923 if (!madera_can_change_grp_rate(priv, e->reg)) {
924 dev_warn(priv->madera->dev,
925 "Cannot change '%s' while in use by active audio paths\n",
929 /* The write must be guarded by a number of SYSCLK cycles */
930 madera_spin_sysclk(priv);
931 ret = snd_soc_put_enum_double(kcontrol, ucontrol);
932 madera_spin_sysclk(priv);
935 mutex_unlock(&priv->rate_lock);
939 EXPORT_SYMBOL_GPL(madera_rate_put);
941 static void madera_configure_input_mode(struct madera *madera)
943 unsigned int dig_mode, ana_mode_l, ana_mode_r;
944 int max_analogue_inputs, max_dmic_sup, i;
946 switch (madera->type) {
948 max_analogue_inputs = 2;
953 max_analogue_inputs = 3;
958 max_analogue_inputs = 2;
962 max_analogue_inputs = 2;
968 * Initialize input modes from the A settings. For muxed inputs the
969 * B settings will be applied if the mux is changed
971 for (i = 0; i < max_dmic_sup; i++) {
972 dev_dbg(madera->dev, "IN%d mode %u:%u:%u:%u\n", i + 1,
973 madera->pdata.codec.inmode[i][0],
974 madera->pdata.codec.inmode[i][1],
975 madera->pdata.codec.inmode[i][2],
976 madera->pdata.codec.inmode[i][3]);
978 dig_mode = madera->pdata.codec.dmic_ref[i] <<
979 MADERA_IN1_DMIC_SUP_SHIFT;
981 switch (madera->pdata.codec.inmode[i][0]) {
982 case MADERA_INMODE_DIFF:
985 case MADERA_INMODE_SE:
986 ana_mode_l = 1 << MADERA_IN1L_SRC_SE_SHIFT;
989 dev_warn(madera->dev,
990 "IN%dAL Illegal inmode %u ignored\n",
991 i + 1, madera->pdata.codec.inmode[i][0]);
995 switch (madera->pdata.codec.inmode[i][1]) {
996 case MADERA_INMODE_DIFF:
999 case MADERA_INMODE_SE:
1000 ana_mode_r = 1 << MADERA_IN1R_SRC_SE_SHIFT;
1003 dev_warn(madera->dev,
1004 "IN%dAR Illegal inmode %u ignored\n",
1005 i + 1, madera->pdata.codec.inmode[i][1]);
1009 dev_dbg(madera->dev,
1010 "IN%dA DMIC mode=0x%x Analogue mode=0x%x,0x%x\n",
1011 i + 1, dig_mode, ana_mode_l, ana_mode_r);
1013 regmap_update_bits(madera->regmap,
1014 MADERA_IN1L_CONTROL + (i * 8),
1015 MADERA_IN1_DMIC_SUP_MASK, dig_mode);
1017 if (i >= max_analogue_inputs)
1020 regmap_update_bits(madera->regmap,
1021 MADERA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1022 MADERA_IN1L_SRC_SE_MASK, ana_mode_l);
1024 regmap_update_bits(madera->regmap,
1025 MADERA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1026 MADERA_IN1R_SRC_SE_MASK, ana_mode_r);
1030 int madera_init_inputs(struct snd_soc_component *component)
1032 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
1033 struct madera *madera = priv->madera;
1035 madera_configure_input_mode(madera);
1039 EXPORT_SYMBOL_GPL(madera_init_inputs);
1041 static const struct snd_soc_dapm_route madera_mono_routes[] = {
1042 { "OUT1R", NULL, "OUT1L" },
1043 { "OUT2R", NULL, "OUT2L" },
1044 { "OUT3R", NULL, "OUT3L" },
1045 { "OUT4R", NULL, "OUT4L" },
1046 { "OUT5R", NULL, "OUT5L" },
1047 { "OUT6R", NULL, "OUT6L" },
1050 int madera_init_outputs(struct snd_soc_component *component, int n_mono_routes)
1052 struct snd_soc_dapm_context *dapm =
1053 snd_soc_component_get_dapm(component);
1054 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
1055 struct madera *madera = priv->madera;
1056 const struct madera_codec_pdata *pdata = &madera->pdata.codec;
1060 if (n_mono_routes > MADERA_MAX_OUTPUT) {
1061 dev_warn(madera->dev,
1062 "Requested %d mono outputs, using maximum allowed %d\n",
1063 n_mono_routes, MADERA_MAX_OUTPUT);
1064 n_mono_routes = MADERA_MAX_OUTPUT;
1067 for (i = 0; i < n_mono_routes; i++) {
1068 /* Default is 0 so noop with defaults */
1069 if (pdata->out_mono[i]) {
1070 val = MADERA_OUT1_MONO;
1071 snd_soc_dapm_add_routes(dapm,
1072 &madera_mono_routes[i], 1);
1077 regmap_update_bits(madera->regmap,
1078 MADERA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1079 MADERA_OUT1_MONO, val);
1081 dev_dbg(madera->dev, "OUT%d mono=0x%x\n", i + 1, val);
1084 for (i = 0; i < MADERA_MAX_PDM_SPK; i++) {
1085 dev_dbg(madera->dev, "PDM%d fmt=0x%x mute=0x%x\n", i + 1,
1086 pdata->pdm_fmt[i], pdata->pdm_mute[i]);
1088 if (pdata->pdm_mute[i])
1089 regmap_update_bits(madera->regmap,
1090 MADERA_PDM_SPK1_CTRL_1 + (i * 2),
1091 MADERA_SPK1_MUTE_ENDIAN_MASK |
1092 MADERA_SPK1_MUTE_SEQ1_MASK,
1093 pdata->pdm_mute[i]);
1095 if (pdata->pdm_fmt[i])
1096 regmap_update_bits(madera->regmap,
1097 MADERA_PDM_SPK1_CTRL_2 + (i * 2),
1098 MADERA_SPK1_FMT_MASK,
1104 EXPORT_SYMBOL_GPL(madera_init_outputs);
1106 int madera_init_bus_error_irq(struct madera_priv *priv, int dsp_num,
1107 irq_handler_t handler)
1109 struct madera *madera = priv->madera;
1112 ret = madera_request_irq(madera,
1113 madera_dsp_bus_error_irqs[dsp_num],
1116 &priv->adsp[dsp_num]);
1118 dev_err(madera->dev,
1119 "Failed to request DSP Lock region IRQ: %d\n", ret);
1123 EXPORT_SYMBOL_GPL(madera_init_bus_error_irq);
1125 void madera_free_bus_error_irq(struct madera_priv *priv, int dsp_num)
1127 struct madera *madera = priv->madera;
1129 madera_free_irq(madera,
1130 madera_dsp_bus_error_irqs[dsp_num],
1131 &priv->adsp[dsp_num]);
1133 EXPORT_SYMBOL_GPL(madera_free_bus_error_irq);
1135 const char * const madera_mixer_texts[] = {
1285 EXPORT_SYMBOL_GPL(madera_mixer_texts);
1287 const unsigned int madera_mixer_values[] = {
1289 0x04, /* Tone Generator 1 */
1290 0x05, /* Tone Generator 2 */
1294 0x0c, /* Noise mixer */
1295 0x0d, /* Comfort noise */
1392 0x90, /* ASRC1IN1L */
1396 0x94, /* ASRC2IN1L */
1400 0xa0, /* ISRC1INT1 */
1404 0xa4, /* ISRC1DEC1 */
1408 0xa8, /* ISRC2DEC1 */
1412 0xac, /* ISRC2INT1 */
1416 0xb0, /* ISRC3DEC1 */
1420 0xb4, /* ISRC3INT1 */
1424 0xb8, /* ISRC4INT1 */
1426 0xbc, /* ISRC4DEC1 */
1437 EXPORT_SYMBOL_GPL(madera_mixer_values);
1439 const DECLARE_TLV_DB_SCALE(madera_ana_tlv, 0, 100, 0);
1440 EXPORT_SYMBOL_GPL(madera_ana_tlv);
1442 const DECLARE_TLV_DB_SCALE(madera_eq_tlv, -1200, 100, 0);
1443 EXPORT_SYMBOL_GPL(madera_eq_tlv);
1445 const DECLARE_TLV_DB_SCALE(madera_digital_tlv, -6400, 50, 0);
1446 EXPORT_SYMBOL_GPL(madera_digital_tlv);
1448 const DECLARE_TLV_DB_SCALE(madera_noise_tlv, -13200, 600, 0);
1449 EXPORT_SYMBOL_GPL(madera_noise_tlv);
1451 const DECLARE_TLV_DB_SCALE(madera_ng_tlv, -12000, 600, 0);
1452 EXPORT_SYMBOL_GPL(madera_ng_tlv);
1454 const DECLARE_TLV_DB_SCALE(madera_mixer_tlv, -3200, 100, 0);
1455 EXPORT_SYMBOL_GPL(madera_mixer_tlv);
1457 const char * const madera_rate_text[MADERA_RATE_ENUM_SIZE] = {
1458 "SYNCCLK rate 1", "SYNCCLK rate 2", "SYNCCLK rate 3",
1459 "ASYNCCLK rate 1", "ASYNCCLK rate 2",
1461 EXPORT_SYMBOL_GPL(madera_rate_text);
1463 const unsigned int madera_rate_val[MADERA_RATE_ENUM_SIZE] = {
1464 0x0, 0x1, 0x2, 0x8, 0x9,
1466 EXPORT_SYMBOL_GPL(madera_rate_val);
1468 static const char * const madera_dfc_width_text[MADERA_DFC_WIDTH_ENUM_SIZE] = {
1469 "8 bit", "16 bit", "20 bit", "24 bit", "32 bit",
1472 static const unsigned int madera_dfc_width_val[MADERA_DFC_WIDTH_ENUM_SIZE] = {
1476 static const char * const madera_dfc_type_text[MADERA_DFC_TYPE_ENUM_SIZE] = {
1477 "Fixed", "Unsigned Fixed", "Single Precision Floating",
1478 "Half Precision Floating", "Arm Alternative Floating",
1481 static const unsigned int madera_dfc_type_val[MADERA_DFC_TYPE_ENUM_SIZE] = {
1485 const struct soc_enum madera_dfc_width[] = {
1486 SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_RX,
1487 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1488 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1489 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1490 ARRAY_SIZE(madera_dfc_width_text),
1491 madera_dfc_width_text,
1492 madera_dfc_width_val),
1493 SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_TX,
1494 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1495 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1496 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1497 ARRAY_SIZE(madera_dfc_width_text),
1498 madera_dfc_width_text,
1499 madera_dfc_width_val),
1500 SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_RX,
1501 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1502 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1503 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1504 ARRAY_SIZE(madera_dfc_width_text),
1505 madera_dfc_width_text,
1506 madera_dfc_width_val),
1507 SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_TX,
1508 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1509 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1510 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1511 ARRAY_SIZE(madera_dfc_width_text),
1512 madera_dfc_width_text,
1513 madera_dfc_width_val),
1514 SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_RX,
1515 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1516 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1517 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1518 ARRAY_SIZE(madera_dfc_width_text),
1519 madera_dfc_width_text,
1520 madera_dfc_width_val),
1521 SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_TX,
1522 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1523 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1524 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1525 ARRAY_SIZE(madera_dfc_width_text),
1526 madera_dfc_width_text,
1527 madera_dfc_width_val),
1528 SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_RX,
1529 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1530 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1531 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1532 ARRAY_SIZE(madera_dfc_width_text),
1533 madera_dfc_width_text,
1534 madera_dfc_width_val),
1535 SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_TX,
1536 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1537 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1538 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1539 ARRAY_SIZE(madera_dfc_width_text),
1540 madera_dfc_width_text,
1541 madera_dfc_width_val),
1542 SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_RX,
1543 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1544 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1545 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1546 ARRAY_SIZE(madera_dfc_width_text),
1547 madera_dfc_width_text,
1548 madera_dfc_width_val),
1549 SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_TX,
1550 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1551 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1552 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1553 ARRAY_SIZE(madera_dfc_width_text),
1554 madera_dfc_width_text,
1555 madera_dfc_width_val),
1556 SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_RX,
1557 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1558 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1559 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1560 ARRAY_SIZE(madera_dfc_width_text),
1561 madera_dfc_width_text,
1562 madera_dfc_width_val),
1563 SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_TX,
1564 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1565 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1566 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1567 ARRAY_SIZE(madera_dfc_width_text),
1568 madera_dfc_width_text,
1569 madera_dfc_width_val),
1570 SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_RX,
1571 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1572 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1573 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1574 ARRAY_SIZE(madera_dfc_width_text),
1575 madera_dfc_width_text,
1576 madera_dfc_width_val),
1577 SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_TX,
1578 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1579 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1580 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1581 ARRAY_SIZE(madera_dfc_width_text),
1582 madera_dfc_width_text,
1583 madera_dfc_width_val),
1584 SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_RX,
1585 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1586 MADERA_DFC1_RX_DATA_WIDTH_MASK >>
1587 MADERA_DFC1_RX_DATA_WIDTH_SHIFT,
1588 ARRAY_SIZE(madera_dfc_width_text),
1589 madera_dfc_width_text,
1590 madera_dfc_width_val),
1591 SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_TX,
1592 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1593 MADERA_DFC1_TX_DATA_WIDTH_MASK >>
1594 MADERA_DFC1_TX_DATA_WIDTH_SHIFT,
1595 ARRAY_SIZE(madera_dfc_width_text),
1596 madera_dfc_width_text,
1597 madera_dfc_width_val),
1599 EXPORT_SYMBOL_GPL(madera_dfc_width);
1601 const struct soc_enum madera_dfc_type[] = {
1602 SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_RX,
1603 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1604 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1605 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1606 ARRAY_SIZE(madera_dfc_type_text),
1607 madera_dfc_type_text,
1608 madera_dfc_type_val),
1609 SOC_VALUE_ENUM_SINGLE(MADERA_DFC1_TX,
1610 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1611 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1612 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1613 ARRAY_SIZE(madera_dfc_type_text),
1614 madera_dfc_type_text,
1615 madera_dfc_type_val),
1616 SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_RX,
1617 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1618 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1619 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1620 ARRAY_SIZE(madera_dfc_type_text),
1621 madera_dfc_type_text,
1622 madera_dfc_type_val),
1623 SOC_VALUE_ENUM_SINGLE(MADERA_DFC2_TX,
1624 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1625 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1626 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1627 ARRAY_SIZE(madera_dfc_type_text),
1628 madera_dfc_type_text,
1629 madera_dfc_type_val),
1630 SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_RX,
1631 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1632 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1633 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1634 ARRAY_SIZE(madera_dfc_type_text),
1635 madera_dfc_type_text,
1636 madera_dfc_type_val),
1637 SOC_VALUE_ENUM_SINGLE(MADERA_DFC3_TX,
1638 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1639 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1640 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1641 ARRAY_SIZE(madera_dfc_type_text),
1642 madera_dfc_type_text,
1643 madera_dfc_type_val),
1644 SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_RX,
1645 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1646 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1647 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1648 ARRAY_SIZE(madera_dfc_type_text),
1649 madera_dfc_type_text,
1650 madera_dfc_type_val),
1651 SOC_VALUE_ENUM_SINGLE(MADERA_DFC4_TX,
1652 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1653 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1654 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1655 ARRAY_SIZE(madera_dfc_type_text),
1656 madera_dfc_type_text,
1657 madera_dfc_type_val),
1658 SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_RX,
1659 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1660 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1661 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1662 ARRAY_SIZE(madera_dfc_type_text),
1663 madera_dfc_type_text,
1664 madera_dfc_type_val),
1665 SOC_VALUE_ENUM_SINGLE(MADERA_DFC5_TX,
1666 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1667 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1668 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1669 ARRAY_SIZE(madera_dfc_type_text),
1670 madera_dfc_type_text,
1671 madera_dfc_type_val),
1672 SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_RX,
1673 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1674 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1675 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1676 ARRAY_SIZE(madera_dfc_type_text),
1677 madera_dfc_type_text,
1678 madera_dfc_type_val),
1679 SOC_VALUE_ENUM_SINGLE(MADERA_DFC6_TX,
1680 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1681 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1682 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1683 ARRAY_SIZE(madera_dfc_type_text),
1684 madera_dfc_type_text,
1685 madera_dfc_type_val),
1686 SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_RX,
1687 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1688 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1689 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1690 ARRAY_SIZE(madera_dfc_type_text),
1691 madera_dfc_type_text,
1692 madera_dfc_type_val),
1693 SOC_VALUE_ENUM_SINGLE(MADERA_DFC7_TX,
1694 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1695 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1696 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1697 ARRAY_SIZE(madera_dfc_type_text),
1698 madera_dfc_type_text,
1699 madera_dfc_type_val),
1700 SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_RX,
1701 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1702 MADERA_DFC1_RX_DATA_TYPE_MASK >>
1703 MADERA_DFC1_RX_DATA_TYPE_SHIFT,
1704 ARRAY_SIZE(madera_dfc_type_text),
1705 madera_dfc_type_text,
1706 madera_dfc_type_val),
1707 SOC_VALUE_ENUM_SINGLE(MADERA_DFC8_TX,
1708 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1709 MADERA_DFC1_TX_DATA_TYPE_MASK >>
1710 MADERA_DFC1_TX_DATA_TYPE_SHIFT,
1711 ARRAY_SIZE(madera_dfc_type_text),
1712 madera_dfc_type_text,
1713 madera_dfc_type_val),
1715 EXPORT_SYMBOL_GPL(madera_dfc_type);
1717 const struct soc_enum madera_isrc_fsh[] = {
1718 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_1_CTRL_1,
1719 MADERA_ISRC1_FSH_SHIFT, 0xf,
1720 MADERA_RATE_ENUM_SIZE,
1721 madera_rate_text, madera_rate_val),
1722 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_2_CTRL_1,
1723 MADERA_ISRC2_FSH_SHIFT, 0xf,
1724 MADERA_RATE_ENUM_SIZE,
1725 madera_rate_text, madera_rate_val),
1726 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_3_CTRL_1,
1727 MADERA_ISRC3_FSH_SHIFT, 0xf,
1728 MADERA_RATE_ENUM_SIZE,
1729 madera_rate_text, madera_rate_val),
1730 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_4_CTRL_1,
1731 MADERA_ISRC4_FSH_SHIFT, 0xf,
1732 MADERA_RATE_ENUM_SIZE,
1733 madera_rate_text, madera_rate_val),
1736 EXPORT_SYMBOL_GPL(madera_isrc_fsh);
1738 const struct soc_enum madera_isrc_fsl[] = {
1739 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_1_CTRL_2,
1740 MADERA_ISRC1_FSL_SHIFT, 0xf,
1741 MADERA_RATE_ENUM_SIZE,
1742 madera_rate_text, madera_rate_val),
1743 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_2_CTRL_2,
1744 MADERA_ISRC2_FSL_SHIFT, 0xf,
1745 MADERA_RATE_ENUM_SIZE,
1746 madera_rate_text, madera_rate_val),
1747 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_3_CTRL_2,
1748 MADERA_ISRC3_FSL_SHIFT, 0xf,
1749 MADERA_RATE_ENUM_SIZE,
1750 madera_rate_text, madera_rate_val),
1751 SOC_VALUE_ENUM_SINGLE(MADERA_ISRC_4_CTRL_2,
1752 MADERA_ISRC4_FSL_SHIFT, 0xf,
1753 MADERA_RATE_ENUM_SIZE,
1754 madera_rate_text, madera_rate_val),
1757 EXPORT_SYMBOL_GPL(madera_isrc_fsl);
1759 const struct soc_enum madera_asrc1_rate[] = {
1760 SOC_VALUE_ENUM_SINGLE(MADERA_ASRC1_RATE1,
1761 MADERA_ASRC1_RATE1_SHIFT, 0xf,
1762 MADERA_SYNC_RATE_ENUM_SIZE,
1763 madera_rate_text, madera_rate_val),
1764 SOC_VALUE_ENUM_SINGLE(MADERA_ASRC1_RATE2,
1765 MADERA_ASRC1_RATE1_SHIFT, 0xf,
1766 MADERA_ASYNC_RATE_ENUM_SIZE,
1767 madera_rate_text + MADERA_SYNC_RATE_ENUM_SIZE,
1768 madera_rate_val + MADERA_SYNC_RATE_ENUM_SIZE),
1771 EXPORT_SYMBOL_GPL(madera_asrc1_rate);
1773 const struct soc_enum madera_asrc2_rate[] = {
1774 SOC_VALUE_ENUM_SINGLE(MADERA_ASRC2_RATE1,
1775 MADERA_ASRC2_RATE1_SHIFT, 0xf,
1776 MADERA_SYNC_RATE_ENUM_SIZE,
1777 madera_rate_text, madera_rate_val),
1778 SOC_VALUE_ENUM_SINGLE(MADERA_ASRC2_RATE2,
1779 MADERA_ASRC2_RATE2_SHIFT, 0xf,
1780 MADERA_ASYNC_RATE_ENUM_SIZE,
1781 madera_rate_text + MADERA_SYNC_RATE_ENUM_SIZE,
1782 madera_rate_val + MADERA_SYNC_RATE_ENUM_SIZE),
1785 EXPORT_SYMBOL_GPL(madera_asrc2_rate);
1787 static const char * const madera_vol_ramp_text[] = {
1788 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
1789 "15ms/6dB", "30ms/6dB",
1792 SOC_ENUM_SINGLE_DECL(madera_in_vd_ramp,
1793 MADERA_INPUT_VOLUME_RAMP,
1794 MADERA_IN_VD_RAMP_SHIFT,
1795 madera_vol_ramp_text);
1796 EXPORT_SYMBOL_GPL(madera_in_vd_ramp);
1798 SOC_ENUM_SINGLE_DECL(madera_in_vi_ramp,
1799 MADERA_INPUT_VOLUME_RAMP,
1800 MADERA_IN_VI_RAMP_SHIFT,
1801 madera_vol_ramp_text);
1802 EXPORT_SYMBOL_GPL(madera_in_vi_ramp);
1804 SOC_ENUM_SINGLE_DECL(madera_out_vd_ramp,
1805 MADERA_OUTPUT_VOLUME_RAMP,
1806 MADERA_OUT_VD_RAMP_SHIFT,
1807 madera_vol_ramp_text);
1808 EXPORT_SYMBOL_GPL(madera_out_vd_ramp);
1810 SOC_ENUM_SINGLE_DECL(madera_out_vi_ramp,
1811 MADERA_OUTPUT_VOLUME_RAMP,
1812 MADERA_OUT_VI_RAMP_SHIFT,
1813 madera_vol_ramp_text);
1814 EXPORT_SYMBOL_GPL(madera_out_vi_ramp);
1816 static const char * const madera_lhpf_mode_text[] = {
1817 "Low-pass", "High-pass"
1820 SOC_ENUM_SINGLE_DECL(madera_lhpf1_mode,
1822 MADERA_LHPF1_MODE_SHIFT,
1823 madera_lhpf_mode_text);
1824 EXPORT_SYMBOL_GPL(madera_lhpf1_mode);
1826 SOC_ENUM_SINGLE_DECL(madera_lhpf2_mode,
1828 MADERA_LHPF2_MODE_SHIFT,
1829 madera_lhpf_mode_text);
1830 EXPORT_SYMBOL_GPL(madera_lhpf2_mode);
1832 SOC_ENUM_SINGLE_DECL(madera_lhpf3_mode,
1834 MADERA_LHPF3_MODE_SHIFT,
1835 madera_lhpf_mode_text);
1836 EXPORT_SYMBOL_GPL(madera_lhpf3_mode);
1838 SOC_ENUM_SINGLE_DECL(madera_lhpf4_mode,
1840 MADERA_LHPF4_MODE_SHIFT,
1841 madera_lhpf_mode_text);
1842 EXPORT_SYMBOL_GPL(madera_lhpf4_mode);
1844 static const char * const madera_ng_hold_text[] = {
1845 "30ms", "120ms", "250ms", "500ms",
1848 SOC_ENUM_SINGLE_DECL(madera_ng_hold,
1849 MADERA_NOISE_GATE_CONTROL,
1850 MADERA_NGATE_HOLD_SHIFT,
1851 madera_ng_hold_text);
1852 EXPORT_SYMBOL_GPL(madera_ng_hold);
1854 static const char * const madera_in_hpf_cut_text[] = {
1855 "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
1858 SOC_ENUM_SINGLE_DECL(madera_in_hpf_cut_enum,
1860 MADERA_IN_HPF_CUT_SHIFT,
1861 madera_in_hpf_cut_text);
1862 EXPORT_SYMBOL_GPL(madera_in_hpf_cut_enum);
1864 static const char * const madera_in_dmic_osr_text[MADERA_OSR_ENUM_SIZE] = {
1865 "384kHz", "768kHz", "1.536MHz", "3.072MHz", "6.144MHz",
1868 static const unsigned int madera_in_dmic_osr_val[MADERA_OSR_ENUM_SIZE] = {
1872 const struct soc_enum madera_in_dmic_osr[] = {
1873 SOC_VALUE_ENUM_SINGLE(MADERA_DMIC1L_CONTROL, MADERA_IN1_OSR_SHIFT,
1874 0x7, MADERA_OSR_ENUM_SIZE,
1875 madera_in_dmic_osr_text, madera_in_dmic_osr_val),
1876 SOC_VALUE_ENUM_SINGLE(MADERA_DMIC2L_CONTROL, MADERA_IN2_OSR_SHIFT,
1877 0x7, MADERA_OSR_ENUM_SIZE,
1878 madera_in_dmic_osr_text, madera_in_dmic_osr_val),
1879 SOC_VALUE_ENUM_SINGLE(MADERA_DMIC3L_CONTROL, MADERA_IN3_OSR_SHIFT,
1880 0x7, MADERA_OSR_ENUM_SIZE,
1881 madera_in_dmic_osr_text, madera_in_dmic_osr_val),
1882 SOC_VALUE_ENUM_SINGLE(MADERA_DMIC4L_CONTROL, MADERA_IN4_OSR_SHIFT,
1883 0x7, MADERA_OSR_ENUM_SIZE,
1884 madera_in_dmic_osr_text, madera_in_dmic_osr_val),
1885 SOC_VALUE_ENUM_SINGLE(MADERA_DMIC5L_CONTROL, MADERA_IN5_OSR_SHIFT,
1886 0x7, MADERA_OSR_ENUM_SIZE,
1887 madera_in_dmic_osr_text, madera_in_dmic_osr_val),
1888 SOC_VALUE_ENUM_SINGLE(MADERA_DMIC6L_CONTROL, MADERA_IN6_OSR_SHIFT,
1889 0x7, MADERA_OSR_ENUM_SIZE,
1890 madera_in_dmic_osr_text, madera_in_dmic_osr_val),
1892 EXPORT_SYMBOL_GPL(madera_in_dmic_osr);
1894 static const char * const madera_anc_input_src_text[] = {
1895 "None", "IN1", "IN2", "IN3", "IN4", "IN5", "IN6",
1898 static const char * const madera_anc_channel_src_text[] = {
1899 "None", "Left", "Right", "Combine",
1902 const struct soc_enum madera_anc_input_src[] = {
1903 SOC_ENUM_SINGLE(MADERA_ANC_SRC,
1904 MADERA_IN_RXANCL_SEL_SHIFT,
1905 ARRAY_SIZE(madera_anc_input_src_text),
1906 madera_anc_input_src_text),
1907 SOC_ENUM_SINGLE(MADERA_FCL_ADC_REFORMATTER_CONTROL,
1908 MADERA_FCL_MIC_MODE_SEL_SHIFT,
1909 ARRAY_SIZE(madera_anc_channel_src_text),
1910 madera_anc_channel_src_text),
1911 SOC_ENUM_SINGLE(MADERA_ANC_SRC,
1912 MADERA_IN_RXANCR_SEL_SHIFT,
1913 ARRAY_SIZE(madera_anc_input_src_text),
1914 madera_anc_input_src_text),
1915 SOC_ENUM_SINGLE(MADERA_FCR_ADC_REFORMATTER_CONTROL,
1916 MADERA_FCR_MIC_MODE_SEL_SHIFT,
1917 ARRAY_SIZE(madera_anc_channel_src_text),
1918 madera_anc_channel_src_text),
1920 EXPORT_SYMBOL_GPL(madera_anc_input_src);
1922 static const char * const madera_anc_ng_texts[] = {
1923 "None", "Internal", "External",
1926 SOC_ENUM_SINGLE_DECL(madera_anc_ng_enum, SND_SOC_NOPM, 0, madera_anc_ng_texts);
1927 EXPORT_SYMBOL_GPL(madera_anc_ng_enum);
1929 static const char * const madera_out_anc_src_text[] = {
1930 "None", "RXANCL", "RXANCR",
1933 const struct soc_enum madera_output_anc_src[] = {
1934 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_1L,
1935 MADERA_OUT1L_ANC_SRC_SHIFT,
1936 ARRAY_SIZE(madera_out_anc_src_text),
1937 madera_out_anc_src_text),
1938 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_1R,
1939 MADERA_OUT1R_ANC_SRC_SHIFT,
1940 ARRAY_SIZE(madera_out_anc_src_text),
1941 madera_out_anc_src_text),
1942 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_2L,
1943 MADERA_OUT2L_ANC_SRC_SHIFT,
1944 ARRAY_SIZE(madera_out_anc_src_text),
1945 madera_out_anc_src_text),
1946 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_2R,
1947 MADERA_OUT2R_ANC_SRC_SHIFT,
1948 ARRAY_SIZE(madera_out_anc_src_text),
1949 madera_out_anc_src_text),
1950 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_3L,
1951 MADERA_OUT3L_ANC_SRC_SHIFT,
1952 ARRAY_SIZE(madera_out_anc_src_text),
1953 madera_out_anc_src_text),
1954 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_3R,
1955 MADERA_OUT3R_ANC_SRC_SHIFT,
1956 ARRAY_SIZE(madera_out_anc_src_text),
1957 madera_out_anc_src_text),
1958 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_4L,
1959 MADERA_OUT4L_ANC_SRC_SHIFT,
1960 ARRAY_SIZE(madera_out_anc_src_text),
1961 madera_out_anc_src_text),
1962 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_4R,
1963 MADERA_OUT4R_ANC_SRC_SHIFT,
1964 ARRAY_SIZE(madera_out_anc_src_text),
1965 madera_out_anc_src_text),
1966 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_5L,
1967 MADERA_OUT5L_ANC_SRC_SHIFT,
1968 ARRAY_SIZE(madera_out_anc_src_text),
1969 madera_out_anc_src_text),
1970 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_5R,
1971 MADERA_OUT5R_ANC_SRC_SHIFT,
1972 ARRAY_SIZE(madera_out_anc_src_text),
1973 madera_out_anc_src_text),
1974 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_6L,
1975 MADERA_OUT6L_ANC_SRC_SHIFT,
1976 ARRAY_SIZE(madera_out_anc_src_text),
1977 madera_out_anc_src_text),
1978 SOC_ENUM_SINGLE(MADERA_OUTPUT_PATH_CONFIG_6R,
1979 MADERA_OUT6R_ANC_SRC_SHIFT,
1980 ARRAY_SIZE(madera_out_anc_src_text),
1981 madera_out_anc_src_text),
1983 EXPORT_SYMBOL_GPL(madera_output_anc_src);
1985 int madera_dfc_put(struct snd_kcontrol *kcontrol,
1986 struct snd_ctl_elem_value *ucontrol)
1988 struct snd_soc_component *component =
1989 snd_soc_kcontrol_component(kcontrol);
1990 struct snd_soc_dapm_context *dapm =
1991 snd_soc_component_get_dapm(component);
1992 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1993 unsigned int reg = e->reg;
1997 reg = ((reg / 6) * 6) - 2;
1999 snd_soc_dapm_mutex_lock(dapm);
2001 ret = snd_soc_component_read(component, reg, &val);
2005 if (val & MADERA_DFC1_ENA) {
2007 dev_err(component->dev, "Can't change mode on an active DFC\n");
2011 ret = snd_soc_put_enum_double(kcontrol, ucontrol);
2013 snd_soc_dapm_mutex_unlock(dapm);
2017 EXPORT_SYMBOL_GPL(madera_dfc_put);
2019 int madera_lp_mode_put(struct snd_kcontrol *kcontrol,
2020 struct snd_ctl_elem_value *ucontrol)
2022 struct soc_mixer_control *mc =
2023 (struct soc_mixer_control *)kcontrol->private_value;
2024 struct snd_soc_component *component =
2025 snd_soc_kcontrol_component(kcontrol);
2026 struct snd_soc_dapm_context *dapm =
2027 snd_soc_component_get_dapm(component);
2028 unsigned int val, mask;
2031 snd_soc_dapm_mutex_lock(dapm);
2033 /* Cannot change lp mode on an active input */
2034 ret = snd_soc_component_read(component, MADERA_INPUT_ENABLES, &val);
2037 mask = (mc->reg - MADERA_ADC_DIGITAL_VOLUME_1L) / 4;
2038 mask ^= 0x1; /* Flip bottom bit for channel order */
2040 if (val & (1 << mask)) {
2042 dev_err(component->dev,
2043 "Can't change lp mode on an active input\n");
2047 ret = snd_soc_put_volsw(kcontrol, ucontrol);
2050 snd_soc_dapm_mutex_unlock(dapm);
2054 EXPORT_SYMBOL_GPL(madera_lp_mode_put);
2056 const struct snd_kcontrol_new madera_dsp_trigger_output_mux[] = {
2057 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2058 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2059 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2060 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2061 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2062 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2063 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2065 EXPORT_SYMBOL_GPL(madera_dsp_trigger_output_mux);
2067 const struct snd_kcontrol_new madera_drc_activity_output_mux[] = {
2068 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2069 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
2071 EXPORT_SYMBOL_GPL(madera_drc_activity_output_mux);
2073 static void madera_in_set_vu(struct madera_priv *priv, bool enable)
2083 for (i = 0; i < priv->num_inputs; i++) {
2084 ret = regmap_update_bits(priv->madera->regmap,
2085 MADERA_ADC_DIGITAL_VOLUME_1L + (i * 4),
2088 dev_warn(priv->madera->dev,
2089 "Failed to modify VU bits: %d\n", ret);
2093 int madera_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
2096 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2097 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2098 unsigned int reg, val;
2102 reg = MADERA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);
2104 reg = MADERA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
2107 case SND_SOC_DAPM_PRE_PMU:
2110 case SND_SOC_DAPM_POST_PMU:
2112 snd_soc_component_update_bits(component, reg,
2113 MADERA_IN1L_MUTE, 0);
2115 /* If this is the last input pending then allow VU */
2116 if (priv->in_pending == 0) {
2117 usleep_range(1000, 3000);
2118 madera_in_set_vu(priv, true);
2121 case SND_SOC_DAPM_PRE_PMD:
2122 snd_soc_component_update_bits(component, reg,
2123 MADERA_IN1L_MUTE | MADERA_IN_VU,
2124 MADERA_IN1L_MUTE | MADERA_IN_VU);
2126 case SND_SOC_DAPM_POST_PMD:
2127 /* Disable volume updates if no inputs are enabled */
2128 ret = snd_soc_component_read(component, MADERA_INPUT_ENABLES,
2131 madera_in_set_vu(priv, false);
2139 EXPORT_SYMBOL_GPL(madera_in_ev);
2141 int madera_out_ev(struct snd_soc_dapm_widget *w,
2142 struct snd_kcontrol *kcontrol, int event)
2144 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2145 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2146 struct madera *madera = priv->madera;
2149 switch (madera->type) {
2160 case SND_SOC_DAPM_PRE_PMU:
2162 case MADERA_OUT1L_ENA_SHIFT:
2163 case MADERA_OUT1R_ENA_SHIFT:
2164 case MADERA_OUT2L_ENA_SHIFT:
2165 case MADERA_OUT2R_ENA_SHIFT:
2166 case MADERA_OUT3L_ENA_SHIFT:
2167 case MADERA_OUT3R_ENA_SHIFT:
2168 priv->out_up_pending++;
2169 priv->out_up_delay += out_up_delay;
2176 case SND_SOC_DAPM_POST_PMU:
2178 case MADERA_OUT1L_ENA_SHIFT:
2179 case MADERA_OUT1R_ENA_SHIFT:
2180 case MADERA_OUT2L_ENA_SHIFT:
2181 case MADERA_OUT2R_ENA_SHIFT:
2182 case MADERA_OUT3L_ENA_SHIFT:
2183 case MADERA_OUT3R_ENA_SHIFT:
2184 priv->out_up_pending--;
2185 if (!priv->out_up_pending) {
2186 msleep(priv->out_up_delay);
2187 priv->out_up_delay = 0;
2196 case SND_SOC_DAPM_PRE_PMD:
2198 case MADERA_OUT1L_ENA_SHIFT:
2199 case MADERA_OUT1R_ENA_SHIFT:
2200 case MADERA_OUT2L_ENA_SHIFT:
2201 case MADERA_OUT2R_ENA_SHIFT:
2202 case MADERA_OUT3L_ENA_SHIFT:
2203 case MADERA_OUT3R_ENA_SHIFT:
2204 priv->out_down_pending++;
2205 priv->out_down_delay++;
2212 case SND_SOC_DAPM_POST_PMD:
2214 case MADERA_OUT1L_ENA_SHIFT:
2215 case MADERA_OUT1R_ENA_SHIFT:
2216 case MADERA_OUT2L_ENA_SHIFT:
2217 case MADERA_OUT2R_ENA_SHIFT:
2218 case MADERA_OUT3L_ENA_SHIFT:
2219 case MADERA_OUT3R_ENA_SHIFT:
2220 priv->out_down_pending--;
2221 if (!priv->out_down_pending) {
2222 msleep(priv->out_down_delay);
2223 priv->out_down_delay = 0;
2236 EXPORT_SYMBOL_GPL(madera_out_ev);
2238 int madera_hp_ev(struct snd_soc_dapm_widget *w,
2239 struct snd_kcontrol *kcontrol, int event)
2241 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2242 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2243 struct madera *madera = priv->madera;
2244 unsigned int mask = 1 << w->shift;
2245 unsigned int out_num = w->shift / 2;
2247 unsigned int ep_sel = 0;
2250 case SND_SOC_DAPM_POST_PMU:
2253 case SND_SOC_DAPM_PRE_PMD:
2256 case SND_SOC_DAPM_PRE_PMU:
2257 case SND_SOC_DAPM_POST_PMD:
2258 return madera_out_ev(w, kcontrol, event);
2263 /* Store the desired state for the HP outputs */
2264 madera->hp_ena &= ~mask;
2265 madera->hp_ena |= val;
2267 /* if OUT1 is routed to EPOUT, ignore HP clamp and impedance */
2268 regmap_read(madera->regmap, MADERA_OUTPUT_ENABLES_1, &ep_sel);
2269 ep_sel &= MADERA_EP_SEL_MASK;
2271 /* Force off if HPDET has disabled the clamp for this output */
2273 (!madera->out_clamp[out_num] || madera->out_shorted[out_num]))
2276 regmap_update_bits(madera->regmap, MADERA_OUTPUT_ENABLES_1, mask, val);
2278 return madera_out_ev(w, kcontrol, event);
2280 EXPORT_SYMBOL_GPL(madera_hp_ev);
2282 int madera_anc_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
2285 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2289 case SND_SOC_DAPM_POST_PMU:
2290 val = 1 << w->shift;
2292 case SND_SOC_DAPM_PRE_PMD:
2293 val = 1 << (w->shift + 1);
2299 snd_soc_component_write(component, MADERA_CLOCK_CONTROL, val);
2303 EXPORT_SYMBOL_GPL(madera_anc_ev);
2305 static const unsigned int madera_opclk_ref_48k_rates[] = {
2312 static const unsigned int madera_opclk_ref_44k1_rates[] = {
2319 static int madera_set_opclk(struct snd_soc_component *component,
2320 unsigned int clk, unsigned int freq)
2322 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2323 unsigned int mask = MADERA_OPCLK_DIV_MASK | MADERA_OPCLK_SEL_MASK;
2324 unsigned int reg, val;
2325 const unsigned int *rates;
2326 int ref, div, refclk;
2328 BUILD_BUG_ON(ARRAY_SIZE(madera_opclk_ref_48k_rates) !=
2329 ARRAY_SIZE(madera_opclk_ref_44k1_rates));
2332 case MADERA_CLK_OPCLK:
2333 reg = MADERA_OUTPUT_SYSTEM_CLOCK;
2334 refclk = priv->sysclk;
2336 case MADERA_CLK_ASYNC_OPCLK:
2337 reg = MADERA_OUTPUT_ASYNC_CLOCK;
2338 refclk = priv->asyncclk;
2345 rates = madera_opclk_ref_44k1_rates;
2347 rates = madera_opclk_ref_48k_rates;
2349 for (ref = 0; ref < ARRAY_SIZE(madera_opclk_ref_48k_rates); ++ref) {
2350 if (rates[ref] > refclk)
2354 while ((rates[ref] / div >= freq) && (div <= 30)) {
2355 if (rates[ref] / div == freq) {
2356 dev_dbg(component->dev, "Configured %dHz OPCLK\n",
2359 val = (div << MADERA_OPCLK_DIV_SHIFT) | ref;
2361 snd_soc_component_update_bits(component, reg,
2369 dev_err(component->dev, "Unable to generate %dHz OPCLK\n", freq);
2374 static int madera_get_sysclk_setting(unsigned int freq)
2383 return MADERA_SYSCLK_12MHZ << MADERA_SYSCLK_FREQ_SHIFT;
2386 return MADERA_SYSCLK_24MHZ << MADERA_SYSCLK_FREQ_SHIFT;
2389 return MADERA_SYSCLK_49MHZ << MADERA_SYSCLK_FREQ_SHIFT;
2392 return MADERA_SYSCLK_98MHZ << MADERA_SYSCLK_FREQ_SHIFT;
2398 static int madera_get_legacy_dspclk_setting(struct madera *madera,
2406 switch (madera->type) {
2409 if (madera->rev < 3)
2412 return MADERA_SYSCLK_49MHZ <<
2413 MADERA_SYSCLK_FREQ_SHIFT;
2419 return MADERA_DSPCLK_147MHZ << MADERA_DSP_CLK_FREQ_LEGACY_SHIFT;
2425 static int madera_get_dspclk_setting(struct madera *madera,
2427 unsigned int *clock_2_val)
2429 switch (madera->type) {
2433 *clock_2_val = 0; /* don't use MADERA_DSP_CLOCK_2 */
2434 return madera_get_legacy_dspclk_setting(madera, freq);
2436 if (freq > 150000000)
2439 /* Use new exact frequency control */
2440 *clock_2_val = freq / 15625; /* freq * (2^6) / (10^6) */
2445 int madera_set_sysclk(struct snd_soc_component *component, int clk_id,
2446 int source, unsigned int freq, int dir)
2448 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2449 struct madera *madera = priv->madera;
2451 unsigned int reg, clock_2_val = 0;
2452 unsigned int mask = MADERA_SYSCLK_FREQ_MASK | MADERA_SYSCLK_SRC_MASK;
2453 unsigned int val = source << MADERA_SYSCLK_SRC_SHIFT;
2454 int clk_freq_sel, *clk;
2458 case MADERA_CLK_SYSCLK_1:
2460 reg = MADERA_SYSTEM_CLOCK_1;
2461 clk = &priv->sysclk;
2462 clk_freq_sel = madera_get_sysclk_setting(freq);
2463 mask |= MADERA_SYSCLK_FRAC;
2465 case MADERA_CLK_ASYNCCLK_1:
2467 reg = MADERA_ASYNC_CLOCK_1;
2468 clk = &priv->asyncclk;
2469 clk_freq_sel = madera_get_sysclk_setting(freq);
2471 case MADERA_CLK_DSPCLK:
2473 reg = MADERA_DSP_CLOCK_1;
2474 clk = &priv->dspclk;
2475 clk_freq_sel = madera_get_dspclk_setting(madera, freq,
2478 case MADERA_CLK_OPCLK:
2479 case MADERA_CLK_ASYNC_OPCLK:
2480 return madera_set_opclk(component, clk_id, freq);
2485 if (clk_freq_sel < 0) {
2486 dev_err(madera->dev,
2487 "Failed to get clk setting for %dHZ\n", freq);
2488 return clk_freq_sel;
2494 dev_dbg(madera->dev, "%s cleared\n", name);
2498 val |= clk_freq_sel;
2501 ret = regmap_write(madera->regmap, MADERA_DSP_CLOCK_2,
2504 dev_err(madera->dev,
2505 "Failed to write DSP_CONFIG2: %d\n", ret);
2510 * We're using the frequency setting in MADERA_DSP_CLOCK_2 so
2511 * don't change the frequency select bits in MADERA_DSP_CLOCK_1
2513 mask = MADERA_SYSCLK_SRC_MASK;
2517 val |= MADERA_SYSCLK_FRAC;
2519 dev_dbg(madera->dev, "%s set to %uHz\n", name, freq);
2521 return regmap_update_bits(madera->regmap, reg, mask, val);
2523 EXPORT_SYMBOL_GPL(madera_set_sysclk);
2525 static int madera_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2527 struct snd_soc_component *component = dai->component;
2528 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2529 struct madera *madera = priv->madera;
2530 int lrclk, bclk, mode, base;
2532 base = dai->driver->base;
2537 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2538 case SND_SOC_DAIFMT_DSP_A:
2539 mode = MADERA_FMT_DSP_MODE_A;
2541 case SND_SOC_DAIFMT_DSP_B:
2542 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) !=
2543 SND_SOC_DAIFMT_CBM_CFM) {
2544 madera_aif_err(dai, "DSP_B not valid in slave mode\n");
2547 mode = MADERA_FMT_DSP_MODE_B;
2549 case SND_SOC_DAIFMT_I2S:
2550 mode = MADERA_FMT_I2S_MODE;
2552 case SND_SOC_DAIFMT_LEFT_J:
2553 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) !=
2554 SND_SOC_DAIFMT_CBM_CFM) {
2555 madera_aif_err(dai, "LEFT_J not valid in slave mode\n");
2558 mode = MADERA_FMT_LEFT_JUSTIFIED_MODE;
2561 madera_aif_err(dai, "Unsupported DAI format %d\n",
2562 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
2566 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2567 case SND_SOC_DAIFMT_CBS_CFS:
2569 case SND_SOC_DAIFMT_CBS_CFM:
2570 lrclk |= MADERA_AIF1TX_LRCLK_MSTR;
2572 case SND_SOC_DAIFMT_CBM_CFS:
2573 bclk |= MADERA_AIF1_BCLK_MSTR;
2575 case SND_SOC_DAIFMT_CBM_CFM:
2576 bclk |= MADERA_AIF1_BCLK_MSTR;
2577 lrclk |= MADERA_AIF1TX_LRCLK_MSTR;
2580 madera_aif_err(dai, "Unsupported master mode %d\n",
2581 fmt & SND_SOC_DAIFMT_MASTER_MASK);
2585 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2586 case SND_SOC_DAIFMT_NB_NF:
2588 case SND_SOC_DAIFMT_IB_IF:
2589 bclk |= MADERA_AIF1_BCLK_INV;
2590 lrclk |= MADERA_AIF1TX_LRCLK_INV;
2592 case SND_SOC_DAIFMT_IB_NF:
2593 bclk |= MADERA_AIF1_BCLK_INV;
2595 case SND_SOC_DAIFMT_NB_IF:
2596 lrclk |= MADERA_AIF1TX_LRCLK_INV;
2599 madera_aif_err(dai, "Unsupported invert mode %d\n",
2600 fmt & SND_SOC_DAIFMT_INV_MASK);
2604 regmap_update_bits(madera->regmap, base + MADERA_AIF_BCLK_CTRL,
2605 MADERA_AIF1_BCLK_INV | MADERA_AIF1_BCLK_MSTR,
2607 regmap_update_bits(madera->regmap, base + MADERA_AIF_TX_PIN_CTRL,
2608 MADERA_AIF1TX_LRCLK_INV | MADERA_AIF1TX_LRCLK_MSTR,
2610 regmap_update_bits(madera->regmap, base + MADERA_AIF_RX_PIN_CTRL,
2611 MADERA_AIF1RX_LRCLK_INV | MADERA_AIF1RX_LRCLK_MSTR,
2613 regmap_update_bits(madera->regmap, base + MADERA_AIF_FORMAT,
2614 MADERA_AIF1_FMT_MASK, mode);
2619 static const int madera_48k_bclk_rates[] = {
2641 static const int madera_44k1_bclk_rates[] = {
2663 static const unsigned int madera_sr_vals[] = {
2690 #define MADERA_192K_48K_RATE_MASK 0x0F003E
2691 #define MADERA_192K_44K1_RATE_MASK 0x003E00
2692 #define MADERA_192K_RATE_MASK (MADERA_192K_48K_RATE_MASK | \
2693 MADERA_192K_44K1_RATE_MASK)
2695 static const struct snd_pcm_hw_constraint_list madera_constraint = {
2696 .count = ARRAY_SIZE(madera_sr_vals),
2697 .list = madera_sr_vals,
2700 static int madera_startup(struct snd_pcm_substream *substream,
2701 struct snd_soc_dai *dai)
2703 struct snd_soc_component *component = dai->component;
2704 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2705 struct madera_dai_priv *dai_priv = &priv->dai[dai->id - 1];
2706 unsigned int base_rate;
2708 if (!substream->runtime)
2711 switch (dai_priv->clk) {
2712 case MADERA_CLK_SYSCLK_1:
2713 case MADERA_CLK_SYSCLK_2:
2714 case MADERA_CLK_SYSCLK_3:
2715 base_rate = priv->sysclk;
2717 case MADERA_CLK_ASYNCCLK_1:
2718 case MADERA_CLK_ASYNCCLK_2:
2719 base_rate = priv->asyncclk;
2726 dai_priv->constraint.mask = MADERA_192K_RATE_MASK;
2727 else if (base_rate % 4000)
2728 dai_priv->constraint.mask = MADERA_192K_44K1_RATE_MASK;
2730 dai_priv->constraint.mask = MADERA_192K_48K_RATE_MASK;
2732 return snd_pcm_hw_constraint_list(substream->runtime, 0,
2733 SNDRV_PCM_HW_PARAM_RATE,
2734 &dai_priv->constraint);
2737 static int madera_hw_params_rate(struct snd_pcm_substream *substream,
2738 struct snd_pcm_hw_params *params,
2739 struct snd_soc_dai *dai)
2741 struct snd_soc_component *component = dai->component;
2742 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2743 struct madera_dai_priv *dai_priv = &priv->dai[dai->id - 1];
2744 int base = dai->driver->base;
2746 unsigned int reg, cur, tar;
2749 for (i = 0; i < ARRAY_SIZE(madera_sr_vals); i++)
2750 if (madera_sr_vals[i] == params_rate(params))
2753 if (i == ARRAY_SIZE(madera_sr_vals)) {
2754 madera_aif_err(dai, "Unsupported sample rate %dHz\n",
2755 params_rate(params));
2760 switch (dai_priv->clk) {
2761 case MADERA_CLK_SYSCLK_1:
2762 reg = MADERA_SAMPLE_RATE_1;
2763 tar = 0 << MADERA_AIF1_RATE_SHIFT;
2765 case MADERA_CLK_SYSCLK_2:
2766 reg = MADERA_SAMPLE_RATE_2;
2767 tar = 1 << MADERA_AIF1_RATE_SHIFT;
2769 case MADERA_CLK_SYSCLK_3:
2770 reg = MADERA_SAMPLE_RATE_3;
2771 tar = 2 << MADERA_AIF1_RATE_SHIFT;
2773 case MADERA_CLK_ASYNCCLK_1:
2774 reg = MADERA_ASYNC_SAMPLE_RATE_1,
2775 tar = 8 << MADERA_AIF1_RATE_SHIFT;
2777 case MADERA_CLK_ASYNCCLK_2:
2778 reg = MADERA_ASYNC_SAMPLE_RATE_2,
2779 tar = 9 << MADERA_AIF1_RATE_SHIFT;
2782 madera_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
2786 snd_soc_component_update_bits(component, reg, MADERA_SAMPLE_RATE_1_MASK,
2792 ret = regmap_read(priv->madera->regmap,
2793 base + MADERA_AIF_RATE_CTRL, &cur);
2795 madera_aif_err(dai, "Failed to check rate: %d\n", ret);
2799 if ((cur & MADERA_AIF1_RATE_MASK) == (tar & MADERA_AIF1_RATE_MASK))
2802 mutex_lock(&priv->rate_lock);
2804 if (!madera_can_change_grp_rate(priv, base + MADERA_AIF_RATE_CTRL)) {
2805 madera_aif_warn(dai, "Cannot change rate while active\n");
2810 /* Guard the rate change with SYSCLK cycles */
2811 madera_spin_sysclk(priv);
2812 snd_soc_component_update_bits(component, base + MADERA_AIF_RATE_CTRL,
2813 MADERA_AIF1_RATE_MASK, tar);
2814 madera_spin_sysclk(priv);
2817 mutex_unlock(&priv->rate_lock);
2822 static int madera_aif_cfg_changed(struct snd_soc_component *component,
2823 int base, int bclk, int lrclk, int frame)
2828 ret = snd_soc_component_read(component, base + MADERA_AIF_BCLK_CTRL,
2832 if (bclk != (val & MADERA_AIF1_BCLK_FREQ_MASK))
2835 ret = snd_soc_component_read(component, base + MADERA_AIF_RX_BCLK_RATE,
2839 if (lrclk != (val & MADERA_AIF1RX_BCPF_MASK))
2842 ret = snd_soc_component_read(component, base + MADERA_AIF_FRAME_CTRL_1,
2846 if (frame != (val & (MADERA_AIF1TX_WL_MASK |
2847 MADERA_AIF1TX_SLOT_LEN_MASK)))
2853 static int madera_hw_params(struct snd_pcm_substream *substream,
2854 struct snd_pcm_hw_params *params,
2855 struct snd_soc_dai *dai)
2857 struct snd_soc_component *component = dai->component;
2858 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
2859 struct madera *madera = priv->madera;
2860 int base = dai->driver->base;
2864 unsigned int channels = params_channels(params);
2865 unsigned int rate = params_rate(params);
2866 unsigned int chan_limit =
2867 madera->pdata.codec.max_channels_clocked[dai->id - 1];
2868 int tdm_width = priv->tdm_width[dai->id - 1];
2869 int tdm_slots = priv->tdm_slots[dai->id - 1];
2870 int bclk, lrclk, wl, frame, bclk_target, num_rates;
2872 unsigned int aif_tx_state = 0, aif_rx_state = 0;
2875 rates = &madera_44k1_bclk_rates[0];
2876 num_rates = ARRAY_SIZE(madera_44k1_bclk_rates);
2878 rates = &madera_48k_bclk_rates[0];
2879 num_rates = ARRAY_SIZE(madera_48k_bclk_rates);
2882 wl = snd_pcm_format_width(params_format(params));
2885 madera_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n",
2886 tdm_slots, tdm_width);
2887 bclk_target = tdm_slots * tdm_width * rate;
2888 channels = tdm_slots;
2890 bclk_target = snd_soc_params_to_bclk(params);
2894 if (chan_limit && chan_limit < channels) {
2895 madera_aif_dbg(dai, "Limiting to %d channels\n", chan_limit);
2896 bclk_target /= channels;
2897 bclk_target *= chan_limit;
2900 /* Force multiple of 2 channels for I2S mode */
2901 ret = snd_soc_component_read(component, base + MADERA_AIF_FORMAT, &val);
2905 val &= MADERA_AIF1_FMT_MASK;
2906 if ((channels & 1) && val == MADERA_FMT_I2S_MODE) {
2907 madera_aif_dbg(dai, "Forcing stereo mode\n");
2908 bclk_target /= channels;
2909 bclk_target *= channels + 1;
2912 for (i = 0; i < num_rates; i++) {
2913 if (rates[i] >= bclk_target && rates[i] % rate == 0) {
2919 if (i == num_rates) {
2920 madera_aif_err(dai, "Unsupported sample rate %dHz\n", rate);
2924 lrclk = rates[bclk] / rate;
2926 madera_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
2927 rates[bclk], rates[bclk] / lrclk);
2929 frame = wl << MADERA_AIF1TX_WL_SHIFT | tdm_width;
2931 reconfig = madera_aif_cfg_changed(component, base, bclk, lrclk, frame);
2936 /* Save AIF TX/RX state */
2937 regmap_read(madera->regmap, base + MADERA_AIF_TX_ENABLES,
2939 regmap_read(madera->regmap, base + MADERA_AIF_RX_ENABLES,
2941 /* Disable AIF TX/RX before reconfiguring it */
2942 regmap_update_bits(madera->regmap,
2943 base + MADERA_AIF_TX_ENABLES, 0xff, 0x0);
2944 regmap_update_bits(madera->regmap,
2945 base + MADERA_AIF_RX_ENABLES, 0xff, 0x0);
2948 ret = madera_hw_params_rate(substream, params, dai);
2953 regmap_update_bits(madera->regmap,
2954 base + MADERA_AIF_BCLK_CTRL,
2955 MADERA_AIF1_BCLK_FREQ_MASK, bclk);
2956 regmap_update_bits(madera->regmap,
2957 base + MADERA_AIF_RX_BCLK_RATE,
2958 MADERA_AIF1RX_BCPF_MASK, lrclk);
2959 regmap_update_bits(madera->regmap,
2960 base + MADERA_AIF_FRAME_CTRL_1,
2961 MADERA_AIF1TX_WL_MASK |
2962 MADERA_AIF1TX_SLOT_LEN_MASK, frame);
2963 regmap_update_bits(madera->regmap,
2964 base + MADERA_AIF_FRAME_CTRL_2,
2965 MADERA_AIF1RX_WL_MASK |
2966 MADERA_AIF1RX_SLOT_LEN_MASK, frame);
2971 /* Restore AIF TX/RX state */
2972 regmap_update_bits(madera->regmap,
2973 base + MADERA_AIF_TX_ENABLES,
2974 0xff, aif_tx_state);
2975 regmap_update_bits(madera->regmap,
2976 base + MADERA_AIF_RX_ENABLES,
2977 0xff, aif_rx_state);
2983 static int madera_is_syncclk(int clk_id)
2986 case MADERA_CLK_SYSCLK_1:
2987 case MADERA_CLK_SYSCLK_2:
2988 case MADERA_CLK_SYSCLK_3:
2990 case MADERA_CLK_ASYNCCLK_1:
2991 case MADERA_CLK_ASYNCCLK_2:
2998 static int madera_dai_set_sysclk(struct snd_soc_dai *dai,
2999 int clk_id, unsigned int freq, int dir)
3001 struct snd_soc_component *component = dai->component;
3002 struct snd_soc_dapm_context *dapm =
3003 snd_soc_component_get_dapm(component);
3004 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
3005 struct madera_dai_priv *dai_priv = &priv->dai[dai->id - 1];
3006 struct snd_soc_dapm_route routes[2];
3009 is_sync = madera_is_syncclk(clk_id);
3011 dev_err(component->dev, "Illegal DAI clock id %d\n", clk_id);
3015 if (is_sync == madera_is_syncclk(dai_priv->clk))
3019 dev_err(component->dev, "Can't change clock on active DAI %d\n",
3024 dev_dbg(component->dev, "Setting AIF%d to %s\n", dai->id,
3025 is_sync ? "SYSCLK" : "ASYNCCLK");
3028 * A connection to SYSCLK is always required, we only add and remove
3029 * a connection to ASYNCCLK
3031 memset(&routes, 0, sizeof(routes));
3032 routes[0].sink = dai->driver->capture.stream_name;
3033 routes[1].sink = dai->driver->playback.stream_name;
3034 routes[0].source = "ASYNCCLK";
3035 routes[1].source = "ASYNCCLK";
3038 snd_soc_dapm_del_routes(dapm, routes, ARRAY_SIZE(routes));
3040 snd_soc_dapm_add_routes(dapm, routes, ARRAY_SIZE(routes));
3042 dai_priv->clk = clk_id;
3044 return snd_soc_dapm_sync(dapm);
3047 static int madera_set_tristate(struct snd_soc_dai *dai, int tristate)
3049 struct snd_soc_component *component = dai->component;
3050 int base = dai->driver->base;
3055 reg = MADERA_AIF1_TRI;
3059 ret = snd_soc_component_update_bits(component,
3060 base + MADERA_AIF_RATE_CTRL,
3061 MADERA_AIF1_TRI, reg);
3068 static void madera_set_channels_to_mask(struct snd_soc_dai *dai,
3070 int channels, unsigned int mask)
3072 struct snd_soc_component *component = dai->component;
3073 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
3074 struct madera *madera = priv->madera;
3077 for (i = 0; i < channels; ++i) {
3078 slot = ffs(mask) - 1;
3082 regmap_write(madera->regmap, base + i, slot);
3084 mask &= ~(1 << slot);
3088 madera_aif_warn(dai, "Too many channels in TDM mask\n");
3091 static int madera_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3092 unsigned int rx_mask, int slots, int slot_width)
3094 struct snd_soc_component *component = dai->component;
3095 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
3096 int base = dai->driver->base;
3097 int rx_max_chan = dai->driver->playback.channels_max;
3098 int tx_max_chan = dai->driver->capture.channels_max;
3100 /* Only support TDM for the physical AIFs */
3101 if (dai->id > MADERA_MAX_AIF)
3105 tx_mask = (1 << tx_max_chan) - 1;
3106 rx_mask = (1 << rx_max_chan) - 1;
3109 madera_set_channels_to_mask(dai, base + MADERA_AIF_FRAME_CTRL_3,
3110 tx_max_chan, tx_mask);
3111 madera_set_channels_to_mask(dai, base + MADERA_AIF_FRAME_CTRL_11,
3112 rx_max_chan, rx_mask);
3114 priv->tdm_width[dai->id - 1] = slot_width;
3115 priv->tdm_slots[dai->id - 1] = slots;
3120 const struct snd_soc_dai_ops madera_dai_ops = {
3121 .startup = &madera_startup,
3122 .set_fmt = &madera_set_fmt,
3123 .set_tdm_slot = &madera_set_tdm_slot,
3124 .hw_params = &madera_hw_params,
3125 .set_sysclk = &madera_dai_set_sysclk,
3126 .set_tristate = &madera_set_tristate,
3128 EXPORT_SYMBOL_GPL(madera_dai_ops);
3130 const struct snd_soc_dai_ops madera_simple_dai_ops = {
3131 .startup = &madera_startup,
3132 .hw_params = &madera_hw_params_rate,
3133 .set_sysclk = &madera_dai_set_sysclk,
3135 EXPORT_SYMBOL_GPL(madera_simple_dai_ops);
3137 int madera_init_dai(struct madera_priv *priv, int id)
3139 struct madera_dai_priv *dai_priv = &priv->dai[id];
3141 dai_priv->clk = MADERA_CLK_SYSCLK_1;
3142 dai_priv->constraint = madera_constraint;
3146 EXPORT_SYMBOL_GPL(madera_init_dai);
3148 static const struct {
3153 } fll_sync_fratios[] = {
3154 { 0, 64000, 4, 16 },
3155 { 64000, 128000, 3, 8 },
3156 { 128000, 256000, 2, 4 },
3157 { 256000, 1000000, 1, 2 },
3158 { 1000000, 13500000, 0, 1 },
3161 static const unsigned int pseudo_fref_max[MADERA_FLL_MAX_FRATIO] = {
3180 struct madera_fll_gains {
3183 int gain; /* main gain */
3184 int alt_gain; /* alternate integer gain */
3187 static const struct madera_fll_gains madera_fll_sync_gains[] = {
3188 { 0, 256000, 0, -1 },
3189 { 256000, 1000000, 2, -1 },
3190 { 1000000, 13500000, 4, -1 },
3193 static const struct madera_fll_gains madera_fll_main_gains[] = {
3194 { 0, 100000, 0, 2 },
3195 { 100000, 375000, 2, 2 },
3196 { 375000, 768000, 3, 2 },
3197 { 768001, 1500000, 3, 3 },
3198 { 1500000, 6000000, 4, 3 },
3199 { 6000000, 13500000, 5, 3 },
3202 static int madera_find_sync_fratio(unsigned int fref, int *fratio)
3206 for (i = 0; i < ARRAY_SIZE(fll_sync_fratios); i++) {
3207 if (fll_sync_fratios[i].min <= fref &&
3208 fref <= fll_sync_fratios[i].max) {
3210 *fratio = fll_sync_fratios[i].fratio;
3212 return fll_sync_fratios[i].ratio;
3219 static int madera_find_main_fratio(unsigned int fref, unsigned int fout,
3224 while ((fout / (ratio * fref)) > MADERA_FLL_MAX_N)
3228 *fratio = ratio - 1;
3233 static int madera_find_fratio(struct madera_fll *fll, unsigned int fref,
3234 bool sync, int *fratio)
3236 switch (fll->madera->type) {
3238 switch (fll->madera->rev) {
3240 /* rev A0 uses sync calculation for both loops */
3241 return madera_find_sync_fratio(fref, fratio);
3244 return madera_find_sync_fratio(fref, fratio);
3246 return madera_find_main_fratio(fref,
3253 /* these use the same calculation for main and sync loops */
3254 return madera_find_sync_fratio(fref, fratio);
3257 return madera_find_sync_fratio(fref, fratio);
3259 return madera_find_main_fratio(fref, fll->fout, fratio);
3263 static int madera_calc_fratio(struct madera_fll *fll,
3264 struct madera_fll_cfg *cfg,
3265 unsigned int fref, bool sync)
3267 int init_ratio, ratio;
3270 /* fref must be <=13.5MHz, find initial refdiv */
3273 while (fref > MADERA_FLL_MAX_FREF) {
3278 if (div > MADERA_FLL_MAX_REFDIV)
3282 /* Find an appropriate FLL_FRATIO */
3283 init_ratio = madera_find_fratio(fll, fref, sync, &cfg->fratio);
3284 if (init_ratio < 0) {
3285 madera_fll_err(fll, "Unable to find FRATIO for fref=%uHz\n",
3291 cfg->fratio = init_ratio - 1;
3293 switch (fll->madera->type) {
3295 switch (fll->madera->rev) {
3314 * For CS47L35 rev A0, CS47L85 and WM1840 adjust FRATIO/refdiv to avoid
3315 * integer mode if possible
3317 refdiv = cfg->refdiv;
3319 while (div <= MADERA_FLL_MAX_REFDIV) {
3321 * start from init_ratio because this may already give a
3324 for (ratio = init_ratio; ratio > 0; ratio--) {
3325 if (fll->fout % (ratio * fref)) {
3326 cfg->refdiv = refdiv;
3327 cfg->fratio = ratio - 1;
3332 for (ratio = init_ratio + 1; ratio <= MADERA_FLL_MAX_FRATIO;
3334 if ((MADERA_FLL_VCO_CORNER / 2) /
3335 (MADERA_FLL_VCO_MULT * ratio) < fref)
3338 if (fref > pseudo_fref_max[ratio - 1])
3341 if (fll->fout % (ratio * fref)) {
3342 cfg->refdiv = refdiv;
3343 cfg->fratio = ratio - 1;
3351 init_ratio = madera_find_fratio(fll, fref, sync, NULL);
3354 madera_fll_warn(fll, "Falling back to integer mode operation\n");
3356 return cfg->fratio + 1;
3359 static int madera_find_fll_gain(struct madera_fll *fll,
3360 struct madera_fll_cfg *cfg,
3362 const struct madera_fll_gains *gains,
3367 for (i = 0; i < n_gains; i++) {
3368 if (gains[i].min <= fref && fref <= gains[i].max) {
3369 cfg->gain = gains[i].gain;
3370 cfg->alt_gain = gains[i].alt_gain;
3375 madera_fll_err(fll, "Unable to find gain for fref=%uHz\n", fref);
3380 static int madera_calc_fll(struct madera_fll *fll,
3381 struct madera_fll_cfg *cfg,
3382 unsigned int fref, bool sync)
3384 unsigned int gcd_fll;
3385 const struct madera_fll_gains *gains;
3389 madera_fll_dbg(fll, "fref=%u Fout=%u fvco=%u\n",
3390 fref, fll->fout, fll->fout * MADERA_FLL_VCO_MULT);
3392 /* Find an appropriate FLL_FRATIO and refdiv */
3393 ratio = madera_calc_fratio(fll, cfg, fref, sync);
3397 /* Apply the division for our remaining calculations */
3398 fref = fref / (1 << cfg->refdiv);
3400 cfg->n = fll->fout / (ratio * fref);
3402 if (fll->fout % (ratio * fref)) {
3403 gcd_fll = gcd(fll->fout, ratio * fref);
3404 madera_fll_dbg(fll, "GCD=%u\n", gcd_fll);
3406 cfg->theta = (fll->fout - (cfg->n * ratio * fref))
3408 cfg->lambda = (ratio * fref) / gcd_fll;
3415 * Round down to 16bit range with cost of accuracy lost.
3416 * Denominator must be bigger than numerator so we only
3419 while (cfg->lambda >= (1 << 16)) {
3424 switch (fll->madera->type) {
3426 switch (fll->madera->rev) {
3428 /* Rev A0 uses the sync gains for both loops */
3429 gains = madera_fll_sync_gains;
3430 n_gains = ARRAY_SIZE(madera_fll_sync_gains);
3434 gains = madera_fll_sync_gains;
3435 n_gains = ARRAY_SIZE(madera_fll_sync_gains);
3437 gains = madera_fll_main_gains;
3438 n_gains = ARRAY_SIZE(madera_fll_main_gains);
3445 /* These use the sync gains for both loops */
3446 gains = madera_fll_sync_gains;
3447 n_gains = ARRAY_SIZE(madera_fll_sync_gains);
3451 gains = madera_fll_sync_gains;
3452 n_gains = ARRAY_SIZE(madera_fll_sync_gains);
3454 gains = madera_fll_main_gains;
3455 n_gains = ARRAY_SIZE(madera_fll_main_gains);
3460 ret = madera_find_fll_gain(fll, cfg, fref, gains, n_gains);
3464 madera_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n",
3465 cfg->n, cfg->theta, cfg->lambda);
3466 madera_fll_dbg(fll, "FRATIO=0x%x(%d) REFCLK_DIV=0x%x(%d)\n",
3467 cfg->fratio, ratio, cfg->refdiv, 1 << cfg->refdiv);
3468 madera_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain);
3473 static bool madera_write_fll(struct madera *madera, unsigned int base,
3474 struct madera_fll_cfg *cfg, int source,
3475 bool sync, int gain)
3477 bool change, fll_change;
3480 regmap_update_bits_check(madera->regmap,
3481 base + MADERA_FLL_CONTROL_3_OFFS,
3482 MADERA_FLL1_THETA_MASK,
3483 cfg->theta, &change);
3484 fll_change |= change;
3485 regmap_update_bits_check(madera->regmap,
3486 base + MADERA_FLL_CONTROL_4_OFFS,
3487 MADERA_FLL1_LAMBDA_MASK,
3488 cfg->lambda, &change);
3489 fll_change |= change;
3490 regmap_update_bits_check(madera->regmap,
3491 base + MADERA_FLL_CONTROL_5_OFFS,
3492 MADERA_FLL1_FRATIO_MASK,
3493 cfg->fratio << MADERA_FLL1_FRATIO_SHIFT,
3495 fll_change |= change;
3496 regmap_update_bits_check(madera->regmap,
3497 base + MADERA_FLL_CONTROL_6_OFFS,
3498 MADERA_FLL1_REFCLK_DIV_MASK |
3499 MADERA_FLL1_REFCLK_SRC_MASK,
3500 cfg->refdiv << MADERA_FLL1_REFCLK_DIV_SHIFT |
3501 source << MADERA_FLL1_REFCLK_SRC_SHIFT,
3503 fll_change |= change;
3506 regmap_update_bits_check(madera->regmap,
3507 base + MADERA_FLL_SYNCHRONISER_7_OFFS,
3508 MADERA_FLL1_GAIN_MASK,
3509 gain << MADERA_FLL1_GAIN_SHIFT,
3511 fll_change |= change;
3513 regmap_update_bits_check(madera->regmap,
3514 base + MADERA_FLL_CONTROL_7_OFFS,
3515 MADERA_FLL1_GAIN_MASK,
3516 gain << MADERA_FLL1_GAIN_SHIFT,
3518 fll_change |= change;
3521 regmap_update_bits_check(madera->regmap,
3522 base + MADERA_FLL_CONTROL_2_OFFS,
3523 MADERA_FLL1_CTRL_UPD | MADERA_FLL1_N_MASK,
3524 MADERA_FLL1_CTRL_UPD | cfg->n, &change);
3525 fll_change |= change;
3530 static int madera_is_enabled_fll(struct madera_fll *fll, int base)
3532 struct madera *madera = fll->madera;
3536 ret = regmap_read(madera->regmap,
3537 base + MADERA_FLL_CONTROL_1_OFFS, ®);
3539 madera_fll_err(fll, "Failed to read current state: %d\n", ret);
3543 return reg & MADERA_FLL1_ENA;
3546 static int madera_wait_for_fll(struct madera_fll *fll, bool requested)
3548 struct madera *madera = fll->madera;
3549 unsigned int val = 0;
3553 madera_fll_dbg(fll, "Waiting for FLL...\n");
3555 for (i = 0; i < 30; i++) {
3556 regmap_read(madera->regmap, MADERA_IRQ1_RAW_STATUS_2, &val);
3557 status = val & (MADERA_FLL1_LOCK_STS1 << (fll->id - 1));
3558 if (status == requested)
3563 usleep_range(75, 125);
3566 usleep_range(750, 1250);
3574 madera_fll_warn(fll, "Timed out waiting for lock\n");
3579 static bool madera_set_fll_phase_integrator(struct madera_fll *fll,
3580 struct madera_fll_cfg *ref_cfg,
3586 if (!sync && ref_cfg->theta == 0)
3587 val = (1 << MADERA_FLL1_PHASE_ENA_SHIFT) |
3588 (2 << MADERA_FLL1_PHASE_GAIN_SHIFT);
3590 val = 2 << MADERA_FLL1_PHASE_GAIN_SHIFT;
3592 regmap_update_bits_check(fll->madera->regmap,
3593 fll->base + MADERA_FLL_EFS_2_OFFS,
3594 MADERA_FLL1_PHASE_ENA_MASK |
3595 MADERA_FLL1_PHASE_GAIN_MASK,
3601 static void madera_disable_fll(struct madera_fll *fll)
3603 struct madera *madera = fll->madera;
3604 unsigned int sync_base;
3607 switch (madera->type) {
3609 sync_base = fll->base + CS47L35_FLL_SYNCHRONISER_OFFS;
3612 sync_base = fll->base + MADERA_FLL_SYNCHRONISER_OFFS;
3616 madera_fll_dbg(fll, "Disabling FLL\n");
3618 regmap_update_bits(madera->regmap,
3619 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3620 MADERA_FLL1_FREERUN, MADERA_FLL1_FREERUN);
3621 regmap_update_bits_check(madera->regmap,
3622 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3623 MADERA_FLL1_ENA, 0, &change);
3624 regmap_update_bits(madera->regmap,
3625 sync_base + MADERA_FLL_SYNCHRONISER_1_OFFS,
3626 MADERA_FLL1_SYNC_ENA, 0);
3627 regmap_update_bits(madera->regmap,
3628 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3629 MADERA_FLL1_FREERUN, 0);
3631 madera_wait_for_fll(fll, false);
3634 pm_runtime_put_autosuspend(madera->dev);
3637 static int madera_enable_fll(struct madera_fll *fll)
3639 struct madera *madera = fll->madera;
3640 bool have_sync = false;
3641 int already_enabled = madera_is_enabled_fll(fll, fll->base);
3643 struct madera_fll_cfg cfg;
3644 unsigned int sync_base;
3646 bool fll_change = false;
3648 if (already_enabled < 0)
3649 return already_enabled; /* error getting current state */
3651 if (fll->ref_src < 0 || fll->ref_freq == 0) {
3652 madera_fll_err(fll, "No REFCLK\n");
3657 madera_fll_dbg(fll, "Enabling FLL, initially %s\n",
3658 already_enabled ? "enabled" : "disabled");
3660 if (fll->fout < MADERA_FLL_MIN_FOUT ||
3661 fll->fout > MADERA_FLL_MAX_FOUT) {
3662 madera_fll_err(fll, "invalid fout %uHz\n", fll->fout);
3667 switch (madera->type) {
3669 sync_base = fll->base + CS47L35_FLL_SYNCHRONISER_OFFS;
3672 sync_base = fll->base + MADERA_FLL_SYNCHRONISER_OFFS;
3676 sync_enabled = madera_is_enabled_fll(fll, sync_base);
3677 if (sync_enabled < 0)
3678 return sync_enabled;
3680 if (already_enabled) {
3681 /* Facilitate smooth refclk across the transition */
3682 regmap_update_bits(fll->madera->regmap,
3683 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3684 MADERA_FLL1_FREERUN,
3685 MADERA_FLL1_FREERUN);
3687 regmap_update_bits(fll->madera->regmap,
3688 fll->base + MADERA_FLL_CONTROL_7_OFFS,
3689 MADERA_FLL1_GAIN_MASK, 0);
3692 /* Apply SYNCCLK setting */
3693 if (fll->sync_src >= 0) {
3694 ret = madera_calc_fll(fll, &cfg, fll->sync_freq, true);
3698 fll_change |= madera_write_fll(madera, sync_base,
3699 &cfg, fll->sync_src,
3704 if (already_enabled && !!sync_enabled != have_sync)
3705 madera_fll_warn(fll, "Synchroniser changed on active FLL\n");
3707 /* Apply REFCLK setting */
3708 ret = madera_calc_fll(fll, &cfg, fll->ref_freq, false);
3712 /* Ref path hardcodes lambda to 65536 when sync is on */
3713 if (have_sync && cfg.lambda)
3714 cfg.theta = (cfg.theta * (1 << 16)) / cfg.lambda;
3716 switch (fll->madera->type) {
3718 switch (fll->madera->rev) {
3724 madera_set_fll_phase_integrator(fll, &cfg,
3726 if (!have_sync && cfg.theta == 0)
3727 gain = cfg.alt_gain;
3738 fll_change |= madera_set_fll_phase_integrator(fll, &cfg,
3740 if (!have_sync && cfg.theta == 0)
3741 gain = cfg.alt_gain;
3747 fll_change |= madera_write_fll(madera, fll->base,
3752 * Increase the bandwidth if we're not using a low frequency
3755 if (have_sync && fll->sync_freq > 100000)
3756 regmap_update_bits(madera->regmap,
3757 sync_base + MADERA_FLL_SYNCHRONISER_7_OFFS,
3758 MADERA_FLL1_SYNC_DFSAT_MASK, 0);
3760 regmap_update_bits(madera->regmap,
3761 sync_base + MADERA_FLL_SYNCHRONISER_7_OFFS,
3762 MADERA_FLL1_SYNC_DFSAT_MASK,
3763 MADERA_FLL1_SYNC_DFSAT);
3765 if (!already_enabled)
3766 pm_runtime_get_sync(madera->dev);
3769 regmap_update_bits(madera->regmap,
3770 sync_base + MADERA_FLL_SYNCHRONISER_1_OFFS,
3771 MADERA_FLL1_SYNC_ENA,
3772 MADERA_FLL1_SYNC_ENA);
3773 regmap_update_bits(madera->regmap,
3774 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3775 MADERA_FLL1_ENA, MADERA_FLL1_ENA);
3777 if (already_enabled)
3778 regmap_update_bits(madera->regmap,
3779 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3780 MADERA_FLL1_FREERUN, 0);
3782 if (fll_change || !already_enabled)
3783 madera_wait_for_fll(fll, true);
3788 /* In case of error don't leave the FLL running with an old config */
3789 madera_disable_fll(fll);
3794 static int madera_apply_fll(struct madera_fll *fll)
3797 return madera_enable_fll(fll);
3799 madera_disable_fll(fll);
3804 int madera_set_fll_syncclk(struct madera_fll *fll, int source,
3805 unsigned int fref, unsigned int fout)
3808 * fout is ignored, since the synchronizer is an optional extra
3809 * constraint on the Fout generated from REFCLK, so the Fout is
3810 * set when configuring REFCLK
3813 if (fll->sync_src == source && fll->sync_freq == fref)
3816 fll->sync_src = source;
3817 fll->sync_freq = fref;
3819 return madera_apply_fll(fll);
3821 EXPORT_SYMBOL_GPL(madera_set_fll_syncclk);
3823 int madera_set_fll_refclk(struct madera_fll *fll, int source,
3824 unsigned int fref, unsigned int fout)
3828 if (fll->ref_src == source &&
3829 fll->ref_freq == fref && fll->fout == fout)
3833 * Changes of fout on an enabled FLL aren't allowed except when
3834 * setting fout==0 to disable the FLL
3836 if (fout && fout != fll->fout) {
3837 ret = madera_is_enabled_fll(fll, fll->base);
3842 madera_fll_err(fll, "Can't change Fout on active FLL\n");
3847 fll->ref_src = source;
3848 fll->ref_freq = fref;
3851 return madera_apply_fll(fll);
3853 EXPORT_SYMBOL_GPL(madera_set_fll_refclk);
3855 int madera_init_fll(struct madera *madera, int id, int base,
3856 struct madera_fll *fll)
3860 fll->madera = madera;
3861 fll->ref_src = MADERA_FLL_SRC_NONE;
3862 fll->sync_src = MADERA_FLL_SRC_NONE;
3864 regmap_update_bits(madera->regmap,
3865 fll->base + MADERA_FLL_CONTROL_1_OFFS,
3866 MADERA_FLL1_FREERUN, 0);
3870 EXPORT_SYMBOL_GPL(madera_init_fll);
3872 static const struct reg_sequence madera_fll_ao_32K_49M_patch[] = {
3873 { MADERA_FLLAO_CONTROL_2, 0x02EE },
3874 { MADERA_FLLAO_CONTROL_3, 0x0000 },
3875 { MADERA_FLLAO_CONTROL_4, 0x0001 },
3876 { MADERA_FLLAO_CONTROL_5, 0x0002 },
3877 { MADERA_FLLAO_CONTROL_6, 0x8001 },
3878 { MADERA_FLLAO_CONTROL_7, 0x0004 },
3879 { MADERA_FLLAO_CONTROL_8, 0x0077 },
3880 { MADERA_FLLAO_CONTROL_10, 0x06D8 },
3881 { MADERA_FLLAO_CONTROL_11, 0x0085 },
3882 { MADERA_FLLAO_CONTROL_2, 0x82EE },
3885 static const struct reg_sequence madera_fll_ao_32K_45M_patch[] = {
3886 { MADERA_FLLAO_CONTROL_2, 0x02B1 },
3887 { MADERA_FLLAO_CONTROL_3, 0x0001 },
3888 { MADERA_FLLAO_CONTROL_4, 0x0010 },
3889 { MADERA_FLLAO_CONTROL_5, 0x0002 },
3890 { MADERA_FLLAO_CONTROL_6, 0x8001 },
3891 { MADERA_FLLAO_CONTROL_7, 0x0004 },
3892 { MADERA_FLLAO_CONTROL_8, 0x0077 },
3893 { MADERA_FLLAO_CONTROL_10, 0x06D8 },
3894 { MADERA_FLLAO_CONTROL_11, 0x0005 },
3895 { MADERA_FLLAO_CONTROL_2, 0x82B1 },
3898 struct madera_fllao_patch {
3901 const struct reg_sequence *patch;
3902 unsigned int patch_size;
3905 static const struct madera_fllao_patch madera_fllao_settings[] = {
3909 .patch = madera_fll_ao_32K_49M_patch,
3910 .patch_size = ARRAY_SIZE(madera_fll_ao_32K_49M_patch),
3916 .patch = madera_fll_ao_32K_45M_patch,
3917 .patch_size = ARRAY_SIZE(madera_fll_ao_32K_45M_patch),
3921 static int madera_enable_fll_ao(struct madera_fll *fll,
3922 const struct reg_sequence *patch,
3923 unsigned int patch_size)
3925 struct madera *madera = fll->madera;
3926 int already_enabled = madera_is_enabled_fll(fll, fll->base);
3930 if (already_enabled < 0)
3931 return already_enabled;
3933 if (!already_enabled)
3934 pm_runtime_get_sync(madera->dev);
3936 madera_fll_dbg(fll, "Enabling FLL_AO, initially %s\n",
3937 already_enabled ? "enabled" : "disabled");
3939 /* FLL_AO_HOLD must be set before configuring any registers */
3940 regmap_update_bits(fll->madera->regmap,
3941 fll->base + MADERA_FLLAO_CONTROL_1_OFFS,
3942 MADERA_FLL_AO_HOLD, MADERA_FLL_AO_HOLD);
3944 for (i = 0; i < patch_size; i++) {
3947 /* modify the patch to apply fll->ref_src as input clock */
3948 if (patch[i].reg == MADERA_FLLAO_CONTROL_6) {
3949 val &= ~MADERA_FLL_AO_REFCLK_SRC_MASK;
3950 val |= (fll->ref_src << MADERA_FLL_AO_REFCLK_SRC_SHIFT)
3951 & MADERA_FLL_AO_REFCLK_SRC_MASK;
3954 regmap_write(madera->regmap, patch[i].reg, val);
3957 regmap_update_bits(madera->regmap,
3958 fll->base + MADERA_FLLAO_CONTROL_1_OFFS,
3959 MADERA_FLL_AO_ENA, MADERA_FLL_AO_ENA);
3961 /* Release the hold so that fll_ao locks to external frequency */
3962 regmap_update_bits(madera->regmap,
3963 fll->base + MADERA_FLLAO_CONTROL_1_OFFS,
3964 MADERA_FLL_AO_HOLD, 0);
3966 if (!already_enabled)
3967 madera_wait_for_fll(fll, true);
3972 static int madera_disable_fll_ao(struct madera_fll *fll)
3974 struct madera *madera = fll->madera;
3977 madera_fll_dbg(fll, "Disabling FLL_AO\n");
3979 regmap_update_bits(madera->regmap,
3980 fll->base + MADERA_FLLAO_CONTROL_1_OFFS,
3981 MADERA_FLL_AO_HOLD, MADERA_FLL_AO_HOLD);
3982 regmap_update_bits_check(madera->regmap,
3983 fll->base + MADERA_FLLAO_CONTROL_1_OFFS,
3984 MADERA_FLL_AO_ENA, 0, &change);
3986 madera_wait_for_fll(fll, false);
3989 * ctrl_up gates the writes to all fll_ao register, setting it to 0
3990 * here ensures that after a runtime suspend/resume cycle when one
3991 * enables the fllao then ctrl_up is the last bit that is configured
3992 * by the fllao enable code rather than the cache sync operation which
3993 * would have updated it much earlier before writing out all fllao
3996 regmap_update_bits(madera->regmap,
3997 fll->base + MADERA_FLLAO_CONTROL_2_OFFS,
3998 MADERA_FLL_AO_CTRL_UPD_MASK, 0);
4001 pm_runtime_put_autosuspend(madera->dev);
4006 int madera_set_fll_ao_refclk(struct madera_fll *fll, int source,
4007 unsigned int fin, unsigned int fout)
4010 const struct reg_sequence *patch = NULL;
4014 if (fll->ref_src == source &&
4015 fll->ref_freq == fin && fll->fout == fout)
4018 madera_fll_dbg(fll, "Change FLL_AO refclk to fin=%u fout=%u source=%d\n",
4021 if (fout && (fll->ref_freq != fin || fll->fout != fout)) {
4022 for (i = 0; i < ARRAY_SIZE(madera_fllao_settings); i++) {
4023 if (madera_fllao_settings[i].fin == fin &&
4024 madera_fllao_settings[i].fout == fout)
4028 if (i == ARRAY_SIZE(madera_fllao_settings)) {
4030 "No matching configuration for FLL_AO\n");
4034 patch = madera_fllao_settings[i].patch;
4035 patch_size = madera_fllao_settings[i].patch_size;
4038 fll->ref_src = source;
4039 fll->ref_freq = fin;
4043 ret = madera_enable_fll_ao(fll, patch, patch_size);
4045 madera_disable_fll_ao(fll);
4049 EXPORT_SYMBOL_GPL(madera_set_fll_ao_refclk);
4052 * madera_set_output_mode - Set the mode of the specified output
4054 * @component: Device to configure
4055 * @output: Output number
4056 * @diff: True to set the output to differential mode
4058 * Some systems use external analogue switches to connect more
4059 * analogue devices to the CODEC than are supported by the device. In
4060 * some systems this requires changing the switched output from single
4061 * ended to differential mode dynamically at runtime, an operation
4062 * supported using this function.
4064 * Most systems have a single static configuration and should use
4065 * platform data instead.
4067 int madera_set_output_mode(struct snd_soc_component *component, int output,
4070 unsigned int reg, val;
4073 if (output < 1 || output > MADERA_MAX_OUTPUT)
4076 reg = MADERA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
4079 val = MADERA_OUT1_MONO;
4083 ret = snd_soc_component_update_bits(component, reg, MADERA_OUT1_MONO,
4090 EXPORT_SYMBOL_GPL(madera_set_output_mode);
4092 static bool madera_eq_filter_unstable(bool mode, __be16 _a, __be16 _b)
4094 s16 a = be16_to_cpu(_a);
4095 s16 b = be16_to_cpu(_b);
4098 return abs(a) >= 4096;
4103 return (abs((a << 16) / (4096 - b)) >= 4096 << 4);
4107 int madera_eq_coeff_put(struct snd_kcontrol *kcontrol,
4108 struct snd_ctl_elem_value *ucontrol)
4110 struct snd_soc_component *component =
4111 snd_soc_kcontrol_component(kcontrol);
4112 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
4113 struct madera *madera = priv->madera;
4114 struct soc_bytes *params = (void *)kcontrol->private_value;
4120 len = params->num_regs * regmap_get_val_bytes(madera->regmap);
4122 data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA);
4126 data[0] &= cpu_to_be16(MADERA_EQ1_B1_MODE);
4128 if (madera_eq_filter_unstable(!!data[0], data[1], data[2]) ||
4129 madera_eq_filter_unstable(true, data[4], data[5]) ||
4130 madera_eq_filter_unstable(true, data[8], data[9]) ||
4131 madera_eq_filter_unstable(true, data[12], data[13]) ||
4132 madera_eq_filter_unstable(false, data[16], data[17])) {
4133 dev_err(madera->dev, "Rejecting unstable EQ coefficients\n");
4138 ret = regmap_read(madera->regmap, params->base, &val);
4142 val &= ~MADERA_EQ1_B1_MODE;
4143 data[0] |= cpu_to_be16(val);
4145 ret = regmap_raw_write(madera->regmap, params->base, data, len);
4152 EXPORT_SYMBOL_GPL(madera_eq_coeff_put);
4154 int madera_lhpf_coeff_put(struct snd_kcontrol *kcontrol,
4155 struct snd_ctl_elem_value *ucontrol)
4157 struct snd_soc_component *component =
4158 snd_soc_kcontrol_component(kcontrol);
4159 struct madera_priv *priv = snd_soc_component_get_drvdata(component);
4160 struct madera *madera = priv->madera;
4161 __be16 *data = (__be16 *)ucontrol->value.bytes.data;
4162 s16 val = be16_to_cpu(*data);
4164 if (abs(val) >= 4096) {
4165 dev_err(madera->dev, "Rejecting unstable LHPF coefficients\n");
4169 return snd_soc_bytes_put(kcontrol, ucontrol);
4171 EXPORT_SYMBOL_GPL(madera_lhpf_coeff_put);
4173 MODULE_SOFTDEP("pre: madera");
4174 MODULE_DESCRIPTION("ASoC Cirrus Logic Madera codec support");
4175 MODULE_AUTHOR("Charles Keepax <ckeepax@opensource.cirrus.com>");
4176 MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
4177 MODULE_LICENSE("GPL v2");