1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA driver for RME Digi9652 audio interfaces
5 * Copyright (c) 1999 IEM - Winfried Ritsch
6 * Copyright (c) 1999-2001 Paul Davis
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/module.h>
15 #include <linux/nospec.h>
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/pcm.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include <sound/initval.h>
24 #include <asm/current.h>
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
29 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
31 module_param_array(index, int, NULL, 0444);
32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33 module_param_array(id, charp, NULL, 0444);
34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35 module_param_array(enable, bool, NULL, 0444);
36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37 module_param_array(precise_ptr, bool, NULL, 0444);
38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41 MODULE_LICENSE("GPL");
42 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
43 "{RME,Hammerfall-Light}}");
45 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
46 capture, one for playback. Both the ADAT and S/PDIF channels appear
47 to the host CPU in the same block of memory. There is no functional
48 difference between them in terms of access.
50 The Hammerfall Light is identical to the Hammerfall, except that it
51 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
54 #define RME9652_NCHANNELS 26
55 #define RME9636_NCHANNELS 18
57 /* Preferred sync source choices - used by "sync_pref" control switch */
59 #define RME9652_SYNC_FROM_SPDIF 0
60 #define RME9652_SYNC_FROM_ADAT1 1
61 #define RME9652_SYNC_FROM_ADAT2 2
62 #define RME9652_SYNC_FROM_ADAT3 3
64 /* Possible sources of S/PDIF input */
66 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
67 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
68 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
70 /* ------------- Status-Register bits --------------------- */
72 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
73 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
74 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
75 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
76 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
77 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
78 /* bits 6-15 encode h/w buffer pointer position */
79 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
80 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
81 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
82 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
83 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
84 #define RME9652_tc_out (1<<21) /* time-code out bit */
85 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
86 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
87 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
88 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
89 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
90 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
91 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
93 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
94 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
95 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
96 #define rme9652_decode_spdif_rate(x) ((x)>>22)
98 /* Bit 6..15 : h/w buffer pointer */
100 #define RME9652_buf_pos 0x000FFC0
102 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
103 Rev G EEPROMS and Rev 1.5 cards or later.
106 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
108 /* amount of io space we remap for register access. i'm not sure we
109 even need this much, but 1K is nice round number :)
112 #define RME9652_IO_EXTENT 1024
114 #define RME9652_init_buffer 0
115 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
116 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
117 #define RME9652_control_register 64
118 #define RME9652_irq_clear 96
119 #define RME9652_time_code 100 /* useful if used with alesis adat */
120 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
122 /* Read-only registers */
124 /* Writing to any of the register locations writes to the status
125 register. We'll use the first location as our point of access.
128 #define RME9652_status_register 0
130 /* --------- Control-Register Bits ---------------- */
133 #define RME9652_start_bit (1<<0) /* start record/play */
134 /* bits 1-3 encode buffersize/latency */
135 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
136 #define RME9652_IE (1<<5) /* Interrupt Enable */
137 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
138 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
139 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
140 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
141 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
142 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
143 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
144 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
145 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
146 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
147 #define RME9652_SyncPref_ADAT2 (1<<16)
148 #define RME9652_SyncPref_ADAT3 (1<<17)
149 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
150 #define RME9652_SPDIF_SELECT (1<<19)
151 #define RME9652_SPDIF_CLOCK (1<<20)
152 #define RME9652_SPDIF_WRITE (1<<21)
153 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
155 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
157 #define RME9652_latency 0x0e
158 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
159 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
160 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
161 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
162 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
163 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
165 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
166 #define RME9652_SyncPref_ADAT1 0
167 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
169 /* the size of a substream (1 mono data stream) */
171 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
172 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
174 /* the size of the area we need to allocate for DMA transfers. the
175 size is the same regardless of the number of channels - the
176 9636 still uses the same memory area.
178 Note that we allocate 1 more channel than is apparently needed
179 because the h/w seems to write 1 byte beyond the end of the last
183 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
184 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
192 void __iomem *iobase;
196 u32 control_register; /* cached value */
197 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
200 u32 creg_spdif_stream;
202 char *card_name; /* hammerfall or hammerfall light names */
204 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
205 size_t prev_hw_offset; /* previous hw offset */
206 size_t max_jitter; /* maximum jitter in frames for
208 size_t period_bytes; /* guess what this is */
210 unsigned char ds_channels;
211 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
213 struct snd_dma_buffer playback_dma_buf;
214 struct snd_dma_buffer capture_dma_buf;
216 unsigned char *capture_buffer; /* suitably aligned address */
217 unsigned char *playback_buffer; /* suitably aligned address */
222 struct snd_pcm_substream *capture_substream;
223 struct snd_pcm_substream *playback_substream;
226 int passthru; /* non-zero if doing pass-thru */
227 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
229 int last_spdif_sample_rate; /* so that we can catch externally ... */
230 int last_adat_sample_rate; /* ... induced rate changes */
234 struct snd_card *card;
237 struct snd_kcontrol *spdif_ctl;
241 /* These tables map the ALSA channels 1..N to the channels that we
242 need to use in order to find the relevant channel buffer. RME
243 refer to this kind of mapping as between "the ADAT channel and
244 the DMA channel." We index it using the logical audio channel,
245 and the value is the DMA channel (i.e. channel buffer number)
246 where the data for that channel can be read/written from/to.
249 static char channel_map_9652_ss[26] = {
250 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
251 18, 19, 20, 21, 22, 23, 24, 25
254 static char channel_map_9636_ss[26] = {
255 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
256 /* channels 16 and 17 are S/PDIF */
258 /* channels 18-25 don't exist */
259 -1, -1, -1, -1, -1, -1, -1, -1
262 static char channel_map_9652_ds[26] = {
263 /* ADAT channels are remapped */
264 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
265 /* channels 12 and 13 are S/PDIF */
267 /* others don't exist */
268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
271 static char channel_map_9636_ds[26] = {
272 /* ADAT channels are remapped */
273 1, 3, 5, 7, 9, 11, 13, 15,
274 /* channels 8 and 9 are S/PDIF */
276 /* others don't exist */
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
280 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
282 dmab->dev.type = SNDRV_DMA_TYPE_DEV;
283 dmab->dev.dev = snd_dma_pci_data(pci);
284 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
290 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
293 snd_dma_free_pages(dmab);
297 static const struct pci_device_id snd_rme9652_ids[] = {
301 .subvendor = PCI_ANY_ID,
302 .subdevice = PCI_ANY_ID,
303 }, /* RME Digi9652 */
307 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
309 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
311 writel(val, rme9652->iobase + reg);
314 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
316 return readl(rme9652->iobase + reg);
319 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
324 spin_lock_irqsave(&rme9652->lock, flags);
325 if ((rme9652->playback_pid != rme9652->capture_pid) &&
326 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
329 spin_unlock_irqrestore(&rme9652->lock, flags);
333 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
335 if (rme9652_running_double_speed(rme9652)) {
336 return (rme9652_read(rme9652, RME9652_status_register) &
337 RME9652_fs48) ? 96000 : 88200;
339 return (rme9652_read(rme9652, RME9652_status_register) &
340 RME9652_fs48) ? 48000 : 44100;
344 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
348 i = rme9652->control_register & RME9652_latency;
349 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
350 rme9652->hw_offsetmask =
351 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
352 rme9652->max_jitter = 80;
355 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
358 unsigned int offset, frag;
359 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
360 snd_pcm_sframes_t delta;
362 status = rme9652_read(rme9652, RME9652_status_register);
363 if (!rme9652->precise_ptr)
364 return (status & RME9652_buffer_id) ? period_size : 0;
365 offset = status & RME9652_buf_pos;
367 /* The hardware may give a backward movement for up to 80 frames
368 Martin Kirst <martin.kirst@freenet.de> knows the details.
371 delta = rme9652->prev_hw_offset - offset;
373 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
374 offset = rme9652->prev_hw_offset;
376 rme9652->prev_hw_offset = offset;
377 offset &= rme9652->hw_offsetmask;
379 frag = status & RME9652_buffer_id;
381 if (offset < period_size) {
382 if (offset > rme9652->max_jitter) {
384 dev_err(rme9652->card->dev,
385 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
389 offset -= rme9652->max_jitter;
391 offset += period_size * 2;
393 if (offset > period_size + rme9652->max_jitter) {
395 dev_err(rme9652->card->dev,
396 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
400 offset -= rme9652->max_jitter;
406 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
410 /* reset the FIFO pointer to zero. We do this by writing to 8
411 registers, each of which is a 32bit wide register, and set
412 them all to zero. Note that s->iobase is a pointer to
413 int32, not pointer to char.
416 for (i = 0; i < 8; i++) {
417 rme9652_write(rme9652, i * 4, 0);
420 rme9652->prev_hw_offset = 0;
423 static inline void rme9652_start(struct snd_rme9652 *s)
425 s->control_register |= (RME9652_IE | RME9652_start_bit);
426 rme9652_write(s, RME9652_control_register, s->control_register);
429 static inline void rme9652_stop(struct snd_rme9652 *s)
431 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
432 rme9652_write(s, RME9652_control_register, s->control_register);
435 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
441 spin_lock_irq(&s->lock);
443 if ((restart = s->running)) {
454 s->control_register &= ~RME9652_latency;
455 s->control_register |= rme9652_encode_latency(n);
457 rme9652_write(s, RME9652_control_register, s->control_register);
459 rme9652_compute_period_size(s);
464 spin_unlock_irq(&s->lock);
469 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
472 int reject_if_open = 0;
475 if (!snd_rme9652_use_is_exclusive (rme9652)) {
479 /* Changing from a "single speed" to a "double speed" rate is
480 not allowed if any substreams are open. This is because
481 such a change causes a shift in the location of
482 the DMA buffers and a reduction in the number of available
485 Note that a similar but essentially insoluble problem
486 exists for externally-driven rate changes. All we can do
487 is to flag rate changes in the read/write routines.
490 spin_lock_irq(&rme9652->lock);
491 xrate = rme9652_adat_sample_rate(rme9652);
516 rate = RME9652_DS | RME9652_freq;
519 spin_unlock_irq(&rme9652->lock);
523 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
524 spin_unlock_irq(&rme9652->lock);
528 if ((restart = rme9652->running)) {
529 rme9652_stop(rme9652);
531 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
532 rme9652->control_register |= rate;
533 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
536 rme9652_start(rme9652);
539 if (rate & RME9652_DS) {
540 if (rme9652->ss_channels == RME9652_NCHANNELS) {
541 rme9652->channel_map = channel_map_9652_ds;
543 rme9652->channel_map = channel_map_9636_ds;
546 if (rme9652->ss_channels == RME9652_NCHANNELS) {
547 rme9652->channel_map = channel_map_9652_ss;
549 rme9652->channel_map = channel_map_9636_ss;
553 spin_unlock_irq(&rme9652->lock);
557 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
561 rme9652->passthru = 0;
565 /* set thru for all channels */
568 for (i = 0; i < RME9652_NCHANNELS; i++) {
569 rme9652->thru_bits |= (1 << i);
570 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
573 for (i = 0; i < RME9652_NCHANNELS; i++) {
574 rme9652->thru_bits &= ~(1 << i);
575 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
582 mapped_channel = rme9652->channel_map[channel];
585 rme9652->thru_bits |= (1 << mapped_channel);
587 rme9652->thru_bits &= ~(1 << mapped_channel);
590 rme9652_write(rme9652,
591 RME9652_thru_base + mapped_channel * 4,
596 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
599 rme9652_set_thru(rme9652, -1, 1);
601 /* we don't want interrupts, so do a
602 custom version of rme9652_start().
605 rme9652->control_register =
607 rme9652_encode_latency(7) |
610 rme9652_reset_hw_pointer(rme9652);
612 rme9652_write(rme9652, RME9652_control_register,
613 rme9652->control_register);
614 rme9652->passthru = 1;
616 rme9652_set_thru(rme9652, -1, 0);
617 rme9652_stop(rme9652);
618 rme9652->passthru = 0;
624 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
627 rme9652->control_register |= mask;
629 rme9652->control_register &= ~mask;
631 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
634 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
639 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
641 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
643 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
645 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
646 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
650 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
658 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
659 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
660 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
662 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
668 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
670 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
671 rme9652_spdif_write_byte (rme9652, 0x20);
672 rme9652_spdif_write_byte (rme9652, address);
673 rme9652_spdif_write_byte (rme9652, data);
674 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
678 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
682 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
683 rme9652_spdif_write_byte (rme9652, 0x20);
684 rme9652_spdif_write_byte (rme9652, address);
685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
686 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
688 rme9652_spdif_write_byte (rme9652, 0x21);
689 ret = rme9652_spdif_read_byte (rme9652);
690 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
695 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
697 /* XXX what unsets this ? */
699 rme9652->control_register |= RME9652_SPDIF_RESET;
701 rme9652_write_spdif_codec (rme9652, 4, 0x40);
702 rme9652_write_spdif_codec (rme9652, 17, 0x13);
703 rme9652_write_spdif_codec (rme9652, 6, 0x02);
706 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
708 unsigned int rate_bits;
710 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
711 return -1; /* error condition */
714 if (s->hw_rev == 15) {
718 x = rme9652_spdif_read_codec (s, 30);
725 if (y > 30400 && y < 33600) ret = 32000;
726 else if (y > 41900 && y < 46000) ret = 44100;
727 else if (y > 46000 && y < 50400) ret = 48000;
728 else if (y > 60800 && y < 67200) ret = 64000;
729 else if (y > 83700 && y < 92000) ret = 88200;
730 else if (y > 92000 && y < 100000) ret = 96000;
735 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
737 switch (rme9652_decode_spdif_rate(rate_bits)) {
763 dev_err(s->card->dev,
764 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
765 s->card_name, rate_bits);
771 /*-----------------------------------------------------------------------------
773 ----------------------------------------------------------------------------*/
775 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
778 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
779 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
780 if (val & RME9652_PRO)
781 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
783 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
787 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
789 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
790 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
791 if (val & RME9652_PRO)
792 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
794 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
797 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
799 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
804 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
806 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
808 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
812 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
814 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
818 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
819 spin_lock_irq(&rme9652->lock);
820 change = val != rme9652->creg_spdif;
821 rme9652->creg_spdif = val;
822 spin_unlock_irq(&rme9652->lock);
826 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
828 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
833 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
835 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
837 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
841 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
843 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
847 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
848 spin_lock_irq(&rme9652->lock);
849 change = val != rme9652->creg_spdif_stream;
850 rme9652->creg_spdif_stream = val;
851 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
852 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
853 spin_unlock_irq(&rme9652->lock);
857 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
859 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
864 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
866 ucontrol->value.iec958.status[0] = kcontrol->private_value;
870 #define RME9652_ADAT1_IN(xname, xindex) \
871 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
872 .info = snd_rme9652_info_adat1_in, \
873 .get = snd_rme9652_get_adat1_in, \
874 .put = snd_rme9652_put_adat1_in }
876 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
878 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
883 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
888 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
890 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
893 /* XXX do we actually need to stop the card when we do this ? */
895 if ((restart = rme9652->running)) {
896 rme9652_stop(rme9652);
899 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
902 rme9652_start(rme9652);
908 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
910 static const char * const texts[2] = {"ADAT1", "Internal"};
912 return snd_ctl_enum_info(uinfo, 1, 2, texts);
915 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
917 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
919 spin_lock_irq(&rme9652->lock);
920 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
921 spin_unlock_irq(&rme9652->lock);
925 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
927 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
931 if (!snd_rme9652_use_is_exclusive(rme9652))
933 val = ucontrol->value.enumerated.item[0] % 2;
934 spin_lock_irq(&rme9652->lock);
935 change = val != rme9652_adat1_in(rme9652);
937 rme9652_set_adat1_input(rme9652, val);
938 spin_unlock_irq(&rme9652->lock);
942 #define RME9652_SPDIF_IN(xname, xindex) \
943 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
944 .info = snd_rme9652_info_spdif_in, \
945 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
947 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
949 return rme9652_decode_spdif_in(rme9652->control_register &
953 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
957 rme9652->control_register &= ~RME9652_inp;
958 rme9652->control_register |= rme9652_encode_spdif_in(in);
960 if ((restart = rme9652->running)) {
961 rme9652_stop(rme9652);
964 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
967 rme9652_start(rme9652);
973 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
975 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
977 return snd_ctl_enum_info(uinfo, 1, 3, texts);
980 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
982 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
984 spin_lock_irq(&rme9652->lock);
985 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
986 spin_unlock_irq(&rme9652->lock);
990 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
992 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
996 if (!snd_rme9652_use_is_exclusive(rme9652))
998 val = ucontrol->value.enumerated.item[0] % 3;
999 spin_lock_irq(&rme9652->lock);
1000 change = val != rme9652_spdif_in(rme9652);
1002 rme9652_set_spdif_input(rme9652, val);
1003 spin_unlock_irq(&rme9652->lock);
1007 #define RME9652_SPDIF_OUT(xname, xindex) \
1008 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1009 .info = snd_rme9652_info_spdif_out, \
1010 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1012 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1014 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1017 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1022 rme9652->control_register |= RME9652_opt_out;
1024 rme9652->control_register &= ~RME9652_opt_out;
1027 if ((restart = rme9652->running)) {
1028 rme9652_stop(rme9652);
1031 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1034 rme9652_start(rme9652);
1040 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1042 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1044 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1046 spin_lock_irq(&rme9652->lock);
1047 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1048 spin_unlock_irq(&rme9652->lock);
1052 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1054 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1058 if (!snd_rme9652_use_is_exclusive(rme9652))
1060 val = ucontrol->value.integer.value[0] & 1;
1061 spin_lock_irq(&rme9652->lock);
1062 change = (int)val != rme9652_spdif_out(rme9652);
1063 rme9652_set_spdif_output(rme9652, val);
1064 spin_unlock_irq(&rme9652->lock);
1068 #define RME9652_SYNC_MODE(xname, xindex) \
1069 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1070 .info = snd_rme9652_info_sync_mode, \
1071 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1073 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1075 if (rme9652->control_register & RME9652_wsel) {
1077 } else if (rme9652->control_register & RME9652_Master) {
1084 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1090 rme9652->control_register &=
1091 ~(RME9652_Master | RME9652_wsel);
1094 rme9652->control_register =
1095 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1098 rme9652->control_register |=
1099 (RME9652_Master | RME9652_wsel);
1103 if ((restart = rme9652->running)) {
1104 rme9652_stop(rme9652);
1107 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1110 rme9652_start(rme9652);
1116 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1118 static const char * const texts[3] = {
1119 "AutoSync", "Master", "Word Clock"
1122 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1125 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1127 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1129 spin_lock_irq(&rme9652->lock);
1130 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1131 spin_unlock_irq(&rme9652->lock);
1135 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1137 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1141 val = ucontrol->value.enumerated.item[0] % 3;
1142 spin_lock_irq(&rme9652->lock);
1143 change = (int)val != rme9652_sync_mode(rme9652);
1144 rme9652_set_sync_mode(rme9652, val);
1145 spin_unlock_irq(&rme9652->lock);
1149 #define RME9652_SYNC_PREF(xname, xindex) \
1150 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1151 .info = snd_rme9652_info_sync_pref, \
1152 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1154 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1156 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1157 case RME9652_SyncPref_ADAT1:
1158 return RME9652_SYNC_FROM_ADAT1;
1159 case RME9652_SyncPref_ADAT2:
1160 return RME9652_SYNC_FROM_ADAT2;
1161 case RME9652_SyncPref_ADAT3:
1162 return RME9652_SYNC_FROM_ADAT3;
1163 case RME9652_SyncPref_SPDIF:
1164 return RME9652_SYNC_FROM_SPDIF;
1170 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1174 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1176 case RME9652_SYNC_FROM_ADAT1:
1177 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1179 case RME9652_SYNC_FROM_ADAT2:
1180 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1182 case RME9652_SYNC_FROM_ADAT3:
1183 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1185 case RME9652_SYNC_FROM_SPDIF:
1186 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1190 if ((restart = rme9652->running)) {
1191 rme9652_stop(rme9652);
1194 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1197 rme9652_start(rme9652);
1203 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1205 static const char * const texts[4] = {
1206 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1208 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1210 return snd_ctl_enum_info(uinfo, 1,
1211 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1215 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1217 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1219 spin_lock_irq(&rme9652->lock);
1220 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1221 spin_unlock_irq(&rme9652->lock);
1225 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1227 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1231 if (!snd_rme9652_use_is_exclusive(rme9652))
1233 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1234 val = ucontrol->value.enumerated.item[0] % max;
1235 spin_lock_irq(&rme9652->lock);
1236 change = (int)val != rme9652_sync_pref(rme9652);
1237 rme9652_set_sync_pref(rme9652, val);
1238 spin_unlock_irq(&rme9652->lock);
1242 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1244 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1245 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1246 uinfo->count = rme9652->ss_channels;
1247 uinfo->value.integer.min = 0;
1248 uinfo->value.integer.max = 1;
1252 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1254 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1256 u32 thru_bits = rme9652->thru_bits;
1258 for (k = 0; k < rme9652->ss_channels; ++k) {
1259 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1264 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1266 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1271 if (!snd_rme9652_use_is_exclusive(rme9652))
1274 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1275 if (ucontrol->value.integer.value[chn])
1276 thru_bits |= 1 << chn;
1279 spin_lock_irq(&rme9652->lock);
1280 change = thru_bits ^ rme9652->thru_bits;
1282 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1283 if (!(change & (1 << chn)))
1285 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1288 spin_unlock_irq(&rme9652->lock);
1292 #define RME9652_PASSTHRU(xname, xindex) \
1293 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1294 .info = snd_rme9652_info_passthru, \
1295 .put = snd_rme9652_put_passthru, \
1296 .get = snd_rme9652_get_passthru }
1298 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1300 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1302 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1304 spin_lock_irq(&rme9652->lock);
1305 ucontrol->value.integer.value[0] = rme9652->passthru;
1306 spin_unlock_irq(&rme9652->lock);
1310 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1312 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1317 if (!snd_rme9652_use_is_exclusive(rme9652))
1320 val = ucontrol->value.integer.value[0] & 1;
1321 spin_lock_irq(&rme9652->lock);
1322 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1324 err = rme9652_set_passthru(rme9652, val);
1325 spin_unlock_irq(&rme9652->lock);
1326 return err ? err : change;
1329 /* Read-only switches */
1331 #define RME9652_SPDIF_RATE(xname, xindex) \
1332 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1333 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1334 .info = snd_rme9652_info_spdif_rate, \
1335 .get = snd_rme9652_get_spdif_rate }
1337 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1339 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1341 uinfo->value.integer.min = 0;
1342 uinfo->value.integer.max = 96000;
1346 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1348 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1350 spin_lock_irq(&rme9652->lock);
1351 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1352 spin_unlock_irq(&rme9652->lock);
1356 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1357 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1358 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1359 .info = snd_rme9652_info_adat_sync, \
1360 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1362 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1364 static const char * const texts[4] = {
1365 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1368 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1371 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1373 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1374 unsigned int mask1, mask2, val;
1376 switch (kcontrol->private_value) {
1377 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1378 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1379 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1380 default: return -EINVAL;
1382 val = rme9652_read(rme9652, RME9652_status_register);
1383 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1384 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1388 #define RME9652_TC_VALID(xname, xindex) \
1389 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1390 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1391 .info = snd_rme9652_info_tc_valid, \
1392 .get = snd_rme9652_get_tc_valid }
1394 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1396 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1398 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1400 ucontrol->value.integer.value[0] =
1401 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1405 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1407 /* FIXME: this routine needs a port to the new control API --jk */
1409 static int snd_rme9652_get_tc_value(void *private_data,
1410 snd_kswitch_t *kswitch,
1411 snd_switch_t *uswitch)
1413 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1417 uswitch->type = SNDRV_SW_TYPE_DWORD;
1419 if ((rme9652_read(s, RME9652_status_register) &
1420 RME9652_tc_valid) == 0) {
1421 uswitch->value.data32[0] = 0;
1425 /* timecode request */
1427 rme9652_write(s, RME9652_time_code, 0);
1429 /* XXX bug alert: loop-based timing !!!! */
1431 for (i = 0; i < 50; i++) {
1432 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1436 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1442 for (i = 0; i < 32; i++) {
1445 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1446 value |= 0x80000000;
1449 if (value > 2 * 60 * 48000) {
1450 value -= 2 * 60 * 48000;
1455 uswitch->value.data32[0] = value;
1460 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1462 static struct snd_kcontrol_new snd_rme9652_controls[] = {
1464 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1465 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1466 .info = snd_rme9652_control_spdif_info,
1467 .get = snd_rme9652_control_spdif_get,
1468 .put = snd_rme9652_control_spdif_put,
1471 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1472 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1473 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1474 .info = snd_rme9652_control_spdif_stream_info,
1475 .get = snd_rme9652_control_spdif_stream_get,
1476 .put = snd_rme9652_control_spdif_stream_put,
1479 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1480 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1481 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1482 .info = snd_rme9652_control_spdif_mask_info,
1483 .get = snd_rme9652_control_spdif_mask_get,
1484 .private_value = IEC958_AES0_NONAUDIO |
1485 IEC958_AES0_PROFESSIONAL |
1486 IEC958_AES0_CON_EMPHASIS,
1489 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1490 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1491 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1492 .info = snd_rme9652_control_spdif_mask_info,
1493 .get = snd_rme9652_control_spdif_mask_get,
1494 .private_value = IEC958_AES0_NONAUDIO |
1495 IEC958_AES0_PROFESSIONAL |
1496 IEC958_AES0_PRO_EMPHASIS,
1498 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1499 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1500 RME9652_SYNC_MODE("Sync Mode", 0),
1501 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1503 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1504 .name = "Channels Thru",
1506 .info = snd_rme9652_info_thru,
1507 .get = snd_rme9652_get_thru,
1508 .put = snd_rme9652_put_thru,
1510 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1511 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1512 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1513 RME9652_TC_VALID("Timecode Valid", 0),
1514 RME9652_PASSTHRU("Passthru", 0)
1517 static struct snd_kcontrol_new snd_rme9652_adat3_check =
1518 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1520 static struct snd_kcontrol_new snd_rme9652_adat1_input =
1521 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1523 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1527 struct snd_kcontrol *kctl;
1529 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1530 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1532 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1533 rme9652->spdif_ctl = kctl;
1536 if (rme9652->ss_channels == RME9652_NCHANNELS)
1537 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1540 if (rme9652->hw_rev >= 15)
1541 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1547 /*------------------------------------------------------------
1549 ------------------------------------------------------------*/
1552 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1554 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1555 u32 thru_bits = rme9652->thru_bits;
1556 int show_auto_sync_source = 0;
1558 unsigned int status;
1561 status = rme9652_read(rme9652, RME9652_status_register);
1563 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1564 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1565 rme9652->capture_buffer, rme9652->playback_buffer);
1566 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1567 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1568 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1570 snd_iprintf(buffer, "\n");
1572 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1575 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1576 x, (unsigned long) rme9652->period_bytes);
1577 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1578 rme9652_hw_pointer(rme9652));
1579 snd_iprintf(buffer, "Passthru: %s\n",
1580 rme9652->passthru ? "yes" : "no");
1582 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1583 snd_iprintf(buffer, "Clock mode: autosync\n");
1584 show_auto_sync_source = 1;
1585 } else if (rme9652->control_register & RME9652_wsel) {
1586 if (status & RME9652_wsel_rd) {
1587 snd_iprintf(buffer, "Clock mode: word clock\n");
1589 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1592 snd_iprintf(buffer, "Clock mode: master\n");
1595 if (show_auto_sync_source) {
1596 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1597 case RME9652_SyncPref_ADAT1:
1598 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1600 case RME9652_SyncPref_ADAT2:
1601 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1603 case RME9652_SyncPref_ADAT3:
1604 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1606 case RME9652_SyncPref_SPDIF:
1607 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1610 snd_iprintf(buffer, "Pref. sync source: ???\n");
1614 if (rme9652->hw_rev >= 15)
1615 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1616 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1617 "Internal" : "ADAT1 optical");
1619 snd_iprintf(buffer, "\n");
1621 switch (rme9652_decode_spdif_in(rme9652->control_register &
1623 case RME9652_SPDIFIN_OPTICAL:
1624 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1626 case RME9652_SPDIFIN_COAXIAL:
1627 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1629 case RME9652_SPDIFIN_INTERN:
1630 snd_iprintf(buffer, "IEC958 input: Internal\n");
1633 snd_iprintf(buffer, "IEC958 input: ???\n");
1637 if (rme9652->control_register & RME9652_opt_out) {
1638 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1640 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1643 if (rme9652->control_register & RME9652_PRO) {
1644 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1646 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1649 if (rme9652->control_register & RME9652_EMP) {
1650 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1652 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1655 if (rme9652->control_register & RME9652_Dolby) {
1656 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1658 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1661 i = rme9652_spdif_sample_rate(rme9652);
1665 "IEC958 sample rate: error flag set\n");
1666 } else if (i == 0) {
1667 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1669 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1672 snd_iprintf(buffer, "\n");
1674 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1675 rme9652_adat_sample_rate(rme9652));
1679 x = status & RME9652_sync_0;
1680 if (status & RME9652_lock_0) {
1681 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1683 snd_iprintf(buffer, "ADAT1: No Lock\n");
1686 x = status & RME9652_sync_1;
1687 if (status & RME9652_lock_1) {
1688 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1690 snd_iprintf(buffer, "ADAT2: No Lock\n");
1693 x = status & RME9652_sync_2;
1694 if (status & RME9652_lock_2) {
1695 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1697 snd_iprintf(buffer, "ADAT3: No Lock\n");
1700 snd_iprintf(buffer, "\n");
1702 snd_iprintf(buffer, "Timecode signal: %s\n",
1703 (status & RME9652_tc_valid) ? "yes" : "no");
1707 snd_iprintf(buffer, "Punch Status:\n\n");
1709 for (i = 0; i < rme9652->ss_channels; i++) {
1710 if (thru_bits & (1 << i)) {
1711 snd_iprintf(buffer, "%2d: on ", i + 1);
1713 snd_iprintf(buffer, "%2d: off ", i + 1);
1716 if (((i + 1) % 8) == 0) {
1717 snd_iprintf(buffer, "\n");
1721 snd_iprintf(buffer, "\n");
1724 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1726 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1727 snd_rme9652_proc_read);
1730 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1732 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1733 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1736 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1738 if (rme9652->irq >= 0)
1739 rme9652_stop(rme9652);
1740 snd_rme9652_free_buffers(rme9652);
1742 if (rme9652->irq >= 0)
1743 free_irq(rme9652->irq, (void *)rme9652);
1744 iounmap(rme9652->iobase);
1746 pci_release_regions(rme9652->pci);
1748 pci_disable_device(rme9652->pci);
1752 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1754 unsigned long pb_bus, cb_bus;
1756 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1757 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1758 if (rme9652->capture_dma_buf.area)
1759 snd_dma_free_pages(&rme9652->capture_dma_buf);
1760 dev_err(rme9652->card->dev,
1761 "%s: no buffers available\n", rme9652->card_name);
1765 /* Align to bus-space 64K boundary */
1767 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1768 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1770 /* Tell the card where it is */
1772 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1773 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1775 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1776 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1781 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1785 /* ASSUMPTION: rme9652->lock is either held, or
1786 there is no need to hold it (e.g. during module
1792 SPDIF Input via Coax
1794 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1795 which implies 2 4096 sample, 32Kbyte periods).
1797 if rev 1.5, initialize the S/PDIF receiver.
1801 rme9652->control_register =
1802 RME9652_inp_0 | rme9652_encode_latency(7);
1804 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1806 rme9652_reset_hw_pointer(rme9652);
1807 rme9652_compute_period_size(rme9652);
1809 /* default: thru off for all channels */
1811 for (k = 0; k < RME9652_NCHANNELS; ++k)
1812 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1814 rme9652->thru_bits = 0;
1815 rme9652->passthru = 0;
1817 /* set a default rate so that the channel map is set up */
1819 rme9652_set_rate(rme9652, 48000);
1822 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1824 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1826 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1830 rme9652_write(rme9652, RME9652_irq_clear, 0);
1832 if (rme9652->capture_substream) {
1833 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1836 if (rme9652->playback_substream) {
1837 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1842 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1844 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1845 return rme9652_hw_pointer(rme9652);
1848 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1855 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1858 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1862 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1863 return rme9652->capture_buffer +
1864 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1866 return rme9652->playback_buffer +
1867 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1871 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1872 int channel, unsigned long pos,
1873 void __user *src, unsigned long count)
1875 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1878 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1881 channel_buf = rme9652_channel_buffer_location (rme9652,
1882 substream->pstr->stream,
1884 if (snd_BUG_ON(!channel_buf))
1886 if (copy_from_user(channel_buf + pos, src, count))
1891 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1892 int channel, unsigned long pos,
1893 void *src, unsigned long count)
1895 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1898 channel_buf = rme9652_channel_buffer_location(rme9652,
1899 substream->pstr->stream,
1901 if (snd_BUG_ON(!channel_buf))
1903 memcpy(channel_buf + pos, src, count);
1907 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1908 int channel, unsigned long pos,
1909 void __user *dst, unsigned long count)
1911 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1914 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1917 channel_buf = rme9652_channel_buffer_location (rme9652,
1918 substream->pstr->stream,
1920 if (snd_BUG_ON(!channel_buf))
1922 if (copy_to_user(dst, channel_buf + pos, count))
1927 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1928 int channel, unsigned long pos,
1929 void *dst, unsigned long count)
1931 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1934 channel_buf = rme9652_channel_buffer_location(rme9652,
1935 substream->pstr->stream,
1937 if (snd_BUG_ON(!channel_buf))
1939 memcpy(dst, channel_buf + pos, count);
1943 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1944 int channel, unsigned long pos,
1945 unsigned long count)
1947 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1950 channel_buf = rme9652_channel_buffer_location (rme9652,
1951 substream->pstr->stream,
1953 if (snd_BUG_ON(!channel_buf))
1955 memset(channel_buf + pos, 0, count);
1959 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1961 struct snd_pcm_runtime *runtime = substream->runtime;
1962 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1963 struct snd_pcm_substream *other;
1964 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1965 other = rme9652->capture_substream;
1967 other = rme9652->playback_substream;
1968 if (rme9652->running)
1969 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1971 runtime->status->hw_ptr = 0;
1973 struct snd_pcm_substream *s;
1974 struct snd_pcm_runtime *oruntime = other->runtime;
1975 snd_pcm_group_for_each_entry(s, substream) {
1977 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1985 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1986 struct snd_pcm_hw_params *params)
1988 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1993 spin_lock_irq(&rme9652->lock);
1995 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1996 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1997 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1998 this_pid = rme9652->playback_pid;
1999 other_pid = rme9652->capture_pid;
2001 this_pid = rme9652->capture_pid;
2002 other_pid = rme9652->playback_pid;
2005 if ((other_pid > 0) && (this_pid != other_pid)) {
2007 /* The other stream is open, and not by the same
2008 task as this one. Make sure that the parameters
2009 that matter are the same.
2012 if ((int)params_rate(params) !=
2013 rme9652_adat_sample_rate(rme9652)) {
2014 spin_unlock_irq(&rme9652->lock);
2015 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2019 if (params_period_size(params) != rme9652->period_bytes / 4) {
2020 spin_unlock_irq(&rme9652->lock);
2021 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2027 spin_unlock_irq(&rme9652->lock);
2031 spin_unlock_irq(&rme9652->lock);
2034 /* how to make sure that the rate matches an externally-set one ?
2037 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2038 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2042 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2043 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2050 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2051 struct snd_pcm_channel_info *info)
2053 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2056 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2059 chn = rme9652->channel_map[array_index_nospec(info->channel,
2060 RME9652_NCHANNELS)];
2064 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2070 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2071 unsigned int cmd, void *arg)
2074 case SNDRV_PCM_IOCTL1_RESET:
2076 return snd_rme9652_reset(substream);
2078 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2080 struct snd_pcm_channel_info *info = arg;
2081 return snd_rme9652_channel_info(substream, info);
2087 return snd_pcm_lib_ioctl(substream, cmd, arg);
2090 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2092 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2095 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2098 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2099 struct snd_pcm_substream *other;
2101 spin_lock(&rme9652->lock);
2102 running = rme9652->running;
2104 case SNDRV_PCM_TRIGGER_START:
2105 running |= 1 << substream->stream;
2107 case SNDRV_PCM_TRIGGER_STOP:
2108 running &= ~(1 << substream->stream);
2112 spin_unlock(&rme9652->lock);
2115 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2116 other = rme9652->capture_substream;
2118 other = rme9652->playback_substream;
2121 struct snd_pcm_substream *s;
2122 snd_pcm_group_for_each_entry(s, substream) {
2124 snd_pcm_trigger_done(s, substream);
2125 if (cmd == SNDRV_PCM_TRIGGER_START)
2126 running |= 1 << s->stream;
2128 running &= ~(1 << s->stream);
2132 if (cmd == SNDRV_PCM_TRIGGER_START) {
2133 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2134 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2135 rme9652_silence_playback(rme9652);
2138 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2139 rme9652_silence_playback(rme9652);
2142 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2143 rme9652_silence_playback(rme9652);
2146 snd_pcm_trigger_done(substream, substream);
2147 if (!rme9652->running && running)
2148 rme9652_start(rme9652);
2149 else if (rme9652->running && !running)
2150 rme9652_stop(rme9652);
2151 rme9652->running = running;
2152 spin_unlock(&rme9652->lock);
2157 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2159 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2160 unsigned long flags;
2162 spin_lock_irqsave(&rme9652->lock, flags);
2163 if (!rme9652->running)
2164 rme9652_reset_hw_pointer(rme9652);
2165 spin_unlock_irqrestore(&rme9652->lock, flags);
2169 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2171 .info = (SNDRV_PCM_INFO_MMAP |
2172 SNDRV_PCM_INFO_MMAP_VALID |
2173 SNDRV_PCM_INFO_NONINTERLEAVED |
2174 SNDRV_PCM_INFO_SYNC_START |
2175 SNDRV_PCM_INFO_DOUBLE),
2176 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2177 .rates = (SNDRV_PCM_RATE_44100 |
2178 SNDRV_PCM_RATE_48000 |
2179 SNDRV_PCM_RATE_88200 |
2180 SNDRV_PCM_RATE_96000),
2185 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2186 .period_bytes_min = (64 * 4) * 10,
2187 .period_bytes_max = (8192 * 4) * 26,
2193 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2195 .info = (SNDRV_PCM_INFO_MMAP |
2196 SNDRV_PCM_INFO_MMAP_VALID |
2197 SNDRV_PCM_INFO_NONINTERLEAVED |
2198 SNDRV_PCM_INFO_SYNC_START),
2199 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2200 .rates = (SNDRV_PCM_RATE_44100 |
2201 SNDRV_PCM_RATE_48000 |
2202 SNDRV_PCM_RATE_88200 |
2203 SNDRV_PCM_RATE_96000),
2208 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2209 .period_bytes_min = (64 * 4) * 10,
2210 .period_bytes_max = (8192 * 4) * 26,
2216 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2218 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2219 .count = ARRAY_SIZE(period_sizes),
2220 .list = period_sizes,
2224 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2225 struct snd_pcm_hw_rule *rule)
2227 struct snd_rme9652 *rme9652 = rule->private;
2228 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2229 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2230 return snd_interval_list(c, 2, list, 0);
2233 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2234 struct snd_pcm_hw_rule *rule)
2236 struct snd_rme9652 *rme9652 = rule->private;
2237 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2238 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2239 if (r->min > 48000) {
2240 struct snd_interval t = {
2241 .min = rme9652->ds_channels,
2242 .max = rme9652->ds_channels,
2245 return snd_interval_refine(c, &t);
2246 } else if (r->max < 88200) {
2247 struct snd_interval t = {
2248 .min = rme9652->ss_channels,
2249 .max = rme9652->ss_channels,
2252 return snd_interval_refine(c, &t);
2257 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2258 struct snd_pcm_hw_rule *rule)
2260 struct snd_rme9652 *rme9652 = rule->private;
2261 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2262 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2263 if (c->min >= rme9652->ss_channels) {
2264 struct snd_interval t = {
2269 return snd_interval_refine(r, &t);
2270 } else if (c->max <= rme9652->ds_channels) {
2271 struct snd_interval t = {
2276 return snd_interval_refine(r, &t);
2281 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2283 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2284 struct snd_pcm_runtime *runtime = substream->runtime;
2286 spin_lock_irq(&rme9652->lock);
2288 snd_pcm_set_sync(substream);
2290 runtime->hw = snd_rme9652_playback_subinfo;
2291 runtime->dma_area = rme9652->playback_buffer;
2292 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2294 if (rme9652->capture_substream == NULL) {
2295 rme9652_stop(rme9652);
2296 rme9652_set_thru(rme9652, -1, 0);
2299 rme9652->playback_pid = current->pid;
2300 rme9652->playback_substream = substream;
2302 spin_unlock_irq(&rme9652->lock);
2304 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2305 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2306 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2307 snd_rme9652_hw_rule_channels, rme9652,
2308 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2309 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2310 snd_rme9652_hw_rule_channels_rate, rme9652,
2311 SNDRV_PCM_HW_PARAM_RATE, -1);
2312 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2313 snd_rme9652_hw_rule_rate_channels, rme9652,
2314 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2316 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2317 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2318 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2319 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2323 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2325 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2327 spin_lock_irq(&rme9652->lock);
2329 rme9652->playback_pid = -1;
2330 rme9652->playback_substream = NULL;
2332 spin_unlock_irq(&rme9652->lock);
2334 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2335 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2336 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2341 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2343 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2344 struct snd_pcm_runtime *runtime = substream->runtime;
2346 spin_lock_irq(&rme9652->lock);
2348 snd_pcm_set_sync(substream);
2350 runtime->hw = snd_rme9652_capture_subinfo;
2351 runtime->dma_area = rme9652->capture_buffer;
2352 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2354 if (rme9652->playback_substream == NULL) {
2355 rme9652_stop(rme9652);
2356 rme9652_set_thru(rme9652, -1, 0);
2359 rme9652->capture_pid = current->pid;
2360 rme9652->capture_substream = substream;
2362 spin_unlock_irq(&rme9652->lock);
2364 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2365 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2366 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2367 snd_rme9652_hw_rule_channels, rme9652,
2368 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2369 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2370 snd_rme9652_hw_rule_channels_rate, rme9652,
2371 SNDRV_PCM_HW_PARAM_RATE, -1);
2372 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2373 snd_rme9652_hw_rule_rate_channels, rme9652,
2374 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2378 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2380 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2382 spin_lock_irq(&rme9652->lock);
2384 rme9652->capture_pid = -1;
2385 rme9652->capture_substream = NULL;
2387 spin_unlock_irq(&rme9652->lock);
2391 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2392 .open = snd_rme9652_playback_open,
2393 .close = snd_rme9652_playback_release,
2394 .ioctl = snd_rme9652_ioctl,
2395 .hw_params = snd_rme9652_hw_params,
2396 .prepare = snd_rme9652_prepare,
2397 .trigger = snd_rme9652_trigger,
2398 .pointer = snd_rme9652_hw_pointer,
2399 .copy_user = snd_rme9652_playback_copy,
2400 .copy_kernel = snd_rme9652_playback_copy_kernel,
2401 .fill_silence = snd_rme9652_hw_silence,
2404 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2405 .open = snd_rme9652_capture_open,
2406 .close = snd_rme9652_capture_release,
2407 .ioctl = snd_rme9652_ioctl,
2408 .hw_params = snd_rme9652_hw_params,
2409 .prepare = snd_rme9652_prepare,
2410 .trigger = snd_rme9652_trigger,
2411 .pointer = snd_rme9652_hw_pointer,
2412 .copy_user = snd_rme9652_capture_copy,
2413 .copy_kernel = snd_rme9652_capture_copy_kernel,
2416 static int snd_rme9652_create_pcm(struct snd_card *card,
2417 struct snd_rme9652 *rme9652)
2419 struct snd_pcm *pcm;
2422 if ((err = snd_pcm_new(card,
2424 0, 1, 1, &pcm)) < 0) {
2429 pcm->private_data = rme9652;
2430 strcpy(pcm->name, rme9652->card_name);
2432 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2433 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2435 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2440 static int snd_rme9652_create(struct snd_card *card,
2441 struct snd_rme9652 *rme9652,
2444 struct pci_dev *pci = rme9652->pci;
2450 rme9652->card = card;
2452 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2454 switch (rev & 0xff) {
2466 if ((err = pci_enable_device(pci)) < 0)
2469 spin_lock_init(&rme9652->lock);
2471 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2473 rme9652->port = pci_resource_start(pci, 0);
2474 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2475 if (rme9652->iobase == NULL) {
2476 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2477 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2481 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2482 KBUILD_MODNAME, rme9652)) {
2483 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2486 rme9652->irq = pci->irq;
2487 rme9652->precise_ptr = precise_ptr;
2489 /* Determine the h/w rev level of the card. This seems like
2490 a particularly kludgy way to encode it, but its what RME
2491 chose to do, so we follow them ...
2494 status = rme9652_read(rme9652, RME9652_status_register);
2495 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2496 rme9652->hw_rev = 15;
2498 rme9652->hw_rev = 11;
2501 /* Differentiate between the standard Hammerfall, and the
2502 "Light", which does not have the expansion board. This
2503 method comes from information received from Mathhias
2504 Clausen at RME. Display the EEPROM and h/w revID where
2509 case 8: /* original eprom */
2510 strcpy(card->driver, "RME9636");
2511 if (rme9652->hw_rev == 15) {
2512 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2514 rme9652->card_name = "RME Digi9636";
2516 rme9652->ss_channels = RME9636_NCHANNELS;
2518 case 9: /* W36_G EPROM */
2519 strcpy(card->driver, "RME9636");
2520 rme9652->card_name = "RME Digi9636 (Rev G)";
2521 rme9652->ss_channels = RME9636_NCHANNELS;
2523 case 4: /* W52_G EPROM */
2524 strcpy(card->driver, "RME9652");
2525 rme9652->card_name = "RME Digi9652 (Rev G)";
2526 rme9652->ss_channels = RME9652_NCHANNELS;
2528 case 3: /* original eprom */
2529 strcpy(card->driver, "RME9652");
2530 if (rme9652->hw_rev == 15) {
2531 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2533 rme9652->card_name = "RME Digi9652";
2535 rme9652->ss_channels = RME9652_NCHANNELS;
2539 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2541 pci_set_master(rme9652->pci);
2543 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2547 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2551 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2555 snd_rme9652_proc_init(rme9652);
2557 rme9652->last_spdif_sample_rate = -1;
2558 rme9652->last_adat_sample_rate = -1;
2559 rme9652->playback_pid = -1;
2560 rme9652->capture_pid = -1;
2561 rme9652->capture_substream = NULL;
2562 rme9652->playback_substream = NULL;
2564 snd_rme9652_set_defaults(rme9652);
2566 if (rme9652->hw_rev == 15) {
2567 rme9652_initialize_spdif_receiver (rme9652);
2573 static void snd_rme9652_card_free(struct snd_card *card)
2575 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2578 snd_rme9652_free(rme9652);
2581 static int snd_rme9652_probe(struct pci_dev *pci,
2582 const struct pci_device_id *pci_id)
2585 struct snd_rme9652 *rme9652;
2586 struct snd_card *card;
2589 if (dev >= SNDRV_CARDS)
2596 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2597 sizeof(struct snd_rme9652), &card);
2602 rme9652 = (struct snd_rme9652 *) card->private_data;
2603 card->private_free = snd_rme9652_card_free;
2606 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2610 strcpy(card->shortname, rme9652->card_name);
2612 sprintf(card->longname, "%s at 0x%lx, irq %d",
2613 card->shortname, rme9652->port, rme9652->irq);
2614 err = snd_card_register(card);
2617 snd_card_free(card);
2620 pci_set_drvdata(pci, card);
2625 static void snd_rme9652_remove(struct pci_dev *pci)
2627 snd_card_free(pci_get_drvdata(pci));
2630 static struct pci_driver rme9652_driver = {
2631 .name = KBUILD_MODNAME,
2632 .id_table = snd_rme9652_ids,
2633 .probe = snd_rme9652_probe,
2634 .remove = snd_rme9652_remove,
2637 module_pci_driver(rme9652_driver);