sound/pci/rme32.c

   1 /*
   2  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3  *
   4  *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
   5  *                              Pilo Chambert <pilo.c@wanadoo.fr>
   6  *
   7  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   8  *                         Henk Hesselink <henk@anda.nl>
   9  *                         for writing the digi96-driver
  10  *                         and RME for all informations.
  11  *
  12  *   This program is free software; you can redistribute it and/or modify
  13  *   it under the terms of the GNU General Public License as published by
  14  *   the Free Software Foundation; either version 2 of the License, or
  15  *   (at your option) any later version.
  16  *
  17  *   This program is distributed in the hope that it will be useful,
  18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *   GNU General Public License for more details.
  21  *
  22  *   You should have received a copy of the GNU General Public License
  23  *   along with this program; if not, write to the Free Software
  24  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  *
  27  * ****************************************************************************
  28  *
  29  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  30  *
  31  * Identical soundcards by Sek'd were labeled:
  32  * RME Digi 32     = Sek'd Prodif 32
  33  * RME Digi 32 Pro = Sek'd Prodif 96
  34  * RME Digi 32/8   = Sek'd Prodif Gold
  35  *
  36  * ****************************************************************************
  37  *
  38  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  39  *
  40  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  41  * in this mode. Rec data and play data are using the same buffer therefore. At
  42  * first you have got the playing bits in the buffer and then (after playing
  43  * them) they were overwitten by the captured sound of the CS8412/14. Both
  44  * modes (play/record) are running harmonically hand in hand in the same buffer
  45  * and you have only one start bit plus one interrupt bit to control this
  46  * paired action.
  47  * This is opposite to the latter rme96 where playing and capturing is totally
  48  * separated and so their full duplex mode is supported by alsa (using two
  49  * start bits and two interrupts for two different buffers).
  50  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  51  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  52  * able to solve it. Are you motivated enough to solve this problem now? Your
  53  * patch would be welcome!
  54  *
  55  * ****************************************************************************
  56  *
  57  * "The story after the long seeking" -- tiwai
  58  *
  59  * Ok, the situation regarding the full duplex is now improved a bit.
  60  * In the fullduplex mode (given by the module parameter), the hardware buffer
  61  * is split to halves for read and write directions at the DMA pointer.
  62  * That is, the half above the current DMA pointer is used for write, and
  63  * the half below is used for read.  To mangle this strange behavior, an
  64  * software intermediate buffer is introduced.  This is, of course, not good
  65  * from the viewpoint of the data transfer efficiency.  However, this allows
  66  * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
  67  *
  68  * ****************************************************************************
  69  */
  70
  71
  72 #include <linux/delay.h>
  73 #include <linux/gfp.h>
  74 #include <linux/init.h>
  75 #include <linux/interrupt.h>
  76 #include <linux/pci.h>
  77 #include <linux/module.h>
  78 #include <linux/io.h>
  79
  80 #include <sound/core.h>
  81 #include <sound/info.h>
  82 #include <sound/control.h>
  83 #include <sound/pcm.h>
  84 #include <sound/pcm_params.h>
  85 #include <sound/pcm-indirect.h>
  86 #include <sound/asoundef.h>
  87 #include <sound/initval.h>
  88
  89 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  90 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  91 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  92 static bool fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
  93
  94 module_param_array(index, int, NULL, 0444);
  95 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  96 module_param_array(id, charp, NULL, 0444);
  97 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  98 module_param_array(enable, bool, NULL, 0444);
  99 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
 100 module_param_array(fullduplex, bool, NULL, 0444);
 101 MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
 102 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
 103 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
 104 MODULE_LICENSE("GPL");
 105 MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
 106
 107 /* Defines for RME Digi32 series */
 108 #define RME32_SPDIF_NCHANNELS 2
 109
 110 /* Playback and capture buffer size */
 111 #define RME32_BUFFER_SIZE 0x20000
 112
 113 /* IO area size */
 114 #define RME32_IO_SIZE 0x30000
 115
 116 /* IO area offsets */
 117 #define RME32_IO_DATA_BUFFER        0x0
 118 #define RME32_IO_CONTROL_REGISTER   0x20000
 119 #define RME32_IO_GET_POS            0x20000
 120 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 121 #define RME32_IO_RESET_POS          0x20100
 122
 123 /* Write control register bits */
 124 #define RME32_WCR_START     (1 << 0)    /* startbit */
 125 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 126                                            Setting the whole card to mono
 127                                            doesn't seem to be very useful.
 128                                            A software-solution can handle
 129                                            full-duplex with one direction in
 130                                            stereo and the other way in mono.
 131                                            So, the hardware should work all
 132                                            the time in stereo! */
 133 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 134 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 135 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 136 #define RME32_WCR_FREQ_1    (1 << 5)
 137 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 138 #define RME32_WCR_INP_1     (1 << 7)
 139 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 140 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 141 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 142 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 143 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 144 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 145 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 146 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 147
 148 #define RME32_WCR_BITPOS_FREQ_0 4
 149 #define RME32_WCR_BITPOS_FREQ_1 5
 150 #define RME32_WCR_BITPOS_INP_0 6
 151 #define RME32_WCR_BITPOS_INP_1 7
 152
 153 /* Read control register bits */
 154 #define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
 155 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 156 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 157 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 158 #define RME32_RCR_FREQ_1    (1 << 28)
 159 #define RME32_RCR_FREQ_2    (1 << 29)
 160 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 161 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 162
 163 #define RME32_RCR_BITPOS_F0 27
 164 #define RME32_RCR_BITPOS_F1 28
 165 #define RME32_RCR_BITPOS_F2 29
 166
 167 /* Input types */
 168 #define RME32_INPUT_OPTICAL 0
 169 #define RME32_INPUT_COAXIAL 1
 170 #define RME32_INPUT_INTERNAL 2
 171 #define RME32_INPUT_XLR 3
 172
 173 /* Clock modes */
 174 #define RME32_CLOCKMODE_SLAVE 0
 175 #define RME32_CLOCKMODE_MASTER_32 1
 176 #define RME32_CLOCKMODE_MASTER_44 2
 177 #define RME32_CLOCKMODE_MASTER_48 3
 178
 179 /* Block sizes in bytes */
 180 #define RME32_BLOCK_SIZE 8192
 181
 182 /* Software intermediate buffer (max) size */
 183 #define RME32_MID_BUFFER_SIZE (1024*1024)
 184
 185 /* Hardware revisions */
 186 #define RME32_32_REVISION 192
 187 #define RME32_328_REVISION_OLD 100
 188 #define RME32_328_REVISION_NEW 101
 189 #define RME32_PRO_REVISION_WITH_8412 192
 190 #define RME32_PRO_REVISION_WITH_8414 150
 191
 192
 193 struct rme32 {
 194         spinlock_t lock;
 195         int irq;
 196         unsigned long port;
 197         void __iomem *iobase;
 198
 199         u32 wcreg;              /* cached write control register value */
 200         u32 wcreg_spdif;        /* S/PDIF setup */
 201         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 202         u32 rcreg;              /* cached read control register value */
 203
 204         u8 rev;                 /* card revision number */
 205
 206         struct snd_pcm_substream *playback_substream;
 207         struct snd_pcm_substream *capture_substream;
 208
 209         int playback_frlog;     /* log2 of framesize */
 210         int capture_frlog;
 211
 212         size_t playback_periodsize;     /* in bytes, zero if not used */
 213         size_t capture_periodsize;      /* in bytes, zero if not used */
 214
 215         unsigned int fullduplex_mode;
 216         int running;
 217
 218         struct snd_pcm_indirect playback_pcm;
 219         struct snd_pcm_indirect capture_pcm;
 220
 221         struct snd_card *card;
 222         struct snd_pcm *spdif_pcm;
 223         struct snd_pcm *adat_pcm;
 224         struct pci_dev *pci;
 225         struct snd_kcontrol *spdif_ctl;
 226 };
 227
 228 static const struct pci_device_id snd_rme32_ids[] = {
 229         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32), 0,},
 230         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_8), 0,},
 231         {PCI_VDEVICE(XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_PRO), 0,},
 232         {0,}
 233 };
 234
 235 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 236
 237 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 238 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 239
 240 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream);
 241
 242 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream);
 243
 244 static int snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
 245
 246 static void snd_rme32_proc_init(struct rme32 * rme32);
 247
 248 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32);
 249
 250 static inline unsigned int snd_rme32_pcm_byteptr(struct rme32 * rme32)
 251 {
 252         return (readl(rme32->iobase + RME32_IO_GET_POS)
 253                 & RME32_RCR_AUDIO_ADDR_MASK);
 254 }
 255
 256 /* silence callback for halfduplex mode */
 257 static int snd_rme32_playback_silence(struct snd_pcm_substream *substream,
 258                                       int channel, unsigned long pos,
 259                                       unsigned long count)
 260 {
 261         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 262
 263         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 264         return 0;
 265 }
 266
 267 /* copy callback for halfduplex mode */
 268 static int snd_rme32_playback_copy(struct snd_pcm_substream *substream,
 269                                    int channel, unsigned long pos,
 270                                    void __user *src, unsigned long count)
 271 {
 272         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 273
 274         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 275                                 src, count))
 276                 return -EFAULT;
 277         return 0;
 278 }
 279
 280 static int snd_rme32_playback_copy_kernel(struct snd_pcm_substream *substream,
 281                                           int channel, unsigned long pos,
 282                                           void *src, unsigned long count)
 283 {
 284         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 285
 286         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos, src, count);
 287         return 0;
 288 }
 289
 290 /* copy callback for halfduplex mode */
 291 static int snd_rme32_capture_copy(struct snd_pcm_substream *substream,
 292                                   int channel, unsigned long pos,
 293                                   void __user *dst, unsigned long count)
 294 {
 295         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 296
 297         if (copy_to_user_fromio(dst,
 298                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 299                             count))
 300                 return -EFAULT;
 301         return 0;
 302 }
 303
 304 static int snd_rme32_capture_copy_kernel(struct snd_pcm_substream *substream,
 305                                          int channel, unsigned long pos,
 306                                          void *dst, unsigned long count)
 307 {
 308         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 309
 310         memcpy_fromio(dst, rme32->iobase + RME32_IO_DATA_BUFFER + pos, count);
 311         return 0;
 312 }
 313
 314 /*
 315  * SPDIF I/O capabilities (half-duplex mode)
 316  */
 317 static const struct snd_pcm_hardware snd_rme32_spdif_info = {
 318         .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
 319                          SNDRV_PCM_INFO_MMAP_VALID |
 320                          SNDRV_PCM_INFO_INTERLEAVED |
 321                          SNDRV_PCM_INFO_PAUSE |
 322                          SNDRV_PCM_INFO_SYNC_START |
 323                          SNDRV_PCM_INFO_SYNC_APPLPTR),
 324         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 325                          SNDRV_PCM_FMTBIT_S32_LE),
 326         .rates =        (SNDRV_PCM_RATE_32000 |
 327                          SNDRV_PCM_RATE_44100 |
 328                          SNDRV_PCM_RATE_48000),
 329         .rate_min =     32000,
 330         .rate_max =     48000,
 331         .channels_min = 2,
 332         .channels_max = 2,
 333         .buffer_bytes_max = RME32_BUFFER_SIZE,
 334         .period_bytes_min = RME32_BLOCK_SIZE,
 335         .period_bytes_max = RME32_BLOCK_SIZE,
 336         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 337         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 338         .fifo_size =    0,
 339 };
 340
 341 /*
 342  * ADAT I/O capabilities (half-duplex mode)
 343  */
 344 static const struct snd_pcm_hardware snd_rme32_adat_info =
 345 {
 346         .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
 347                               SNDRV_PCM_INFO_MMAP_VALID |
 348                               SNDRV_PCM_INFO_INTERLEAVED |
 349                               SNDRV_PCM_INFO_PAUSE |
 350                               SNDRV_PCM_INFO_SYNC_START |
 351                               SNDRV_PCM_INFO_SYNC_APPLPTR),
 352         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 353         .rates =             (SNDRV_PCM_RATE_44100 |
 354                               SNDRV_PCM_RATE_48000),
 355         .rate_min =          44100,
 356         .rate_max =          48000,
 357         .channels_min =      8,
 358         .channels_max =      8,
 359         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 360         .period_bytes_min =  RME32_BLOCK_SIZE,
 361         .period_bytes_max =  RME32_BLOCK_SIZE,
 362         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 363         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 364         .fifo_size =        0,
 365 };
 366
 367 /*
 368  * SPDIF I/O capabilities (full-duplex mode)
 369  */
 370 static const struct snd_pcm_hardware snd_rme32_spdif_fd_info = {
 371         .info =         (SNDRV_PCM_INFO_MMAP |
 372                          SNDRV_PCM_INFO_MMAP_VALID |
 373                          SNDRV_PCM_INFO_INTERLEAVED |
 374                          SNDRV_PCM_INFO_PAUSE |
 375                          SNDRV_PCM_INFO_SYNC_START |
 376                          SNDRV_PCM_INFO_SYNC_APPLPTR),
 377         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 378                          SNDRV_PCM_FMTBIT_S32_LE),
 379         .rates =        (SNDRV_PCM_RATE_32000 |
 380                          SNDRV_PCM_RATE_44100 |
 381                          SNDRV_PCM_RATE_48000),
 382         .rate_min =     32000,
 383         .rate_max =     48000,
 384         .channels_min = 2,
 385         .channels_max = 2,
 386         .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
 387         .period_bytes_min = RME32_BLOCK_SIZE,
 388         .period_bytes_max = RME32_BLOCK_SIZE,
 389         .periods_min =  2,
 390         .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 391         .fifo_size =    0,
 392 };
 393
 394 /*
 395  * ADAT I/O capabilities (full-duplex mode)
 396  */
 397 static const struct snd_pcm_hardware snd_rme32_adat_fd_info =
 398 {
 399         .info =              (SNDRV_PCM_INFO_MMAP |
 400                               SNDRV_PCM_INFO_MMAP_VALID |
 401                               SNDRV_PCM_INFO_INTERLEAVED |
 402                               SNDRV_PCM_INFO_PAUSE |
 403                               SNDRV_PCM_INFO_SYNC_START |
 404                               SNDRV_PCM_INFO_SYNC_APPLPTR),
 405         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 406         .rates =             (SNDRV_PCM_RATE_44100 |
 407                               SNDRV_PCM_RATE_48000),
 408         .rate_min =          44100,
 409         .rate_max =          48000,
 410         .channels_min =      8,
 411         .channels_max =      8,
 412         .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
 413         .period_bytes_min =  RME32_BLOCK_SIZE,
 414         .period_bytes_max =  RME32_BLOCK_SIZE,
 415         .periods_min =      2,
 416         .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 417         .fifo_size =        0,
 418 };
 419
 420 static void snd_rme32_reset_dac(struct rme32 *rme32)
 421 {
 422         writel(rme32->wcreg | RME32_WCR_PD,
 423                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 424         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 425 }
 426
 427 static int snd_rme32_playback_getrate(struct rme32 * rme32)
 428 {
 429         int rate;
 430
 431         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 432                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 433         switch (rate) {
 434         case 1:
 435                 rate = 32000;
 436                 break;
 437         case 2:
 438                 rate = 44100;
 439                 break;
 440         case 3:
 441                 rate = 48000;
 442                 break;
 443         default:
 444                 return -1;
 445         }
 446         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 447 }
 448
 449 static int snd_rme32_capture_getrate(struct rme32 * rme32, int *is_adat)
 450 {
 451         int n;
 452
 453         *is_adat = 0;
 454         if (rme32->rcreg & RME32_RCR_LOCK) {
 455                 /* ADAT rate */
 456                 *is_adat = 1;
 457         }
 458         if (rme32->rcreg & RME32_RCR_ERF) {
 459                 return -1;
 460         }
 461
 462         /* S/PDIF rate */
 463         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 464                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 465                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 466
 467         if (RME32_PRO_WITH_8414(rme32))
 468                 switch (n) {    /* supporting the CS8414 */
 469                 case 0:
 470                 case 1:
 471                 case 2:
 472                         return -1;
 473                 case 3:
 474                         return 96000;
 475                 case 4:
 476                         return 88200;
 477                 case 5:
 478                         return 48000;
 479                 case 6:
 480                         return 44100;
 481                 case 7:
 482                         return 32000;
 483                 default:
 484                         return -1;
 485                         break;
 486                 }
 487         else
 488                 switch (n) {    /* supporting the CS8412 */
 489                 case 0:
 490                         return -1;
 491                 case 1:
 492                         return 48000;
 493                 case 2:
 494                         return 44100;
 495                 case 3:
 496                         return 32000;
 497                 case 4:
 498                         return 48000;
 499                 case 5:
 500                         return 44100;
 501                 case 6:
 502                         return 44056;
 503                 case 7:
 504                         return 32000;
 505                 default:
 506                         break;
 507                 }
 508         return -1;
 509 }
 510
 511 static int snd_rme32_playback_setrate(struct rme32 * rme32, int rate)
 512 {
 513         int ds;
 514
 515         ds = rme32->wcreg & RME32_WCR_DS_BM;
 516         switch (rate) {
 517         case 32000:
 518                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 519                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 520                         ~RME32_WCR_FREQ_1;
 521                 break;
 522         case 44100:
 523                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 524                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 525                         ~RME32_WCR_FREQ_0;
 526                 break;
 527         case 48000:
 528                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 529                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 530                         RME32_WCR_FREQ_1;
 531                 break;
 532         case 64000:
 533                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 534                         return -EINVAL;
 535                 rme32->wcreg |= RME32_WCR_DS_BM;
 536                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 537                         ~RME32_WCR_FREQ_1;
 538                 break;
 539         case 88200:
 540                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 541                         return -EINVAL;
 542                 rme32->wcreg |= RME32_WCR_DS_BM;
 543                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 544                         ~RME32_WCR_FREQ_0;
 545                 break;
 546         case 96000:
 547                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 548                         return -EINVAL;
 549                 rme32->wcreg |= RME32_WCR_DS_BM;
 550                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 551                         RME32_WCR_FREQ_1;
 552                 break;
 553         default:
 554                 return -EINVAL;
 555         }
 556         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 557             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 558         {
 559                 /* change to/from double-speed: reset the DAC (if available) */
 560                 snd_rme32_reset_dac(rme32);
 561         } else {
 562                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 563         }
 564         return 0;
 565 }
 566
 567 static int snd_rme32_setclockmode(struct rme32 * rme32, int mode)
 568 {
 569         switch (mode) {
 570         case RME32_CLOCKMODE_SLAVE:
 571                 /* AutoSync */
 572                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 573                         ~RME32_WCR_FREQ_1;
 574                 break;
 575         case RME32_CLOCKMODE_MASTER_32:
 576                 /* Internal 32.0kHz */
 577                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 578                         ~RME32_WCR_FREQ_1;
 579                 break;
 580         case RME32_CLOCKMODE_MASTER_44:
 581                 /* Internal 44.1kHz */
 582                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 583                         RME32_WCR_FREQ_1;
 584                 break;
 585         case RME32_CLOCKMODE_MASTER_48:
 586                 /* Internal 48.0kHz */
 587                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 588                         RME32_WCR_FREQ_1;
 589                 break;
 590         default:
 591                 return -EINVAL;
 592         }
 593         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 594         return 0;
 595 }
 596
 597 static int snd_rme32_getclockmode(struct rme32 * rme32)
 598 {
 599         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 600             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 601 }
 602
 603 static int snd_rme32_setinputtype(struct rme32 * rme32, int type)
 604 {
 605         switch (type) {
 606         case RME32_INPUT_OPTICAL:
 607                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 608                         ~RME32_WCR_INP_1;
 609                 break;
 610         case RME32_INPUT_COAXIAL:
 611                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 612                         ~RME32_WCR_INP_1;
 613                 break;
 614         case RME32_INPUT_INTERNAL:
 615                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 616                         RME32_WCR_INP_1;
 617                 break;
 618         case RME32_INPUT_XLR:
 619                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 620                         RME32_WCR_INP_1;
 621                 break;
 622         default:
 623                 return -EINVAL;
 624         }
 625         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 626         return 0;
 627 }
 628
 629 static int snd_rme32_getinputtype(struct rme32 * rme32)
 630 {
 631         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 632             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 633 }
 634
 635 static void
 636 snd_rme32_setframelog(struct rme32 * rme32, int n_channels, int is_playback)
 637 {
 638         int frlog;
 639
 640         if (n_channels == 2) {
 641                 frlog = 1;
 642         } else {
 643                 /* assume 8 channels */
 644                 frlog = 3;
 645         }
 646         if (is_playback) {
 647                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 648                 rme32->playback_frlog = frlog;
 649         } else {
 650                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 651                 rme32->capture_frlog = frlog;
 652         }
 653 }
 654
 655 static int snd_rme32_setformat(struct rme32 *rme32, snd_pcm_format_t format)
 656 {
 657         switch (format) {
 658         case SNDRV_PCM_FORMAT_S16_LE:
 659                 rme32->wcreg &= ~RME32_WCR_MODE24;
 660                 break;
 661         case SNDRV_PCM_FORMAT_S32_LE:
 662                 rme32->wcreg |= RME32_WCR_MODE24;
 663                 break;
 664         default:
 665                 return -EINVAL;
 666         }
 667         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 668         return 0;
 669 }
 670
 671 static int
 672 snd_rme32_playback_hw_params(struct snd_pcm_substream *substream,
 673                              struct snd_pcm_hw_params *params)
 674 {
 675         int err, rate, dummy;
 676         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 677         struct snd_pcm_runtime *runtime = substream->runtime;
 678
 679         if (rme32->fullduplex_mode) {
 680                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 681                 if (err < 0)
 682                         return err;
 683         } else {
 684                 runtime->dma_area = (void __force *)(rme32->iobase +
 685                                                      RME32_IO_DATA_BUFFER);
 686                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 687                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 688         }
 689
 690         spin_lock_irq(&rme32->lock);
 691         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 692             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 693                 /* AutoSync */
 694                 if ((int)params_rate(params) != rate) {
 695                         spin_unlock_irq(&rme32->lock);
 696                         return -EIO;
 697                 }
 698         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 699                 spin_unlock_irq(&rme32->lock);
 700                 return err;
 701         }
 702         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 703                 spin_unlock_irq(&rme32->lock);
 704                 return err;
 705         }
 706
 707         snd_rme32_setframelog(rme32, params_channels(params), 1);
 708         if (rme32->capture_periodsize != 0) {
 709                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 710                         spin_unlock_irq(&rme32->lock);
 711                         return -EBUSY;
 712                 }
 713         }
 714         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 715         /* S/PDIF setup */
 716         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 717                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 718                 rme32->wcreg |= rme32->wcreg_spdif_stream;
 719                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 720         }
 721         spin_unlock_irq(&rme32->lock);
 722
 723         return 0;
 724 }
 725
 726 static int
 727 snd_rme32_capture_hw_params(struct snd_pcm_substream *substream,
 728                             struct snd_pcm_hw_params *params)
 729 {
 730         int err, isadat, rate;
 731         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 732         struct snd_pcm_runtime *runtime = substream->runtime;
 733
 734         if (rme32->fullduplex_mode) {
 735                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 736                 if (err < 0)
 737                         return err;
 738         } else {
 739                 runtime->dma_area = (void __force *)rme32->iobase +
 740                                         RME32_IO_DATA_BUFFER;
 741                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 742                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 743         }
 744
 745         spin_lock_irq(&rme32->lock);
 746         /* enable AutoSync for record-preparing */
 747         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 748         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 749
 750         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 751                 spin_unlock_irq(&rme32->lock);
 752                 return err;
 753         }
 754         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 755                 spin_unlock_irq(&rme32->lock);
 756                 return err;
 757         }
 758         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 759                 if ((int)params_rate(params) != rate) {
 760                         spin_unlock_irq(&rme32->lock);
 761                         return -EIO;
 762                 }
 763                 if ((isadat && runtime->hw.channels_min == 2) ||
 764                     (!isadat && runtime->hw.channels_min == 8)) {
 765                         spin_unlock_irq(&rme32->lock);
 766                         return -EIO;
 767                 }
 768         }
 769         /* AutoSync off for recording */
 770         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 771         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 772
 773         snd_rme32_setframelog(rme32, params_channels(params), 0);
 774         if (rme32->playback_periodsize != 0) {
 775                 if (params_period_size(params) << rme32->capture_frlog !=
 776                     rme32->playback_periodsize) {
 777                         spin_unlock_irq(&rme32->lock);
 778                         return -EBUSY;
 779                 }
 780         }
 781         rme32->capture_periodsize =
 782             params_period_size(params) << rme32->capture_frlog;
 783         spin_unlock_irq(&rme32->lock);
 784
 785         return 0;
 786 }
 787
 788 static int snd_rme32_pcm_hw_free(struct snd_pcm_substream *substream)
 789 {
 790         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 791         if (! rme32->fullduplex_mode)
 792                 return 0;
 793         return snd_pcm_lib_free_pages(substream);
 794 }
 795
 796 static void snd_rme32_pcm_start(struct rme32 * rme32, int from_pause)
 797 {
 798         if (!from_pause) {
 799                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 800         }
 801
 802         rme32->wcreg |= RME32_WCR_START;
 803         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 804 }
 805
 806 static void snd_rme32_pcm_stop(struct rme32 * rme32, int to_pause)
 807 {
 808         /*
 809          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 810          * the hardware will not stop generating interrupts
 811          */
 812         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 813         if (rme32->rcreg & RME32_RCR_IRQ) {
 814                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 815         }
 816         rme32->wcreg &= ~RME32_WCR_START;
 817         if (rme32->wcreg & RME32_WCR_SEL)
 818                 rme32->wcreg |= RME32_WCR_MUTE;
 819         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 820         if (! to_pause)
 821                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 822 }
 823
 824 static irqreturn_t snd_rme32_interrupt(int irq, void *dev_id)
 825 {
 826         struct rme32 *rme32 = (struct rme32 *) dev_id;
 827
 828         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 829         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 830                 return IRQ_NONE;
 831         } else {
 832                 if (rme32->capture_substream) {
 833                         snd_pcm_period_elapsed(rme32->capture_substream);
 834                 }
 835                 if (rme32->playback_substream) {
 836                         snd_pcm_period_elapsed(rme32->playback_substream);
 837                 }
 838                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 839         }
 840         return IRQ_HANDLED;
 841 }
 842
 843 static const unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 844
 845 static const struct snd_pcm_hw_constraint_list hw_constraints_period_bytes = {
 846         .count = ARRAY_SIZE(period_bytes),
 847         .list = period_bytes,
 848         .mask = 0
 849 };
 850
 851 static void snd_rme32_set_buffer_constraint(struct rme32 *rme32, struct snd_pcm_runtime *runtime)
 852 {
 853         if (! rme32->fullduplex_mode) {
 854                 snd_pcm_hw_constraint_single(runtime,
 855                                              SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 856                                              RME32_BUFFER_SIZE);
 857                 snd_pcm_hw_constraint_list(runtime, 0,
 858                                            SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 859                                            &hw_constraints_period_bytes);
 860         }
 861 }
 862
 863 static int snd_rme32_playback_spdif_open(struct snd_pcm_substream *substream)
 864 {
 865         int rate, dummy;
 866         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 867         struct snd_pcm_runtime *runtime = substream->runtime;
 868
 869         snd_pcm_set_sync(substream);
 870
 871         spin_lock_irq(&rme32->lock);
 872         if (rme32->playback_substream != NULL) {
 873                 spin_unlock_irq(&rme32->lock);
 874                 return -EBUSY;
 875         }
 876         rme32->wcreg &= ~RME32_WCR_ADAT;
 877         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 878         rme32->playback_substream = substream;
 879         spin_unlock_irq(&rme32->lock);
 880
 881         if (rme32->fullduplex_mode)
 882                 runtime->hw = snd_rme32_spdif_fd_info;
 883         else
 884                 runtime->hw = snd_rme32_spdif_info;
 885         if (rme32->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO) {
 886                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 887                 runtime->hw.rate_max = 96000;
 888         }
 889         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 890             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 891                 /* AutoSync */
 892                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 893                 runtime->hw.rate_min = rate;
 894                 runtime->hw.rate_max = rate;
 895         }
 896
 897         snd_rme32_set_buffer_constraint(rme32, runtime);
 898
 899         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 900         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 901         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 902                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 903         return 0;
 904 }
 905
 906 static int snd_rme32_capture_spdif_open(struct snd_pcm_substream *substream)
 907 {
 908         int isadat, rate;
 909         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 910         struct snd_pcm_runtime *runtime = substream->runtime;
 911
 912         snd_pcm_set_sync(substream);
 913
 914         spin_lock_irq(&rme32->lock);
 915         if (rme32->capture_substream != NULL) {
 916                 spin_unlock_irq(&rme32->lock);
 917                 return -EBUSY;
 918         }
 919         rme32->capture_substream = substream;
 920         spin_unlock_irq(&rme32->lock);
 921
 922         if (rme32->fullduplex_mode)
 923                 runtime->hw = snd_rme32_spdif_fd_info;
 924         else
 925                 runtime->hw = snd_rme32_spdif_info;
 926         if (RME32_PRO_WITH_8414(rme32)) {
 927                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 928                 runtime->hw.rate_max = 96000;
 929         }
 930         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 931                 if (isadat) {
 932                         return -EIO;
 933                 }
 934                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 935                 runtime->hw.rate_min = rate;
 936                 runtime->hw.rate_max = rate;
 937         }
 938
 939         snd_rme32_set_buffer_constraint(rme32, runtime);
 940
 941         return 0;
 942 }
 943
 944 static int
 945 snd_rme32_playback_adat_open(struct snd_pcm_substream *substream)
 946 {
 947         int rate, dummy;
 948         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 949         struct snd_pcm_runtime *runtime = substream->runtime;
 950
 951         snd_pcm_set_sync(substream);
 952
 953         spin_lock_irq(&rme32->lock);
 954         if (rme32->playback_substream != NULL) {
 955                 spin_unlock_irq(&rme32->lock);
 956                 return -EBUSY;
 957         }
 958         rme32->wcreg |= RME32_WCR_ADAT;
 959         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 960         rme32->playback_substream = substream;
 961         spin_unlock_irq(&rme32->lock);
 962
 963         if (rme32->fullduplex_mode)
 964                 runtime->hw = snd_rme32_adat_fd_info;
 965         else
 966                 runtime->hw = snd_rme32_adat_info;
 967         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 968             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 969                 /* AutoSync */
 970                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 971                 runtime->hw.rate_min = rate;
 972                 runtime->hw.rate_max = rate;
 973         }
 974
 975         snd_rme32_set_buffer_constraint(rme32, runtime);
 976         return 0;
 977 }
 978
 979 static int
 980 snd_rme32_capture_adat_open(struct snd_pcm_substream *substream)
 981 {
 982         int isadat, rate;
 983         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 984         struct snd_pcm_runtime *runtime = substream->runtime;
 985
 986         if (rme32->fullduplex_mode)
 987                 runtime->hw = snd_rme32_adat_fd_info;
 988         else
 989                 runtime->hw = snd_rme32_adat_info;
 990         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 991                 if (!isadat) {
 992                         return -EIO;
 993                 }
 994                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 995                 runtime->hw.rate_min = rate;
 996                 runtime->hw.rate_max = rate;
 997         }
 998
 999         snd_pcm_set_sync(substream);
1000
1001         spin_lock_irq(&rme32->lock);
1002         if (rme32->capture_substream != NULL) {
1003                 spin_unlock_irq(&rme32->lock);
1004                 return -EBUSY;
1005         }
1006         rme32->capture_substream = substream;
1007         spin_unlock_irq(&rme32->lock);
1008
1009         snd_rme32_set_buffer_constraint(rme32, runtime);
1010         return 0;
1011 }
1012
1013 static int snd_rme32_playback_close(struct snd_pcm_substream *substream)
1014 {
1015         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1016         int spdif = 0;
1017
1018         spin_lock_irq(&rme32->lock);
1019         rme32->playback_substream = NULL;
1020         rme32->playback_periodsize = 0;
1021         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1022         spin_unlock_irq(&rme32->lock);
1023         if (spdif) {
1024                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1025                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1026                                SNDRV_CTL_EVENT_MASK_INFO,
1027                                &rme32->spdif_ctl->id);
1028         }
1029         return 0;
1030 }
1031
1032 static int snd_rme32_capture_close(struct snd_pcm_substream *substream)
1033 {
1034         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1035
1036         spin_lock_irq(&rme32->lock);
1037         rme32->capture_substream = NULL;
1038         rme32->capture_periodsize = 0;
1039         spin_unlock_irq(&rme32->lock);
1040         return 0;
1041 }
1042
1043 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream)
1044 {
1045         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1046
1047         spin_lock_irq(&rme32->lock);
1048         if (rme32->fullduplex_mode) {
1049                 memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1050                 rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1051                 rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1052         } else {
1053                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1054         }
1055         if (rme32->wcreg & RME32_WCR_SEL)
1056                 rme32->wcreg &= ~RME32_WCR_MUTE;
1057         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1058         spin_unlock_irq(&rme32->lock);
1059         return 0;
1060 }
1061
1062 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream)
1063 {
1064         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1065
1066         spin_lock_irq(&rme32->lock);
1067         if (rme32->fullduplex_mode) {
1068                 memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1069                 rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1070                 rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1071                 rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1072         } else {
1073                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1074         }
1075         spin_unlock_irq(&rme32->lock);
1076         return 0;
1077 }
1078
1079 static int
1080 snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1081 {
1082         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1083         struct snd_pcm_substream *s;
1084
1085         spin_lock(&rme32->lock);
1086         snd_pcm_group_for_each_entry(s, substream) {
1087                 if (s != rme32->playback_substream &&
1088                     s != rme32->capture_substream)
1089                         continue;
1090                 switch (cmd) {
1091                 case SNDRV_PCM_TRIGGER_START:
1092                         rme32->running |= (1 << s->stream);
1093                         if (rme32->fullduplex_mode) {
1094                                 /* remember the current DMA position */
1095                                 if (s == rme32->playback_substream) {
1096                                         rme32->playback_pcm.hw_io =
1097                                         rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1098                                 } else {
1099                                         rme32->capture_pcm.hw_io =
1100                                         rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1101                                 }
1102                         }
1103                         break;
1104                 case SNDRV_PCM_TRIGGER_STOP:
1105                         rme32->running &= ~(1 << s->stream);
1106                         break;
1107                 }
1108                 snd_pcm_trigger_done(s, substream);
1109         }
1110
1111         switch (cmd) {
1112         case SNDRV_PCM_TRIGGER_START:
1113                 if (rme32->running && ! RME32_ISWORKING(rme32))
1114                         snd_rme32_pcm_start(rme32, 0);
1115                 break;
1116         case SNDRV_PCM_TRIGGER_STOP:
1117                 if (! rme32->running && RME32_ISWORKING(rme32))
1118                         snd_rme32_pcm_stop(rme32, 0);
1119                 break;
1120         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1121                 if (rme32->running && RME32_ISWORKING(rme32))
1122                         snd_rme32_pcm_stop(rme32, 1);
1123                 break;
1124         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1125                 if (rme32->running && ! RME32_ISWORKING(rme32))
1126                         snd_rme32_pcm_start(rme32, 1);
1127                 break;
1128         }
1129         spin_unlock(&rme32->lock);
1130         return 0;
1131 }
1132
1133 /* pointer callback for halfduplex mode */
1134 static snd_pcm_uframes_t
1135 snd_rme32_playback_pointer(struct snd_pcm_substream *substream)
1136 {
1137         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1138         return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1139 }
1140
1141 static snd_pcm_uframes_t
1142 snd_rme32_capture_pointer(struct snd_pcm_substream *substream)
1143 {
1144         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1145         return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1146 }
1147
1148
1149 /* ack and pointer callbacks for fullduplex mode */
1150 static void snd_rme32_pb_trans_copy(struct snd_pcm_substream *substream,
1151                                     struct snd_pcm_indirect *rec, size_t bytes)
1152 {
1153         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1154         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1155                     substream->runtime->dma_area + rec->sw_data, bytes);
1156 }
1157
1158 static int snd_rme32_playback_fd_ack(struct snd_pcm_substream *substream)
1159 {
1160         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1161         struct snd_pcm_indirect *rec, *cprec;
1162
1163         rec = &rme32->playback_pcm;
1164         cprec = &rme32->capture_pcm;
1165         spin_lock(&rme32->lock);
1166         rec->hw_queue_size = RME32_BUFFER_SIZE;
1167         if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1168                 rec->hw_queue_size -= cprec->hw_ready;
1169         spin_unlock(&rme32->lock);
1170         return snd_pcm_indirect_playback_transfer(substream, rec,
1171                                                   snd_rme32_pb_trans_copy);
1172 }
1173
1174 static void snd_rme32_cp_trans_copy(struct snd_pcm_substream *substream,
1175                                     struct snd_pcm_indirect *rec, size_t bytes)
1176 {
1177         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1178         memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1179                       rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1180                       bytes);
1181 }
1182
1183 static int snd_rme32_capture_fd_ack(struct snd_pcm_substream *substream)
1184 {
1185         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1186         return snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1187                                                  snd_rme32_cp_trans_copy);
1188 }
1189
1190 static snd_pcm_uframes_t
1191 snd_rme32_playback_fd_pointer(struct snd_pcm_substream *substream)
1192 {
1193         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1194         return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1195                                                  snd_rme32_pcm_byteptr(rme32));
1196 }
1197
1198 static snd_pcm_uframes_t
1199 snd_rme32_capture_fd_pointer(struct snd_pcm_substream *substream)
1200 {
1201         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1202         return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1203                                                 snd_rme32_pcm_byteptr(rme32));
1204 }
1205
1206 /* for halfduplex mode */
1207 static const struct snd_pcm_ops snd_rme32_playback_spdif_ops = {
1208         .open =         snd_rme32_playback_spdif_open,
1209         .close =        snd_rme32_playback_close,
1210         .ioctl =        snd_pcm_lib_ioctl,
1211         .hw_params =    snd_rme32_playback_hw_params,
1212         .hw_free =      snd_rme32_pcm_hw_free,
1213         .prepare =      snd_rme32_playback_prepare,
1214         .trigger =      snd_rme32_pcm_trigger,
1215         .pointer =      snd_rme32_playback_pointer,
1216         .copy_user =    snd_rme32_playback_copy,
1217         .copy_kernel =  snd_rme32_playback_copy_kernel,
1218         .fill_silence = snd_rme32_playback_silence,
1219         .mmap =         snd_pcm_lib_mmap_iomem,
1220 };
1221
1222 static const struct snd_pcm_ops snd_rme32_capture_spdif_ops = {
1223         .open =         snd_rme32_capture_spdif_open,
1224         .close =        snd_rme32_capture_close,
1225         .ioctl =        snd_pcm_lib_ioctl,
1226         .hw_params =    snd_rme32_capture_hw_params,
1227         .hw_free =      snd_rme32_pcm_hw_free,
1228         .prepare =      snd_rme32_capture_prepare,
1229         .trigger =      snd_rme32_pcm_trigger,
1230         .pointer =      snd_rme32_capture_pointer,
1231         .copy_user =    snd_rme32_capture_copy,
1232         .copy_kernel =  snd_rme32_capture_copy_kernel,
1233         .mmap =         snd_pcm_lib_mmap_iomem,
1234 };
1235
1236 static const struct snd_pcm_ops snd_rme32_playback_adat_ops = {
1237         .open =         snd_rme32_playback_adat_open,
1238         .close =        snd_rme32_playback_close,
1239         .ioctl =        snd_pcm_lib_ioctl,
1240         .hw_params =    snd_rme32_playback_hw_params,
1241         .prepare =      snd_rme32_playback_prepare,
1242         .trigger =      snd_rme32_pcm_trigger,
1243         .pointer =      snd_rme32_playback_pointer,
1244         .copy_user =    snd_rme32_playback_copy,
1245         .copy_kernel =  snd_rme32_playback_copy_kernel,
1246         .fill_silence = snd_rme32_playback_silence,
1247         .mmap =         snd_pcm_lib_mmap_iomem,
1248 };
1249
1250 static const struct snd_pcm_ops snd_rme32_capture_adat_ops = {
1251         .open =         snd_rme32_capture_adat_open,
1252         .close =        snd_rme32_capture_close,
1253         .ioctl =        snd_pcm_lib_ioctl,
1254         .hw_params =    snd_rme32_capture_hw_params,
1255         .prepare =      snd_rme32_capture_prepare,
1256         .trigger =      snd_rme32_pcm_trigger,
1257         .pointer =      snd_rme32_capture_pointer,
1258         .copy_user =    snd_rme32_capture_copy,
1259         .copy_kernel =  snd_rme32_capture_copy_kernel,
1260         .mmap =         snd_pcm_lib_mmap_iomem,
1261 };
1262
1263 /* for fullduplex mode */
1264 static const struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops = {
1265         .open =         snd_rme32_playback_spdif_open,
1266         .close =        snd_rme32_playback_close,
1267         .ioctl =        snd_pcm_lib_ioctl,
1268         .hw_params =    snd_rme32_playback_hw_params,
1269         .hw_free =      snd_rme32_pcm_hw_free,
1270         .prepare =      snd_rme32_playback_prepare,
1271         .trigger =      snd_rme32_pcm_trigger,
1272         .pointer =      snd_rme32_playback_fd_pointer,
1273         .ack =          snd_rme32_playback_fd_ack,
1274 };
1275
1276 static const struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops = {
1277         .open =         snd_rme32_capture_spdif_open,
1278         .close =        snd_rme32_capture_close,
1279         .ioctl =        snd_pcm_lib_ioctl,
1280         .hw_params =    snd_rme32_capture_hw_params,
1281         .hw_free =      snd_rme32_pcm_hw_free,
1282         .prepare =      snd_rme32_capture_prepare,
1283         .trigger =      snd_rme32_pcm_trigger,
1284         .pointer =      snd_rme32_capture_fd_pointer,
1285         .ack =          snd_rme32_capture_fd_ack,
1286 };
1287
1288 static const struct snd_pcm_ops snd_rme32_playback_adat_fd_ops = {
1289         .open =         snd_rme32_playback_adat_open,
1290         .close =        snd_rme32_playback_close,
1291         .ioctl =        snd_pcm_lib_ioctl,
1292         .hw_params =    snd_rme32_playback_hw_params,
1293         .prepare =      snd_rme32_playback_prepare,
1294         .trigger =      snd_rme32_pcm_trigger,
1295         .pointer =      snd_rme32_playback_fd_pointer,
1296         .ack =          snd_rme32_playback_fd_ack,
1297 };
1298
1299 static const struct snd_pcm_ops snd_rme32_capture_adat_fd_ops = {
1300         .open =         snd_rme32_capture_adat_open,
1301         .close =        snd_rme32_capture_close,
1302         .ioctl =        snd_pcm_lib_ioctl,
1303         .hw_params =    snd_rme32_capture_hw_params,
1304         .prepare =      snd_rme32_capture_prepare,
1305         .trigger =      snd_rme32_pcm_trigger,
1306         .pointer =      snd_rme32_capture_fd_pointer,
1307         .ack =          snd_rme32_capture_fd_ack,
1308 };
1309
1310 static void snd_rme32_free(void *private_data)
1311 {
1312         struct rme32 *rme32 = (struct rme32 *) private_data;
1313
1314         if (rme32 == NULL) {
1315                 return;
1316         }
1317         if (rme32->irq >= 0) {
1318                 snd_rme32_pcm_stop(rme32, 0);
1319                 free_irq(rme32->irq, (void *) rme32);
1320                 rme32->irq = -1;
1321         }
1322         if (rme32->iobase) {
1323                 iounmap(rme32->iobase);
1324                 rme32->iobase = NULL;
1325         }
1326         if (rme32->port) {
1327                 pci_release_regions(rme32->pci);
1328                 rme32->port = 0;
1329         }
1330         pci_disable_device(rme32->pci);
1331 }
1332
1333 static void snd_rme32_free_spdif_pcm(struct snd_pcm *pcm)
1334 {
1335         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1336         rme32->spdif_pcm = NULL;
1337 }
1338
1339 static void
1340 snd_rme32_free_adat_pcm(struct snd_pcm *pcm)
1341 {
1342         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1343         rme32->adat_pcm = NULL;
1344 }
1345
1346 static int snd_rme32_create(struct rme32 *rme32)
1347 {
1348         struct pci_dev *pci = rme32->pci;
1349         int err;
1350
1351         rme32->irq = -1;
1352         spin_lock_init(&rme32->lock);
1353
1354         if ((err = pci_enable_device(pci)) < 0)
1355                 return err;
1356
1357         if ((err = pci_request_regions(pci, "RME32")) < 0)
1358                 return err;
1359         rme32->port = pci_resource_start(rme32->pci, 0);
1360
1361         rme32->iobase = ioremap_nocache(rme32->port, RME32_IO_SIZE);
1362         if (!rme32->iobase) {
1363                 dev_err(rme32->card->dev,
1364                         "unable to remap memory region 0x%lx-0x%lx\n",
1365                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1366                 return -ENOMEM;
1367         }
1368
1369         if (request_irq(pci->irq, snd_rme32_interrupt, IRQF_SHARED,
1370                         KBUILD_MODNAME, rme32)) {
1371                 dev_err(rme32->card->dev, "unable to grab IRQ %d\n", pci->irq);
1372                 return -EBUSY;
1373         }
1374         rme32->irq = pci->irq;
1375
1376         /* read the card's revision number */
1377         pci_read_config_byte(pci, 8, &rme32->rev);
1378
1379         /* set up ALSA pcm device for S/PDIF */
1380         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1381                 return err;
1382         }
1383         rme32->spdif_pcm->private_data = rme32;
1384         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1385         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1386         if (rme32->fullduplex_mode) {
1387                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1388                                 &snd_rme32_playback_spdif_fd_ops);
1389                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1390                                 &snd_rme32_capture_spdif_fd_ops);
1391                 snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1392                                                       snd_dma_continuous_data(GFP_KERNEL),
1393                                                       0, RME32_MID_BUFFER_SIZE);
1394                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1395         } else {
1396                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1397                                 &snd_rme32_playback_spdif_ops);
1398                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1399                                 &snd_rme32_capture_spdif_ops);
1400                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1401         }
1402
1403         /* set up ALSA pcm device for ADAT */
1404         if ((pci->device == PCI_DEVICE_ID_RME_DIGI32) ||
1405             (pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO)) {
1406                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1407                 rme32->adat_pcm = NULL;
1408         }
1409         else {
1410                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1411                                        1, 1, &rme32->adat_pcm)) < 0)
1412                 {
1413                         return err;
1414                 }
1415                 rme32->adat_pcm->private_data = rme32;
1416                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1417                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1418                 if (rme32->fullduplex_mode) {
1419                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1420                                         &snd_rme32_playback_adat_fd_ops);
1421                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1422                                         &snd_rme32_capture_adat_fd_ops);
1423                         snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1424                                                               snd_dma_continuous_data(GFP_KERNEL),
1425                                                               0, RME32_MID_BUFFER_SIZE);
1426                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1427                 } else {
1428                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1429                                         &snd_rme32_playback_adat_ops);
1430                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1431                                         &snd_rme32_capture_adat_ops);
1432                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1433                 }
1434         }
1435
1436
1437         rme32->playback_periodsize = 0;
1438         rme32->capture_periodsize = 0;
1439
1440         /* make sure playback/capture is stopped, if by some reason active */
1441         snd_rme32_pcm_stop(rme32, 0);
1442
1443         /* reset DAC */
1444         snd_rme32_reset_dac(rme32);
1445
1446         /* reset buffer pointer */
1447         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1448
1449         /* set default values in registers */
1450         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1451                 RME32_WCR_INP_0 | /* input select */
1452                 RME32_WCR_MUTE;  /* muting on */
1453         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1454
1455
1456         /* init switch interface */
1457         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1458                 return err;
1459         }
1460
1461         /* init proc interface */
1462         snd_rme32_proc_init(rme32);
1463
1464         rme32->capture_substream = NULL;
1465         rme32->playback_substream = NULL;
1466
1467         return 0;
1468 }
1469
1470 /*
1471  * proc interface
1472  */
1473
1474 static void
1475 snd_rme32_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer)
1476 {
1477         int n;
1478         struct rme32 *rme32 = (struct rme32 *) entry->private_data;
1479
1480         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1481
1482         snd_iprintf(buffer, rme32->card->longname);
1483         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1484
1485         snd_iprintf(buffer, "\nGeneral settings\n");
1486         if (rme32->fullduplex_mode)
1487                 snd_iprintf(buffer, "  Full-duplex mode\n");
1488         else
1489                 snd_iprintf(buffer, "  Half-duplex mode\n");
1490         if (RME32_PRO_WITH_8414(rme32)) {
1491                 snd_iprintf(buffer, "  receiver: CS8414\n");
1492         } else {
1493                 snd_iprintf(buffer, "  receiver: CS8412\n");
1494         }
1495         if (rme32->wcreg & RME32_WCR_MODE24) {
1496                 snd_iprintf(buffer, "  format: 24 bit");
1497         } else {
1498                 snd_iprintf(buffer, "  format: 16 bit");
1499         }
1500         if (rme32->wcreg & RME32_WCR_MONO) {
1501                 snd_iprintf(buffer, ", Mono\n");
1502         } else {
1503                 snd_iprintf(buffer, ", Stereo\n");
1504         }
1505
1506         snd_iprintf(buffer, "\nInput settings\n");
1507         switch (snd_rme32_getinputtype(rme32)) {
1508         case RME32_INPUT_OPTICAL:
1509                 snd_iprintf(buffer, "  input: optical");
1510                 break;
1511         case RME32_INPUT_COAXIAL:
1512                 snd_iprintf(buffer, "  input: coaxial");
1513                 break;
1514         case RME32_INPUT_INTERNAL:
1515                 snd_iprintf(buffer, "  input: internal");
1516                 break;
1517         case RME32_INPUT_XLR:
1518                 snd_iprintf(buffer, "  input: XLR");
1519                 break;
1520         }
1521         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1522                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1523         } else {
1524                 if (n) {
1525                         snd_iprintf(buffer, " (8 channels)\n");
1526                 } else {
1527                         snd_iprintf(buffer, " (2 channels)\n");
1528                 }
1529                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1530                             snd_rme32_capture_getrate(rme32, &n));
1531         }
1532
1533         snd_iprintf(buffer, "\nOutput settings\n");
1534         if (rme32->wcreg & RME32_WCR_SEL) {
1535                 snd_iprintf(buffer, "  output signal: normal playback");
1536         } else {
1537                 snd_iprintf(buffer, "  output signal: same as input");
1538         }
1539         if (rme32->wcreg & RME32_WCR_MUTE) {
1540                 snd_iprintf(buffer, " (muted)\n");
1541         } else {
1542                 snd_iprintf(buffer, "\n");
1543         }
1544
1545         /* master output frequency */
1546         if (!
1547             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1548              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1549                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1550                             snd_rme32_playback_getrate(rme32));
1551         }
1552         if (rme32->rcreg & RME32_RCR_KMODE) {
1553                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1554         } else {
1555                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1556         }
1557         if (rme32->wcreg & RME32_WCR_PRO) {
1558                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1559         } else {
1560                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1561         }
1562         if (rme32->wcreg & RME32_WCR_EMP) {
1563                 snd_iprintf(buffer, "  emphasis: on\n");
1564         } else {
1565                 snd_iprintf(buffer, "  emphasis: off\n");
1566         }
1567 }
1568
1569 static void snd_rme32_proc_init(struct rme32 *rme32)
1570 {
1571         struct snd_info_entry *entry;
1572
1573         if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1574                 snd_info_set_text_ops(entry, rme32, snd_rme32_proc_read);
1575 }
1576
1577 /*
1578  * control interface
1579  */
1580
1581 #define snd_rme32_info_loopback_control         snd_ctl_boolean_mono_info
1582
1583 static int
1584 snd_rme32_get_loopback_control(struct snd_kcontrol *kcontrol,
1585                                struct snd_ctl_elem_value *ucontrol)
1586 {
1587         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1588
1589         spin_lock_irq(&rme32->lock);
1590         ucontrol->value.integer.value[0] =
1591             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1592         spin_unlock_irq(&rme32->lock);
1593         return 0;
1594 }
1595 static int
1596 snd_rme32_put_loopback_control(struct snd_kcontrol *kcontrol,
1597                                struct snd_ctl_elem_value *ucontrol)
1598 {
1599         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1600         unsigned int val;
1601         int change;
1602
1603         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1604         spin_lock_irq(&rme32->lock);
1605         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1606         change = val != rme32->wcreg;
1607         if (ucontrol->value.integer.value[0])
1608                 val &= ~RME32_WCR_MUTE;
1609         else
1610                 val |= RME32_WCR_MUTE;
1611         rme32->wcreg = val;
1612         writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1613         spin_unlock_irq(&rme32->lock);
1614         return change;
1615 }
1616
1617 static int
1618 snd_rme32_info_inputtype_control(struct snd_kcontrol *kcontrol,
1619                                  struct snd_ctl_elem_info *uinfo)
1620 {
1621         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1622         static const char * const texts[4] = {
1623                 "Optical", "Coaxial", "Internal", "XLR"
1624         };
1625         int num_items;
1626
1627         switch (rme32->pci->device) {
1628         case PCI_DEVICE_ID_RME_DIGI32:
1629         case PCI_DEVICE_ID_RME_DIGI32_8:
1630                 num_items = 3;
1631                 break;
1632         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1633                 num_items = 4;
1634                 break;
1635         default:
1636                 snd_BUG();
1637                 return -EINVAL;
1638         }
1639         return snd_ctl_enum_info(uinfo, 1, num_items, texts);
1640 }
1641 static int
1642 snd_rme32_get_inputtype_control(struct snd_kcontrol *kcontrol,
1643                                 struct snd_ctl_elem_value *ucontrol)
1644 {
1645         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1646         unsigned int items = 3;
1647
1648         spin_lock_irq(&rme32->lock);
1649         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1650
1651         switch (rme32->pci->device) {
1652         case PCI_DEVICE_ID_RME_DIGI32:
1653         case PCI_DEVICE_ID_RME_DIGI32_8:
1654                 items = 3;
1655                 break;
1656         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1657                 items = 4;
1658                 break;
1659         default:
1660                 snd_BUG();
1661                 break;
1662         }
1663         if (ucontrol->value.enumerated.item[0] >= items) {
1664                 ucontrol->value.enumerated.item[0] = items - 1;
1665         }
1666
1667         spin_unlock_irq(&rme32->lock);
1668         return 0;
1669 }
1670 static int
1671 snd_rme32_put_inputtype_control(struct snd_kcontrol *kcontrol,
1672                                 struct snd_ctl_elem_value *ucontrol)
1673 {
1674         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1675         unsigned int val;
1676         int change, items = 3;
1677
1678         switch (rme32->pci->device) {
1679         case PCI_DEVICE_ID_RME_DIGI32:
1680         case PCI_DEVICE_ID_RME_DIGI32_8:
1681                 items = 3;
1682                 break;
1683         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1684                 items = 4;
1685                 break;
1686         default:
1687                 snd_BUG();
1688                 break;
1689         }
1690         val = ucontrol->value.enumerated.item[0] % items;
1691
1692         spin_lock_irq(&rme32->lock);
1693         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1694         snd_rme32_setinputtype(rme32, val);
1695         spin_unlock_irq(&rme32->lock);
1696         return change;
1697 }
1698
1699 static int
1700 snd_rme32_info_clockmode_control(struct snd_kcontrol *kcontrol,
1701                                  struct snd_ctl_elem_info *uinfo)
1702 {
1703         static const char * const texts[4] = { "AutoSync",
1704                                   "Internal 32.0kHz",
1705                                   "Internal 44.1kHz",
1706                                   "Internal 48.0kHz" };
1707
1708         return snd_ctl_enum_info(uinfo, 1, 4, texts);
1709 }
1710 static int
1711 snd_rme32_get_clockmode_control(struct snd_kcontrol *kcontrol,
1712                                 struct snd_ctl_elem_value *ucontrol)
1713 {
1714         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1715
1716         spin_lock_irq(&rme32->lock);
1717         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1718         spin_unlock_irq(&rme32->lock);
1719         return 0;
1720 }
1721 static int
1722 snd_rme32_put_clockmode_control(struct snd_kcontrol *kcontrol,
1723                                 struct snd_ctl_elem_value *ucontrol)
1724 {
1725         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1726         unsigned int val;
1727         int change;
1728
1729         val = ucontrol->value.enumerated.item[0] % 3;
1730         spin_lock_irq(&rme32->lock);
1731         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1732         snd_rme32_setclockmode(rme32, val);
1733         spin_unlock_irq(&rme32->lock);
1734         return change;
1735 }
1736
1737 static u32 snd_rme32_convert_from_aes(struct snd_aes_iec958 * aes)
1738 {
1739         u32 val = 0;
1740         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1741         if (val & RME32_WCR_PRO)
1742                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1743         else
1744                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1745         return val;
1746 }
1747
1748 static void snd_rme32_convert_to_aes(struct snd_aes_iec958 * aes, u32 val)
1749 {
1750         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1751         if (val & RME32_WCR_PRO)
1752                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1753         else
1754                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1755 }
1756
1757 static int snd_rme32_control_spdif_info(struct snd_kcontrol *kcontrol,
1758                                         struct snd_ctl_elem_info *uinfo)
1759 {
1760         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1761         uinfo->count = 1;
1762         return 0;
1763 }
1764
1765 static int snd_rme32_control_spdif_get(struct snd_kcontrol *kcontrol,
1766                                        struct snd_ctl_elem_value *ucontrol)
1767 {
1768         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1769
1770         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1771                                  rme32->wcreg_spdif);
1772         return 0;
1773 }
1774
1775 static int snd_rme32_control_spdif_put(struct snd_kcontrol *kcontrol,
1776                                        struct snd_ctl_elem_value *ucontrol)
1777 {
1778         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1779         int change;
1780         u32 val;
1781
1782         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1783         spin_lock_irq(&rme32->lock);
1784         change = val != rme32->wcreg_spdif;
1785         rme32->wcreg_spdif = val;
1786         spin_unlock_irq(&rme32->lock);
1787         return change;
1788 }
1789
1790 static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol *kcontrol,
1791                                                struct snd_ctl_elem_info *uinfo)
1792 {
1793         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1794         uinfo->count = 1;
1795         return 0;
1796 }
1797
1798 static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol *kcontrol,
1799                                               struct snd_ctl_elem_value *
1800                                               ucontrol)
1801 {
1802         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1803
1804         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1805                                  rme32->wcreg_spdif_stream);
1806         return 0;
1807 }
1808
1809 static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol *kcontrol,
1810                                               struct snd_ctl_elem_value *
1811                                               ucontrol)
1812 {
1813         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1814         int change;
1815         u32 val;
1816
1817         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1818         spin_lock_irq(&rme32->lock);
1819         change = val != rme32->wcreg_spdif_stream;
1820         rme32->wcreg_spdif_stream = val;
1821         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1822         rme32->wcreg |= val;
1823         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1824         spin_unlock_irq(&rme32->lock);
1825         return change;
1826 }
1827
1828 static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol *kcontrol,
1829                                              struct snd_ctl_elem_info *uinfo)
1830 {
1831         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1832         uinfo->count = 1;
1833         return 0;
1834 }
1835
1836 static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol *kcontrol,
1837                                             struct snd_ctl_elem_value *
1838                                             ucontrol)
1839 {
1840         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1841         return 0;
1842 }
1843
1844 static struct snd_kcontrol_new snd_rme32_controls[] = {
1845         {
1846                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1847                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1848                 .info = snd_rme32_control_spdif_info,
1849                 .get =  snd_rme32_control_spdif_get,
1850                 .put =  snd_rme32_control_spdif_put
1851         },
1852         {
1853                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1854                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1855                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1856                 .info = snd_rme32_control_spdif_stream_info,
1857                 .get =  snd_rme32_control_spdif_stream_get,
1858                 .put =  snd_rme32_control_spdif_stream_put
1859         },
1860         {
1861                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1862                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1863                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1864                 .info = snd_rme32_control_spdif_mask_info,
1865                 .get =  snd_rme32_control_spdif_mask_get,
1866                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1867         },
1868         {
1869                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1870                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1871                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1872                 .info = snd_rme32_control_spdif_mask_info,
1873                 .get =  snd_rme32_control_spdif_mask_get,
1874                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1875         },
1876         {
1877                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1878                 .name = "Input Connector",
1879                 .info = snd_rme32_info_inputtype_control,
1880                 .get =  snd_rme32_get_inputtype_control,
1881                 .put =  snd_rme32_put_inputtype_control
1882         },
1883         {
1884                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1885                 .name = "Loopback Input",
1886                 .info = snd_rme32_info_loopback_control,
1887                 .get =  snd_rme32_get_loopback_control,
1888                 .put =  snd_rme32_put_loopback_control
1889         },
1890         {
1891                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1892                 .name = "Sample Clock Source",
1893                 .info = snd_rme32_info_clockmode_control,
1894                 .get =  snd_rme32_get_clockmode_control,
1895                 .put =  snd_rme32_put_clockmode_control
1896         }
1897 };
1898
1899 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32)
1900 {
1901         int idx, err;
1902         struct snd_kcontrol *kctl;
1903
1904         for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1905                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1906                         return err;
1907                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1908                         rme32->spdif_ctl = kctl;
1909         }
1910
1911         return 0;
1912 }
1913
1914 /*
1915  * Card initialisation
1916  */
1917
1918 static void snd_rme32_card_free(struct snd_card *card)
1919 {
1920         snd_rme32_free(card->private_data);
1921 }
1922
1923 static int
1924 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1925 {
1926         static int dev;
1927         struct rme32 *rme32;
1928         struct snd_card *card;
1929         int err;
1930
1931         if (dev >= SNDRV_CARDS) {
1932                 return -ENODEV;
1933         }
1934         if (!enable[dev]) {
1935                 dev++;
1936                 return -ENOENT;
1937         }
1938
1939         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1940                            sizeof(struct rme32), &card);
1941         if (err < 0)
1942                 return err;
1943         card->private_free = snd_rme32_card_free;
1944         rme32 = (struct rme32 *) card->private_data;
1945         rme32->card = card;
1946         rme32->pci = pci;
1947         if (fullduplex[dev])
1948                 rme32->fullduplex_mode = 1;
1949         if ((err = snd_rme32_create(rme32)) < 0) {
1950                 snd_card_free(card);
1951                 return err;
1952         }
1953
1954         strcpy(card->driver, "Digi32");
1955         switch (rme32->pci->device) {
1956         case PCI_DEVICE_ID_RME_DIGI32:
1957                 strcpy(card->shortname, "RME Digi32");
1958                 break;
1959         case PCI_DEVICE_ID_RME_DIGI32_8:
1960                 strcpy(card->shortname, "RME Digi32/8");
1961                 break;
1962         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1963                 strcpy(card->shortname, "RME Digi32 PRO");
1964                 break;
1965         }
1966         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1967                 card->shortname, rme32->rev, rme32->port, rme32->irq);
1968
1969         if ((err = snd_card_register(card)) < 0) {
1970                 snd_card_free(card);
1971                 return err;
1972         }
1973         pci_set_drvdata(pci, card);
1974         dev++;
1975         return 0;
1976 }
1977
1978 static void snd_rme32_remove(struct pci_dev *pci)
1979 {
1980         snd_card_free(pci_get_drvdata(pci));
1981 }
1982
1983 static struct pci_driver rme32_driver = {
1984         .name =         KBUILD_MODNAME,
1985         .id_table =     snd_rme32_ids,
1986         .probe =        snd_rme32_probe,
1987         .remove =       snd_rme32_remove,
1988 };
1989
1990 module_pci_driver(rme32_driver);