3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * General observations:
29 * o The recommended test sequence is to test the data lines: if they are
30 * broken, nothing else will work properly. Then test the address
31 * lines. Finally, test the cells in the memory now that the test
32 * program knows that the address and data lines work properly.
33 * This sequence also helps isolate and identify what is faulty.
35 * o For the address line test, it is a good idea to use the base
36 * address of the lowest memory location, which causes a '1' bit to
37 * walk through a field of zeros on the address lines and the highest
38 * memory location, which causes a '0' bit to walk through a field of
39 * '1's on the address line.
41 * o Floating buses can fool memory tests if the test routine writes
42 * a value and then reads it back immediately. The problem is, the
43 * write will charge the residual capacitance on the data bus so the
44 * bus retains its state briefely. When the test program reads the
45 * value back immediately, the capacitance of the bus can allow it
46 * to read back what was written, even though the memory circuitry
47 * is broken. To avoid this, the test program should write a test
48 * pattern to the target location, write a different pattern elsewhere
49 * to charge the residual capacitance in a differnt manner, then read
50 * the target location back.
52 * o Always read the target location EXACTLY ONCE and save it in a local
53 * variable. The problem with reading the target location more than
54 * once is that the second and subsequent reads may work properly,
55 * resulting in a failed test that tells the poor technician that
56 * "Memory error at 00000000, wrote aaaaaaaa, read aaaaaaaa" which
57 * doesn't help him one bit and causes puzzled phone calls. Been there,
62 * This tests data lines for shorts and opens by forcing adjacent data
63 * to opposite states. Because the data lines could be routed in an
64 * arbitrary manner the must ensure test patterns ensure that every case
65 * is tested. By using the following series of binary patterns every
66 * combination of adjacent bits is test regardless of routing.
68 * ...101010101010101010101010
69 * ...110011001100110011001100
70 * ...111100001111000011110000
71 * ...111111110000000011111111
73 * Carrying this out, gives us six hex patterns as follows:
82 * To test for short and opens to other signals on our boards, we
83 * simply test with the 1's complemnt of the paterns as well, resulting
84 * in twelve patterns total.
86 * After writing a test pattern. a special pattern 0x0123456789ABCDEF is
87 * written to a different address in case the data lines are floating.
88 * Thus, if a byte lane fails, you will see part of the special
89 * pattern in that byte lane when the test runs. For example, if the
90 * xx__xxxxxxxxxxxx byte line fails, you will see aa23aaaaaaaaaaaa
91 * (for the 'a' test pattern).
95 * This function performs a test to verify that all the address lines
96 * hooked up to the RAM work properly. If there is an address line
97 * fault, it usually shows up as two different locations in the address
98 * map (related by the faulty address line) mapping to one physical
99 * memory storage location. The artifact that shows up is writing to
100 * the first location "changes" the second location.
102 * To test all address lines, we start with the given base address and
103 * xor the address with a '1' bit to flip one address line. For each
104 * test, we shift the '1' bit left to test the next address line.
106 * In the actual code, we start with address sizeof(ulong) since our
107 * test pattern we use is a ulong and thus, if we tried to test lower
108 * order address bits, it wouldn't work because our pattern would
111 * Example for a 4 bit address space with the base at 0000:
117 * Example for a 4 bit address space with the base at 0010:
120 * 0000 <- (below the base address, skipped)
124 * The test locations are successively tested to make sure that they are
125 * not "mirrored" onto the base address due to a faulty address line.
126 * Note that the base and each test location are related by one address
127 * line flipped. Note that the base address need not be all zeros.
131 * These tests verify RAM using sequential writes and reads
132 * to/from RAM. There are several test cases that use different patterns to
133 * verify RAM. Each test case fills a region of RAM with one pattern and
134 * then reads the region back and compares its contents with the pattern.
135 * The following patterns are used:
137 * 1a) zero pattern (0x00000000)
138 * 1b) negative pattern (0xffffffff)
139 * 1c) checkerboard pattern (0x55555555)
140 * 1d) checkerboard pattern (0xaaaaaaaa)
141 * 2) bit-flip pattern ((1 << (offset % 32))
142 * 3) address pattern (offset)
143 * 4) address pattern (~offset)
145 * Being run in normal mode, the test verifies only small 4Kb
146 * regions of RAM around each 1Mb boundary. For example, for 64Mb
147 * RAM the following areas are verified: 0x00000000-0x00000800,
148 * 0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
149 * 0x04000000. If the test is run in slow-test mode, it verifies
156 #include <watchdog.h>
158 #if CONFIG_POST & CFG_POST_MEMORY
161 * Define INJECT_*_ERRORS for testing error detection in the presence of
164 #undef INJECT_DATA_ERRORS
165 #undef INJECT_ADDRESS_ERRORS
167 #ifdef INJECT_DATA_ERRORS
168 #warning "Injecting data line errors for testing purposes"
171 #ifdef INJECT_ADDRESS_ERRORS
172 #warning "Injecting address line errors for testing purposes"
177 * This function performs a double word move from the data at
178 * the source pointer to the location at the destination pointer.
179 * This is helpful for testing memory on processors which have a 64 bit
182 * On those PowerPC with FPU, use assembly and a floating point move:
183 * this does a 64 bit move.
185 * For other processors, let the compiler generate the best code it can.
187 static void move64(unsigned long long *src, unsigned long long *dest)
189 #if defined(CONFIG_MPC8260) || defined(CONFIG_MPC824X)
190 asm ("lfd 0, 0(3)\n\t" /* fpr0 = *scr */
191 "stfd 0, 0(4)" /* *dest = fpr0 */
192 : : : "fr0" ); /* Clobbers fr0 */
200 * This is 64 bit wide test patterns. Note that they reside in ROM
201 * (which presumably works) and the tests write them to RAM which may
204 * The "otherpattern" is written to drive the data bus to values other
205 * than the test pattern. This is for detecting floating bus lines.
208 const static unsigned long long pattern[] = {
221 const unsigned long long otherpattern = 0x0123456789abcdef;
224 static int memory_post_dataline(unsigned long long * pmem)
226 unsigned long long temp64;
227 int num_patterns = sizeof(pattern)/ sizeof(pattern[0]);
229 unsigned int hi, lo, pathi, patlo;
232 for ( i = 0; i < num_patterns; i++) {
233 move64((unsigned long long *)&(pattern[i]), pmem++);
235 * Put a different pattern on the data lines: otherwise they
236 * may float long enough to read back what we wrote.
238 move64((unsigned long long *)&otherpattern, pmem--);
239 move64(pmem, &temp64);
241 #ifdef INJECT_DATA_ERRORS
242 temp64 ^= 0x00008000;
245 if (temp64 != pattern[i]){
246 pathi = (pattern[i]>>32) & 0xffffffff;
247 patlo = pattern[i] & 0xffffffff;
249 hi = (temp64>>32) & 0xffffffff;
250 lo = temp64 & 0xffffffff;
252 post_log ("Memory (date line) error at %08x, "
253 "wrote %08x%08x, read %08x%08x !\n",
254 pmem, pathi, patlo, hi, lo);
261 static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size)
269 end = (ulong *)((ulong)base + size); /* pointer arith! */
271 for(xor = sizeof(ulong); xor > 0; xor <<= 1) {
272 target = (ulong *)((ulong)testaddr ^ xor);
273 if((target >= base) && (target < end)) {
274 *testaddr = ~*target;
277 #ifdef INJECT_ADDRESS_ERRORS
278 if(xor == 0x00008000) {
279 readback = *testaddr;
282 if(readback == *testaddr) {
283 post_log ("Memory (address line) error at %08x<->%08x, "
284 "XOR value %08x !\n",
285 testaddr, target, xor);
293 static int memory_post_test1 (unsigned long start,
298 ulong *mem = (ulong *) start;
302 for (i = 0; i < size / sizeof (ulong); i++) {
308 for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
310 if (readback != val) {
311 post_log ("Memory error at %08x, "
312 "wrote %08x, read %08x !\n",
313 mem + i, val, readback);
325 static int memory_post_test2 (unsigned long start, unsigned long size)
328 ulong *mem = (ulong *) start;
332 for (i = 0; i < size / sizeof (ulong); i++) {
333 mem[i] = 1 << (i % 32);
338 for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
340 if (readback != (1 << (i % 32))) {
341 post_log ("Memory error at %08x, "
342 "wrote %08x, read %08x !\n",
343 mem + i, 1 << (i % 32), readback);
355 static int memory_post_test3 (unsigned long start, unsigned long size)
358 ulong *mem = (ulong *) start;
362 for (i = 0; i < size / sizeof (ulong); i++) {
368 for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
371 post_log ("Memory error at %08x, "
372 "wrote %08x, read %08x !\n",
373 mem + i, i, readback);
385 static int memory_post_test4 (unsigned long start, unsigned long size)
388 ulong *mem = (ulong *) start;
392 for (i = 0; i < size / sizeof (ulong); i++) {
398 for (i = 0; i < size / sizeof (ulong) && ret == 0; i++) {
400 if (readback != ~i) {
401 post_log ("Memory error at %08x, "
402 "wrote %08x, read %08x !\n",
403 mem + i, ~i, readback);
415 static int memory_post_tests (unsigned long start, unsigned long size)
420 ret = memory_post_dataline ((long long *)start);
423 ret = memory_post_addrline ((long *)start, (long *)start, size);
426 ret = memory_post_addrline ((long *)(start + size - 8),
427 (long *)start, size);
430 ret = memory_post_test1 (start, size, 0x00000000);
433 ret = memory_post_test1 (start, size, 0xffffffff);
436 ret = memory_post_test1 (start, size, 0x55555555);
439 ret = memory_post_test1 (start, size, 0xaaaaaaaa);
442 ret = memory_post_test2 (start, size);
445 ret = memory_post_test3 (start, size);
448 ret = memory_post_test4 (start, size);
454 int memory_post_test (int flags)
457 DECLARE_GLOBAL_DATA_PTR;
459 unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
460 256 << 20 : bd->bi_memsize) - (1 << 20);
463 if (flags & POST_SLOWTEST) {
464 ret = memory_post_tests (CFG_SDRAM_BASE, memsize);
465 } else { /* POST_NORMAL */
469 for (i = 0; i < (memsize >> 20) && ret == 0; i++) {
471 ret = memory_post_tests (i << 20, 0x800);
473 ret = memory_post_tests ((i << 20) + 0xff800, 0x800);
480 #endif /* CONFIG_POST & CFG_POST_MEMORY */
481 #endif /* CONFIG_POST */