3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * Binary instructions instr rA,rS
14 * Logic instructions: cntlzw
15 * Arithmetic instructions: extsb, extsh
17 * The test contains a pre-built table of instructions, operands and
18 * expected results. For each table entry, the test will cyclically use
19 * different sets of operand registers and result registers.
25 #if CONFIG_POST & CONFIG_SYS_POST_CPU
27 extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
28 extern ulong cpu_post_makecr (long v);
30 static struct cpu_post_twox_s
35 } cpu_post_twox_table[] =
68 static unsigned int cpu_post_twox_size = ARRAY_SIZE(cpu_post_twox_table);
70 int cpu_post_test_twox (void)
74 int flag = disable_interrupts();
76 for (i = 0; i < cpu_post_twox_size && ret == 0; i++)
78 struct cpu_post_twox_s *test = cpu_post_twox_table + i;
80 for (reg = 0; reg < 32 && ret == 0; reg++)
82 unsigned int reg0 = (reg + 0) % 32;
83 unsigned int reg1 = (reg + 1) % 32;
84 unsigned int stk = reg < 16 ? 31 : 15;
85 unsigned long code[] =
88 ASM_ADDI(stk, 1, -16),
90 ASM_STW(reg0, stk, 4),
91 ASM_STW(reg1, stk, 0),
92 ASM_LWZ(reg0, stk, 8),
93 ASM_11X(test->cmd, reg1, reg0),
94 ASM_STW(reg1, stk, 8),
95 ASM_LWZ(reg1, stk, 0),
96 ASM_LWZ(reg0, stk, 4),
102 unsigned long codecr[] =
105 ASM_ADDI(stk, 1, -16),
107 ASM_STW(reg0, stk, 4),
108 ASM_STW(reg1, stk, 0),
109 ASM_LWZ(reg0, stk, 8),
110 ASM_11X(test->cmd, reg1, reg0) | BIT_C,
111 ASM_STW(reg1, stk, 8),
112 ASM_LWZ(reg1, stk, 0),
113 ASM_LWZ(reg0, stk, 4),
115 ASM_ADDI(1, stk, 16),
125 cpu_post_exec_21 (code, & cr, & res, test->op);
127 ret = res == test->res && cr == 0 ? 0 : -1;
131 post_log ("Error at twox test %d !\n", i);
137 cpu_post_exec_21 (codecr, & cr, & res, test->op);
139 ret = res == test->res &&
140 (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
144 post_log ("Error at twox test %d !\n", i);