1 // SPDX-License-Identifier: GPL-2.0+
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
11 * Ternary instructions instr rD,rA,rB
13 * Arithmetic instructions: add, addc, adde, subf, subfc, subfe,
14 * mullw, mulhw, mulhwu, divw, divwu
16 * The test contains a pre-built table of instructions, operands and
17 * expected results. For each table entry, the test will cyclically use
18 * different sets of operand registers and result registers.
24 #if CONFIG_POST & CONFIG_SYS_POST_CPU
26 extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
28 extern ulong cpu_post_makecr (long v);
30 static struct cpu_post_three_s
36 } cpu_post_three_table[] =
141 static unsigned int cpu_post_three_size = ARRAY_SIZE(cpu_post_three_table);
143 int cpu_post_test_three (void)
147 int flag = disable_interrupts();
149 for (i = 0; i < cpu_post_three_size && ret == 0; i++)
151 struct cpu_post_three_s *test = cpu_post_three_table + i;
153 for (reg = 0; reg < 32 && ret == 0; reg++)
155 unsigned int reg0 = (reg + 0) % 32;
156 unsigned int reg1 = (reg + 1) % 32;
157 unsigned int reg2 = (reg + 2) % 32;
158 unsigned int stk = reg < 16 ? 31 : 15;
159 unsigned long code[] =
162 ASM_ADDI(stk, 1, -24),
165 ASM_STW(reg0, stk, 8),
166 ASM_STW(reg1, stk, 4),
167 ASM_STW(reg2, stk, 0),
168 ASM_LWZ(reg1, stk, 12),
169 ASM_LWZ(reg0, stk, 16),
170 ASM_12(test->cmd, reg2, reg1, reg0),
171 ASM_STW(reg2, stk, 12),
172 ASM_LWZ(reg2, stk, 0),
173 ASM_LWZ(reg1, stk, 4),
174 ASM_LWZ(reg0, stk, 8),
176 ASM_ADDI(1, stk, 24),
180 unsigned long codecr[] =
183 ASM_ADDI(stk, 1, -24),
186 ASM_STW(reg0, stk, 8),
187 ASM_STW(reg1, stk, 4),
188 ASM_STW(reg2, stk, 0),
189 ASM_LWZ(reg1, stk, 12),
190 ASM_LWZ(reg0, stk, 16),
191 ASM_12(test->cmd, reg2, reg1, reg0) | BIT_C,
192 ASM_STW(reg2, stk, 12),
193 ASM_LWZ(reg2, stk, 0),
194 ASM_LWZ(reg1, stk, 4),
195 ASM_LWZ(reg0, stk, 8),
197 ASM_ADDI(1, stk, 24),
207 cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2);
209 ret = res == test->res && cr == 0 ? 0 : -1;
213 post_log ("Error at three test %d !\n", i);
219 cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2);
221 ret = res == test->res &&
222 (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
226 post_log ("Error at three test %d !\n", i);