package/mac80211/patches/468-ath5k_remove_ts_retry.patch

   1 --- a/drivers/net/wireless/ath/ath5k/ath5k.h
   2 +++ b/drivers/net/wireless/ath/ath5k/ath5k.h
   3 @@ -452,11 +452,10 @@ struct ath5k_tx_status {
   4         u16     ts_seqnum;
   5         u16     ts_tstamp;
   6         u8      ts_status;
   7 -       u8      ts_retry[4];
   8         u8      ts_final_idx;
   9 +       u8      ts_final_retry;
  10         s8      ts_rssi;
  11         u8      ts_shortretry;
  12 -       u8      ts_longretry;
  13         u8      ts_virtcol;
  14         u8      ts_antenna;
  15  };
  16 --- a/drivers/net/wireless/ath/ath5k/base.c
  17 +++ b/drivers/net/wireless/ath/ath5k/base.c
  18 @@ -1573,20 +1573,27 @@ ath5k_tx_frame_completed(struct ath5k_so
  19                          struct ath5k_txq *txq, struct ath5k_tx_status *ts)
  20  {
  21         struct ieee80211_tx_info *info;
  22 +       u8 tries[3];
  23         int i;
  24
  25         sc->stats.tx_all_count++;
  26         sc->stats.tx_bytes_count += skb->len;
  27         info = IEEE80211_SKB_CB(skb);
  28
  29 +       tries[0] = info->status.rates[0].count;
  30 +       tries[1] = info->status.rates[1].count;
  31 +       tries[2] = info->status.rates[2].count;
  32 +
  33         ieee80211_tx_info_clear_status(info);
  34 -       for (i = 0; i <= ts->ts_final_idx; i++) {
  35 +
  36 +       for (i = 0; i < ts->ts_final_idx; i++) {
  37                 struct ieee80211_tx_rate *r =
  38                         &info->status.rates[i];
  39
  40 -               r->count = ts->ts_retry[i];
  41 +               r->count = tries[i];
  42         }
  43
  44 +       info->status.rates[ts->ts_final_idx].count = ts->ts_final_retry;
  45         info->status.rates[ts->ts_final_idx + 1].idx = -1;
  46
  47         if (unlikely(ts->ts_status)) {
  48 --- a/drivers/net/wireless/ath/ath5k/desc.c
  49 +++ b/drivers/net/wireless/ath/ath5k/desc.c
  50 @@ -366,7 +366,7 @@ static int ath5k_hw_proc_2word_tx_status
  51                 AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP);
  52         ts->ts_shortretry = AR5K_REG_MS(tx_status->tx_status_0,
  53                 AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT);
  54 -       ts->ts_longretry = AR5K_REG_MS(tx_status->tx_status_0,
  55 +       ts->ts_final_retry = AR5K_REG_MS(tx_status->tx_status_0,
  56                 AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT);
  57         /*TODO: ts->ts_virtcol + test*/
  58         ts->ts_seqnum = AR5K_REG_MS(tx_status->tx_status_1,
  59 @@ -375,7 +375,6 @@ static int ath5k_hw_proc_2word_tx_status
  60                 AR5K_DESC_TX_STATUS1_ACK_SIG_STRENGTH);
  61         ts->ts_antenna = 1;
  62         ts->ts_status = 0;
  63 -       ts->ts_retry[0] = ts->ts_longretry;
  64         ts->ts_final_idx = 0;
  65
  66         if (!(tx_status->tx_status_0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
  67 @@ -401,7 +400,7 @@ static int ath5k_hw_proc_4word_tx_status
  68  {
  69         struct ath5k_hw_4w_tx_ctl *tx_ctl;
  70         struct ath5k_hw_tx_status *tx_status;
  71 -       u32 txstat0, txstat1, txctl2;
  72 +       u32 txstat0, txstat1;
  73
  74         tx_ctl = &desc->ud.ds_tx5212.tx_ctl;
  75         tx_status = &desc->ud.ds_tx5212.tx_stat;
  76 @@ -413,7 +412,6 @@ static int ath5k_hw_proc_4word_tx_status
  77                 return -EINPROGRESS;
  78
  79         txstat0 = ACCESS_ONCE(tx_status->tx_status_0);
  80 -       txctl2 = ACCESS_ONCE(tx_ctl->tx_control_2);
  81
  82         /*
  83          * Get descriptor status
  84 @@ -422,7 +420,7 @@ static int ath5k_hw_proc_4word_tx_status
  85                 AR5K_DESC_TX_STATUS0_SEND_TIMESTAMP);
  86         ts->ts_shortretry = AR5K_REG_MS(txstat0,
  87                 AR5K_DESC_TX_STATUS0_SHORT_RETRY_COUNT);
  88 -       ts->ts_longretry = AR5K_REG_MS(txstat0,
  89 +       ts->ts_final_retry = AR5K_REG_MS(txstat0,
  90                 AR5K_DESC_TX_STATUS0_LONG_RETRY_COUNT);
  91         ts->ts_seqnum = AR5K_REG_MS(txstat1,
  92                 AR5K_DESC_TX_STATUS1_SEQ_NUM);
  93 @@ -435,32 +433,6 @@ static int ath5k_hw_proc_4word_tx_status
  94         ts->ts_final_idx = AR5K_REG_MS(txstat1,
  95                         AR5K_DESC_TX_STATUS1_FINAL_TS_IX_5212);
  96
  97 -       /* The longretry counter has the number of un-acked retries
  98 -        * for the final rate. To get the total number of retries
  99 -        * we have to add the retry counters for the other rates
 100 -        * as well
 101 -        */
 102 -       ts->ts_retry[ts->ts_final_idx] = ts->ts_longretry;
 103 -       switch (ts->ts_final_idx) {
 104 -       case 3:
 105 -               ts->ts_retry[2] = AR5K_REG_MS(txctl2,
 106 -                       AR5K_4W_TX_DESC_CTL2_XMIT_TRIES2);
 107 -               ts->ts_longretry += ts->ts_retry[2];
 108 -               /* fall through */
 109 -       case 2:
 110 -               ts->ts_retry[1] = AR5K_REG_MS(txctl2,
 111 -                       AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
 112 -               ts->ts_longretry += ts->ts_retry[1];
 113 -               /* fall through */
 114 -       case 1:
 115 -               ts->ts_retry[0] = AR5K_REG_MS(txctl2,
 116 -                       AR5K_4W_TX_DESC_CTL2_XMIT_TRIES1);
 117 -               ts->ts_longretry += ts->ts_retry[0];
 118 -               /* fall through */
 119 -       case 0:
 120 -               break;
 121 -       }
 122 -
 123         /* TX error */
 124         if (!(txstat0 & AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK)) {
 125                 if (txstat0 & AR5K_DESC_TX_STATUS0_EXCESSIVE_RETRIES)