Rebased from upstream / out of band repository.
[librecmc/librecmc.git] / package / kernel / mac80211 / patches / rt2x00 / 983-rt2x00-add-r-calibration.patch
1 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
2 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
3 @@ -8388,6 +8388,160 @@ void rt2800_rf_self_txdc_cal(struct rt2x
4  }
5  EXPORT_SYMBOL_GPL(rt2800_rf_self_txdc_cal);
6  
7 +int rt2800_calcrcalibrationcode(struct rt2x00_dev *rt2x00dev, int d1, int d2)
8 +{
9 +       int calcode;
10 +       calcode = ((d2 - d1) * 1000) / 43;
11 +       if ((calcode%10) >= 5)
12 +               calcode += 10;
13 +       calcode = (calcode / 10);
14 +
15 +       return calcode;
16 +}
17 +EXPORT_SYMBOL_GPL(rt2800_calcrcalibrationcode);
18 +
19 +void rt2800_r_calibration(struct rt2x00_dev *rt2x00dev)
20 +{
21 +       u32 savemacsysctrl;
22 +       u8 saverfb0r1, saverfb0r34, saverfb0r35;
23 +       u8 saverfb5r4, saverfb5r17, saverfb5r18;
24 +       u8 saverfb5r19, saverfb5r20;
25 +       u8 savebbpr22, savebbpr47, savebbpr49;
26 +       u8 bytevalue = 0;
27 +       int rcalcode;
28 +       u8 r_cal_code = 0;
29 +       char d1 = 0, d2 = 0;
30 +       u8 rfvalue;
31 +       u32 MAC_RF_BYPASS0, MAC_RF_CONTROL0, MAC_PWR_PIN_CFG;
32 +
33 +       saverfb0r1 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 1);
34 +       saverfb0r34 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 34);
35 +       saverfb0r35 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 35);
36 +       saverfb5r4 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 4);
37 +       saverfb5r17 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 17);
38 +       saverfb5r18 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 18);
39 +       saverfb5r19 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 19);
40 +       saverfb5r20 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 20);
41 +
42 +       savebbpr22 = rt2800_bbp_read(rt2x00dev, 22);
43 +       savebbpr47 = rt2800_bbp_read(rt2x00dev, 47);
44 +       savebbpr49 = rt2800_bbp_read(rt2x00dev, 49);
45 +
46 +       savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
47 +       MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
48 +       MAC_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
49 +       MAC_PWR_PIN_CFG = rt2800_register_read(rt2x00dev, PWR_PIN_CFG);
50 +
51 +       {
52 +       u32 maccfg, macstatus;
53 +       int i;
54 +
55 +       maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
56 +       maccfg &= (~0x04);
57 +       rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
58 +
59 +       for (i = 0; i < 10000; i++) {
60 +               macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
61 +               if (macstatus & 0x1)
62 +                       udelay(50);
63 +               else
64 +                       break;
65 +               }
66 +
67 +       if (i == 10000)
68 +               rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
69 +
70 +       maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
71 +       maccfg &= (~0x04);
72 +       rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
73 +
74 +       for (i = 0; i < 10000; i++) {
75 +               macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
76 +               if (macstatus & 0x2)
77 +                       udelay(50);
78 +               else
79 +                       break;
80 +               }
81 +
82 +       if (i == 10000)
83 +               rt2x00_warn(rt2x00dev, "Wait MAC Rx Status to MAX !!!\n");
84 +       }
85 +
86 +       rfvalue = (MAC_RF_BYPASS0 | 0x3004);
87 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, rfvalue);
88 +       rfvalue = (MAC_RF_CONTROL0 | (~0x3002));
89 +       rt2800_register_write(rt2x00dev, RF_CONTROL0, rfvalue);
90 +
91 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, 0x27);
92 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, 0x80);
93 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0x83);
94 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x00);
95 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x20);
96 +
97 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x00);
98 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, 0x13);
99 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
100 +
101 +       rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x1);
102 +
103 +       rt2800_bbp_write(rt2x00dev, 47, 0x04);
104 +       rt2800_bbp_write(rt2x00dev, 22, 0x80);
105 +       udelay(100);
106 +       bytevalue = rt2800_bbp_read(rt2x00dev, 49);
107 +       if (bytevalue > 128)
108 +               d1 = bytevalue - 256;
109 +       else
110 +               d1 = (char)bytevalue;
111 +       rt2800_bbp_write(rt2x00dev, 22, 0x0);
112 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x01);
113 +
114 +       rt2800_bbp_write(rt2x00dev, 22, 0x80);
115 +       udelay(100);
116 +       bytevalue = rt2800_bbp_read(rt2x00dev, 49);
117 +       if (bytevalue > 128)
118 +               d2 = bytevalue - 256;
119 +       else
120 +               d2 = (char)bytevalue;
121 +       rt2800_bbp_write(rt2x00dev, 22, 0x0);
122 +
123 +       rcalcode = rt2800_calcrcalibrationcode(rt2x00dev, d1, d2);
124 +       if (rcalcode < 0)
125 +               r_cal_code = 256 + rcalcode;
126 +       else
127 +               r_cal_code = (u8)rcalcode;
128 +
129 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 7, r_cal_code);
130 +
131 +       rt2800_bbp_write(rt2x00dev, 22, 0x0);
132 +
133 +       bytevalue = rt2800_bbp_read(rt2x00dev, 21);
134 +       bytevalue |= 0x1;
135 +       rt2800_bbp_write(rt2x00dev, 21, bytevalue);
136 +       bytevalue = rt2800_bbp_read(rt2x00dev, 21);
137 +       bytevalue &= (~0x1);
138 +       rt2800_bbp_write(rt2x00dev, 21, bytevalue);
139 +
140 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, saverfb0r1);
141 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, saverfb0r34);
142 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, saverfb0r35);
143 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
144 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
145 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
146 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
147 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
148 +
149 +       rt2800_bbp_write(rt2x00dev, 22, savebbpr22);
150 +       rt2800_bbp_write(rt2x00dev, 47, savebbpr47);
151 +       rt2800_bbp_write(rt2x00dev, 49, savebbpr49);
152 +
153 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
154 +       rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0);
155 +
156 +       rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl);
157 +       rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG);
158 +}
159 +EXPORT_SYMBOL_GPL(rt2800_r_calibration);
160 +
161  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
162                                        bool set_bw, bool is_ht40)
163  {
164 @@ -9013,6 +9167,7 @@ static void rt2800_init_rfcsr_6352(struc
165         rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
166         rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
167  
168 +       rt2800_r_calibration(rt2x00dev);
169         rt2800_rf_self_txdc_cal(rt2x00dev);
170         rt2800_bw_filter_calibration(rt2x00dev, true);
171         rt2800_bw_filter_calibration(rt2x00dev, false);
172 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
173 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
174 @@ -243,6 +243,8 @@ void rt2800_link_tuner(struct rt2x00_dev
175  void rt2800_gain_calibration(struct rt2x00_dev *rt2x00dev);
176  void rt2800_vco_calibration(struct rt2x00_dev *rt2x00dev);
177  void rt2800_rf_self_txdc_cal(struct rt2x00_dev *rt2x00dev);
178 +int rt2800_calcrcalibrationcode(struct rt2x00_dev *rt2x00dev, int d1, int d2);
179 +void rt2800_r_calibration(struct rt2x00_dev *rt2x00dev);
180  
181  int rt2800_enable_radio(struct rt2x00_dev *rt2x00dev);
182  void rt2800_disable_radio(struct rt2x00_dev *rt2x00dev);
183 --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
184 +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
185 @@ -573,6 +573,8 @@ struct rt2x00lib_ops {
186         void (*gain_calibration) (struct rt2x00_dev *rt2x00dev);
187         void (*vco_calibration) (struct rt2x00_dev *rt2x00dev);
188         void (*rf_self_txdc_cal) (struct rt2x00_dev *rt2x00dev);
189 +       int (*calcrcalibrationcode) (struct rt2x00_dev *rt2x00dev, int d1, int d2);
190 +       void (*r_calibration) (struct rt2x00_dev *rt2x00dev);
191  
192         /*
193          * Data queue handlers.