package/kernel/mac80211/patches/653-0005-rtl8xxxu-First-stab-at-rtl8188e_power_on.patch

   1 From a7c3d46915bce6d84e61e684e76564b034bdc1a9 Mon Sep 17 00:00:00 2001
   2 From: Jes Sorensen <Jes.Sorensen@redhat.com>
   3 Date: Mon, 27 Jun 2016 17:08:30 -0400
   4 Subject: [PATCH] rtl8xxxu: First stab at rtl8188e_power_on()
   5
   6 Code based on code from Andrea Merello.
   7
   8 Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
   9 ---
  10  .../net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 82 ++++++++++++++++++++++
  11  1 file changed, 82 insertions(+)
  12
  13 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
  14 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
  15 @@ -92,8 +92,90 @@ static int rtl8188eu_load_firmware(struc
  16         return ret;
  17  }
  18
  19 +static int rtl8188e_emu_to_active(struct rtl8xxxu_priv *priv)
  20 +{
  21 +       u8 val8;
  22 +       u32 val32;
  23 +       u16 val16;
  24 +       int count, ret = 0;
  25 +
  26 +       /* wait till 0x04[17] = 1 power ready*/
  27 +       for (count = RTL8XXXU_MAX_REG_POLL; count; count--) {
  28 +               val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
  29 +               if (val32 & BIT(17))
  30 +                       break;
  31 +
  32 +               udelay(10);
  33 +       }
  34 +
  35 +       if (!count) {
  36 +               ret = -EBUSY;
  37 +               goto exit;
  38 +       }
  39 +
  40 +       /* reset baseband */
  41 +       val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC);
  42 +       val8 &= ~(SYS_FUNC_BBRSTB | SYS_FUNC_BB_GLB_RSTN);
  43 +       rtl8xxxu_write8(priv, REG_SYS_FUNC, val8);
  44 +
  45 +       /*0x24[23] = 2b'01 schmit trigger */
  46 +       val32 = rtl8xxxu_read32(priv, REG_AFE_XTAL_CTRL);
  47 +       val32 |= BIT(23);
  48 +       rtl8xxxu_write32(priv, REG_AFE_XTAL_CTRL, val32);
  49 +
  50 +       /* 0x04[15] = 0 disable HWPDN (control by DRV)*/
  51 +       val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
  52 +       val16 &= ~APS_FSMCO_HW_POWERDOWN;
  53 +       rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
  54 +
  55 +       /*0x04[12:11] = 2b'00 disable WL suspend*/
  56 +       val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO);
  57 +       val16 &= ~(APS_FSMCO_HW_SUSPEND | APS_FSMCO_PCIE);
  58 +       rtl8xxxu_write16(priv, REG_APS_FSMCO, val16);
  59 +
  60 +       /* set, then poll until 0 */
  61 +       val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
  62 +       val32 |= APS_FSMCO_MAC_ENABLE;
  63 +       rtl8xxxu_write32(priv, REG_APS_FSMCO, val32);
  64 +
  65 +       for (count = RTL8XXXU_MAX_REG_POLL; count; count--) {
  66 +               val32 = rtl8xxxu_read32(priv, REG_APS_FSMCO);
  67 +               if ((val32 & APS_FSMCO_MAC_ENABLE) == 0) {
  68 +                       ret = 0;
  69 +                       break;
  70 +               }
  71 +               udelay(10);
  72 +       }
  73 +
  74 +       if (!count) {
  75 +               ret = -EBUSY;
  76 +               goto exit;
  77 +       }
  78 +
  79 +       /* LDO normal mode*/
  80 +       val8 = rtl8xxxu_read8(priv, REG_LPLDO_CTRL);
  81 +       val8 &= ~BIT(4);
  82 +       rtl8xxxu_write8(priv, REG_LPLDO_CTRL, val8);
  83 +
  84 +exit:
  85 +       return ret;
  86 +}
  87 +
  88 +static int rtl8188eu_power_on(struct rtl8xxxu_priv *priv)
  89 +{
  90 +       int ret;
  91 +
  92 +       ret = rtl8188e_emu_to_active(priv);
  93 +       if (ret)
  94 +               goto exit;
  95 +
  96 +exit:
  97 +       return ret;
  98 +}
  99 +
 100  struct rtl8xxxu_fileops rtl8188eu_fops = {
 101         .parse_efuse = rtl8188eu_parse_efuse,
 102         .load_firmware = rtl8188eu_load_firmware,
 103 +       .power_on = rtl8188eu_power_on,
 104         .reset_8051 = rtl8xxxu_reset_8051,
 105  };