mt76: update to the latest version
[oweals/openwrt.git] / package / kernel / mac80211 / patches / 650-rt2x00-add-support-for-external-PA-on-MT7620.patch
1 From 9782a7f7488443568fa4d6088b73c9aff7eb8510 Mon Sep 17 00:00:00 2001
2 From: Daniel Golle <daniel@makrotopia.org>
3 Date: Wed, 19 Apr 2017 16:14:53 +0200
4 Subject: [PATCH] rt2x00: add support for external PA on MT7620
5 To: Stanislaw Gruszka <sgruszka@redhat.com>
6 Cc: Helmut Schaa <helmut.schaa@googlemail.com>,
7     linux-wireless@vger.kernel.org,
8     Kalle Valo <kvalo@codeaurora.org>
9
10 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
11 ---
12  drivers/net/wireless/ralink/rt2x00/rt2800.h    |  1 +
13  drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 70 +++++++++++++++++++++++++-
14  2 files changed, 70 insertions(+), 1 deletion(-)
15
16 --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
17 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
18 @@ -2749,6 +2749,7 @@ enum rt2800_eeprom_word {
19  #define EEPROM_NIC_CONF2_RX_STREAM     FIELD16(0x000f)
20  #define EEPROM_NIC_CONF2_TX_STREAM     FIELD16(0x00f0)
21  #define EEPROM_NIC_CONF2_CRYSTAL       FIELD16(0x0600)
22 +#define EEPROM_NIC_CONF2_EXTERNAL_PA   FIELD16(0xc000)
23  
24  /*
25   * EEPROM LNA
26 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
27 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
28 @@ -4120,6 +4120,61 @@ static void rt2800_config_channel(struct
29                 rt2800_iq_calibrate(rt2x00dev, rf->channel);
30         }
31  
32 +       if (rt2x00_rt(rt2x00dev, RT6352)) {
33 +               if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
34 +                            &rt2x00dev->cap_flags)) {
35 +                       rt2x00_warn(rt2x00dev, "Using incomplete support for " \
36 +                                              "external PA\n");
37 +                       reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
38 +                       reg |= 0x00000101;
39 +                       rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
40 +
41 +                       reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
42 +                       reg |= 0x00000101;
43 +                       rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
44 +
45 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 43, 0x73);
46 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 43, 0x73);
47 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 44, 0x73);
48 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 44, 0x73);
49 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 45, 0x73);
50 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0x73);
51 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 46, 0x27);
52 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 46, 0x27);
53 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0xC8);
54 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0xC8);
55 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 48, 0xA4);
56 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 48, 0xA4);
57 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 49, 0x05);
58 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 49, 0x05);
59 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
60 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x27);
61 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 55, 0xC8);
62 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 55, 0xC8);
63 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 56, 0xA4);
64 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 56, 0xA4);
65 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 57, 0x05);
66 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 57, 0x05);
67 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 58, 0x27);
68 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 58, 0x27);
69 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 59, 0xC8);
70 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 59, 0xC8);
71 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 60, 0xA4);
72 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 60, 0xA4);
73 +                       rt2800_rfcsr_write_bank(rt2x00dev, 4, 61, 0x05);
74 +                       rt2800_rfcsr_write_bank(rt2x00dev, 6, 61, 0x05);
75 +                       rt2800_rfcsr_write_bank(rt2x00dev, 5, 05, 0x00);
76 +                       rt2800_rfcsr_write_bank(rt2x00dev, 7, 05, 0x00);
77 +
78 +                       rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
79 +                                             0x36303636);
80 +                       rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
81 +                                             0x6C6C6B6C);
82 +                       rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
83 +                                             0x6C6C6B6C);
84 +               }
85 +       }
86 +
87         bbp = rt2800_bbp_read(rt2x00dev, 4);
88         rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
89         rt2800_bbp_write(rt2x00dev, 4, bbp);
90 @@ -9314,7 +9369,8 @@ static int rt2800_init_eeprom(struct rt2
91          */
92         eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
93  
94 -       if (rt2x00_rt(rt2x00dev, RT3352)) {
95 +       if (rt2x00_rt(rt2x00dev, RT3352) ||
96 +           rt2x00_rt(rt2x00dev, RT6352)) {
97                 if (rt2x00_get_field16(eeprom,
98                     EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
99                     __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
100 @@ -9325,6 +9381,18 @@ static int rt2800_init_eeprom(struct rt2
101                               &rt2x00dev->cap_flags);
102         }
103  
104 +       eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
105 +
106 +       if (rt2x00_rt(rt2x00dev, RT6352) && eeprom != 0 && eeprom != 0xffff) {
107 +               if (rt2x00_get_field16(eeprom,
108 +                   EEPROM_NIC_CONF2_EXTERNAL_PA)) {
109 +                   __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
110 +                             &rt2x00dev->cap_flags);
111 +                   __set_bit(CAPABILITY_EXTERNAL_PA_TX1,
112 +                             &rt2x00dev->cap_flags);
113 +               }
114 +       }
115 +
116         return 0;
117  }
118