package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h

   1 /*
   2  * DO NOT MODIFY
   3  *
   4  * This file was generated by dtoc from a .dtb (device tree binary) file.
   5  */
   6
   7 #include <stdbool.h>
   8 #include <linux/libfdt.h>
   9 struct dtd_regulator_fixed {
  10         fdt32_t         gpio[3];
  11         fdt32_t         pinctrl_0;
  12         const char *    pinctrl_names;
  13         fdt32_t         regulator_max_microvolt;
  14         fdt32_t         regulator_min_microvolt;
  15         const char *    regulator_name;
  16         fdt32_t         vin_supply;
  17 };
  18 struct dtd_rockchip_gpio_bank {
  19         struct phandle_1_arg clocks[1];
  20         bool            gpio_controller;
  21         bool            interrupt_controller;
  22         fdt32_t         interrupts[3];
  23         fdt64_t         reg[2];
  24 };
  25 struct dtd_rockchip_rk3328_cru {
  26         fdt64_t         reg[2];
  27         fdt32_t         rockchip_grf;
  28 };
  29 struct dtd_rockchip_rk3328_dmc {
  30         fdt64_t         reg[12];
  31         fdt32_t         rockchip_sdram_params[196];
  32 };
  33 struct dtd_rockchip_rk3328_dw_mshc {
  34         fdt32_t         bus_width;
  35         bool            cap_mmc_highspeed;
  36         bool            cap_sd_highspeed;
  37         struct phandle_1_arg clocks[4];
  38         bool            disable_wp;
  39         fdt32_t         fifo_depth;
  40         fdt32_t         interrupts[3];
  41         fdt32_t         max_frequency;
  42         fdt32_t         pinctrl_0[4];
  43         const char *    pinctrl_names;
  44         fdt64_t         reg[2];
  45         bool            u_boot_spl_fifo_mode;
  46         fdt32_t         vmmc_supply;
  47         fdt32_t         vqmmc_supply;
  48 };
  49 struct dtd_rockchip_rk3328_grf {
  50         fdt64_t         reg[2];
  51 };
  52 struct dtd_rockchip_rk3328_pinctrl {
  53         bool            ranges;
  54         fdt32_t         rockchip_grf;
  55 };
  56 struct dtd_rockchip_rk3328_uart {
  57         fdt32_t         clock_frequency;
  58         struct phandle_1_arg clocks[2];
  59         const char *    dma_names[2];
  60         fdt32_t         dmas[4];
  61         fdt32_t         interrupts[3];
  62         fdt32_t         pinctrl_0;
  63         const char *    pinctrl_names;
  64         fdt64_t         reg[2];
  65         fdt32_t         reg_io_width;
  66         fdt32_t         reg_shift;
  67 };
  68 #define dtd_syscon dtd_rockchip_rk3328_cru
  69 #define dtd_simple_mfd dtd_rockchip_rk3328_grf
  70 #define dtd_snps_dw_apb_uart dtd_rockchip_rk3328_uart
  71 #define dtd_rockchip_cru dtd_rockchip_rk3328_cru
  72 #define dtd_rockchip_rk3288_dw_mshc dtd_rockchip_rk3328_dw_mshc