2 * (C) Copyright 2006-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
27 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
29 * NAND command for small page NAND devices (512)
31 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
33 struct nand_chip *this = mtd->priv;
34 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
37 while (!this->dev_ready(mtd))
40 CONFIG_SYS_NAND_READ_DELAY;
42 /* Begin command latch cycle */
43 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
44 /* Set ALE and clear CLE to start address cycle */
46 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
47 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
48 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
49 NAND_CTRL_ALE); /* A[24:17] */
50 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
51 /* One more address cycle for devices > 32MiB */
52 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
53 NAND_CTRL_ALE); /* A[28:25] */
55 /* Latch in address */
56 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
59 * Wait a while for the data to be ready
61 while (!this->dev_ready(mtd))
68 * NAND command for large page NAND devices (2k)
70 static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
72 struct nand_chip *this = mtd->priv;
73 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
74 void (*hwctrl)(struct mtd_info *mtd, int cmd,
75 unsigned int ctrl) = this->cmd_ctrl;
77 while (!this->dev_ready(mtd))
80 /* Emulate NAND_CMD_READOOB */
81 if (cmd == NAND_CMD_READOOB) {
82 offs += CONFIG_SYS_NAND_PAGE_SIZE;
86 /* Shift the offset from byte addressing to word addressing. */
87 if (this->options & NAND_BUSWIDTH_16)
90 /* Begin command latch cycle */
91 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
92 /* Set ALE and clear CLE to start address cycle */
94 hwctrl(mtd, offs & 0xff,
95 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
96 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
98 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
99 hwctrl(mtd, ((page_addr >> 8) & 0xff),
100 NAND_CTRL_ALE); /* A[27:20] */
101 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
102 /* One more address cycle for devices > 128MiB */
103 hwctrl(mtd, (page_addr >> 16) & 0x0f,
104 NAND_CTRL_ALE); /* A[31:28] */
106 /* Latch in address */
107 hwctrl(mtd, NAND_CMD_READSTART,
108 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
109 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
112 * Wait a while for the data to be ready
114 while (!this->dev_ready(mtd))
121 static int nand_is_bad_block(struct mtd_info *mtd, int block)
123 struct nand_chip *this = mtd->priv;
125 nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
130 if (readb(this->IO_ADDR_R) != 0xff)
136 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
138 struct nand_chip *this = mtd->priv;
143 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
144 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
145 int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
149 nand_command(mtd, block, page, 0, NAND_CMD_READ0);
151 /* No malloc available for now, just use some temporary locations
154 ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
155 ecc_code = ecc_calc + 0x100;
156 oob_data = ecc_calc + 0x200;
158 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
159 this->ecc.hwctl(mtd, NAND_ECC_READ);
160 this->read_buf(mtd, p, eccsize);
161 this->ecc.calculate(mtd, p, &ecc_calc[i]);
163 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
165 /* Pick the ECC bytes out of the oob data */
166 for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
167 ecc_code[i] = oob_data[nand_ecc_pos[i]];
169 eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
172 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
173 /* No chance to do something with the possible error message
174 * from correct_data(). We just hope that all possible errors
175 * are corrected by this routine.
177 stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
183 static int nand_load(struct mtd_info *mtd, unsigned int offs,
184 unsigned int uboot_size, uchar *dst)
186 unsigned int block, lastblock;
190 * offs has to be aligned to a page address!
192 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
193 lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
194 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
196 while (block <= lastblock) {
197 if (!nand_is_bad_block(mtd, block)) {
201 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
202 nand_read_page(mtd, block, page, dst);
203 dst += CONFIG_SYS_NAND_PAGE_SIZE;
219 * The main entry for NAND booting. It's necessary that SDRAM is already
220 * configured and available since this code loads the main U-Boot image
221 * from NAND into SDRAM and starts it from there.
225 struct nand_chip nand_chip;
226 nand_info_t nand_info;
228 __attribute__((noreturn)) void (*uboot)(void);
231 * Init board specific nand support
233 nand_chip.select_chip = NULL;
234 nand_info.priv = &nand_chip;
235 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
236 nand_chip.dev_ready = NULL; /* preset to NULL */
237 nand_chip.options = 0;
238 board_nand_init(&nand_chip);
240 if (nand_chip.select_chip)
241 nand_chip.select_chip(&nand_info, 0);
244 * Load U-Boot image from NAND into RAM
246 ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
247 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
249 #ifdef CONFIG_NAND_ENV_DST
250 nand_load(&nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
251 (uchar *)CONFIG_NAND_ENV_DST);
253 #ifdef CONFIG_ENV_OFFSET_REDUND
254 nand_load(&nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
255 (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
259 if (nand_chip.select_chip)
260 nand_chip.select_chip(&nand_info, -1);
263 * Jump to U-Boot image
265 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;