1 /* vi: set sw=4 ts=4: */
3 * Minimal i2c-tools implementation for busybox.
4 * Parts of code ported from i2c-tools:
5 * http://www.lm-sensors.org/wiki/I2CTools.
7 * Copyright (C) 2014 by Bartosz Golaszewski <bartekgola@gmail.com>
9 * Licensed under GPLv2 or later, see file LICENSE in this source tree.
12 //config:config I2CGET
13 //config: bool "i2cget (5.6 kb)"
15 //config: select PLATFORM_LINUX
17 //config: Read from I2C/SMBus chip registers.
19 //config:config I2CSET
20 //config: bool "i2cset (6.9 kb)"
22 //config: select PLATFORM_LINUX
24 //config: Set I2C registers.
26 //config:config I2CDUMP
27 //config: bool "i2cdump (7.2 kb)"
29 //config: select PLATFORM_LINUX
31 //config: Examine I2C registers.
33 //config:config I2CDETECT
34 //config: bool "i2cdetect (7.2 kb)"
36 //config: select PLATFORM_LINUX
38 //config: Detect I2C chips.
41 //applet:IF_I2CGET(APPLET(i2cget, BB_DIR_USR_SBIN, BB_SUID_DROP))
42 //applet:IF_I2CSET(APPLET(i2cset, BB_DIR_USR_SBIN, BB_SUID_DROP))
43 //applet:IF_I2CDUMP(APPLET(i2cdump, BB_DIR_USR_SBIN, BB_SUID_DROP))
44 //applet:IF_I2CDETECT(APPLET(i2cdetect, BB_DIR_USR_SBIN, BB_SUID_DROP))
45 /* not NOEXEC: if hw operation stalls, use less memory in "hung" process */
47 //kbuild:lib-$(CONFIG_I2CGET) += i2c_tools.o
48 //kbuild:lib-$(CONFIG_I2CSET) += i2c_tools.o
49 //kbuild:lib-$(CONFIG_I2CDUMP) += i2c_tools.o
50 //kbuild:lib-$(CONFIG_I2CDETECT) += i2c_tools.o
55 * - upstream i2c-tools can also look-up i2c busses by name, we only accept
57 * - bank and bankreg parameters for i2cdump are not supported because of
58 * their limited usefulness (see i2cdump manual entry for more info),
59 * - i2cdetect doesn't look for bus info in /proc as it does in upstream, but
60 * it shouldn't be a problem in modern kernels.
64 #include "common_bufsiz.h"
66 #include <linux/i2c.h>
67 #include <linux/i2c-dev.h>
69 #define I2CDUMP_NUM_REGS 256
71 #define I2CDETECT_MODE_AUTO 0
72 #define I2CDETECT_MODE_QUICK 1
73 #define I2CDETECT_MODE_READ 2
76 * This is needed for ioctl_or_perror_and_die() since it only accepts pointers.
78 static ALWAYS_INLINE void *itoptr(int i)
80 return (void*)(intptr_t)i;
83 static int32_t i2c_smbus_access(int fd, char read_write, uint8_t cmd,
84 int size, union i2c_smbus_data *data)
86 struct i2c_smbus_ioctl_data args;
88 args.read_write = read_write;
93 return ioctl(fd, I2C_SMBUS, &args);
96 static int32_t i2c_smbus_read_byte(int fd)
98 union i2c_smbus_data data;
101 err = i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
108 #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
109 static int32_t i2c_smbus_write_byte(int fd, uint8_t val)
111 return i2c_smbus_access(fd, I2C_SMBUS_WRITE,
112 val, I2C_SMBUS_BYTE, NULL);
115 static int32_t i2c_smbus_read_byte_data(int fd, uint8_t cmd)
117 union i2c_smbus_data data;
120 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
121 I2C_SMBUS_BYTE_DATA, &data);
128 static int32_t i2c_smbus_read_word_data(int fd, uint8_t cmd)
130 union i2c_smbus_data data;
133 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
134 I2C_SMBUS_WORD_DATA, &data);
140 #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
143 static int32_t i2c_smbus_write_byte_data(int file,
144 uint8_t cmd, uint8_t value)
146 union i2c_smbus_data data;
150 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
151 I2C_SMBUS_BYTE_DATA, &data);
154 static int32_t i2c_smbus_write_word_data(int file, uint8_t cmd, uint16_t value)
156 union i2c_smbus_data data;
160 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
161 I2C_SMBUS_WORD_DATA, &data);
164 static int32_t i2c_smbus_write_block_data(int file, uint8_t cmd,
165 uint8_t length, const uint8_t *values)
167 union i2c_smbus_data data;
169 if (length > I2C_SMBUS_BLOCK_MAX)
170 length = I2C_SMBUS_BLOCK_MAX;
172 memcpy(data.block+1, values, length);
173 data.block[0] = length;
175 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
176 I2C_SMBUS_BLOCK_DATA, &data);
179 static int32_t i2c_smbus_write_i2c_block_data(int file, uint8_t cmd,
180 uint8_t length, const uint8_t *values)
182 union i2c_smbus_data data;
184 if (length > I2C_SMBUS_BLOCK_MAX)
185 length = I2C_SMBUS_BLOCK_MAX;
187 memcpy(data.block+1, values, length);
188 data.block[0] = length;
190 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
191 I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
193 #endif /* ENABLE_I2CSET */
197 * Returns the number of bytes read, vals must hold at
198 * least I2C_SMBUS_BLOCK_MAX bytes.
200 static int32_t i2c_smbus_read_block_data(int fd, uint8_t cmd, uint8_t *vals)
202 union i2c_smbus_data data;
205 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
206 I2C_SMBUS_BLOCK_DATA, &data);
210 for (i = 1; i <= data.block[0]; i++)
211 *vals++ = data.block[i];
212 return data.block[0];
215 static int32_t i2c_smbus_read_i2c_block_data(int fd, uint8_t cmd,
216 uint8_t len, uint8_t *vals)
218 union i2c_smbus_data data;
221 if (len > I2C_SMBUS_BLOCK_MAX)
222 len = I2C_SMBUS_BLOCK_MAX;
225 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
226 len == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
227 I2C_SMBUS_I2C_BLOCK_DATA, &data);
231 for (i = 1; i <= data.block[0]; i++)
232 *vals++ = data.block[i];
233 return data.block[0];
235 #endif /* ENABLE_I2CDUMP */
238 static int32_t i2c_smbus_write_quick(int fd, uint8_t val)
240 return i2c_smbus_access(fd, val, 0, I2C_SMBUS_QUICK, NULL);
242 #endif /* ENABLE_I2CDETECT */
244 static int i2c_bus_lookup(const char *bus_str)
246 return xstrtou_range(bus_str, 10, 0, 0xfffff);
249 #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
250 static int i2c_parse_bus_addr(const char *addr_str)
252 /* Slave address must be in range 0x03 - 0x77. */
253 return xstrtou_range(addr_str, 16, 0x03, 0x77);
256 static void i2c_set_pec(int fd, int pec)
258 ioctl_or_perror_and_die(fd, I2C_PEC,
263 static void i2c_set_slave_addr(int fd, int addr, int force)
265 ioctl_or_perror_and_die(fd, force ? I2C_SLAVE_FORCE : I2C_SLAVE,
267 "can't set address to 0x%02x", addr);
269 #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
271 #if ENABLE_I2CGET || ENABLE_I2CSET
272 static int i2c_parse_data_addr(const char *data_addr)
274 /* Data address must be an 8 bit integer. */
275 return xstrtou_range(data_addr, 16, 0, 0xff);
277 #endif /* ENABLE_I2CGET || ENABLE_I2CSET */
280 * Opens the device file associated with given i2c bus.
282 * Upstream i2c-tools also support opening devices by i2c bus name
283 * but we drop it here for size reduction.
285 static int i2c_dev_open(int i2cbus)
287 char filename[sizeof("/dev/i2c-%d") + sizeof(int)*3];
290 sprintf(filename, "/dev/i2c-%d", i2cbus);
291 fd = open(filename, O_RDWR);
293 if (errno == ENOENT) {
294 filename[8] = '/'; /* change to "/dev/i2c/%d" */
295 fd = xopen(filename, O_RDWR);
297 bb_perror_msg_and_die("can't open '%s'", filename);
304 /* Size reducing helpers for xxx_check_funcs(). */
305 static void get_funcs_matrix(int fd, unsigned long *funcs)
307 ioctl_or_perror_and_die(fd, I2C_FUNCS, funcs,
308 "can't get adapter functionality matrix");
311 #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
312 static void check_funcs_test_end(int funcs, int pec, const char *err)
314 if (pec && !(funcs & (I2C_FUNC_SMBUS_PEC | I2C_FUNC_I2C)))
315 bb_error_msg("warning: adapter does not support PEC");
318 bb_error_msg_and_die(
319 "adapter has no %s capability", err);
321 #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
324 * The below functions emit an error message and exit if the adapter doesn't
325 * support desired functionalities.
327 #if ENABLE_I2CGET || ENABLE_I2CDUMP
328 static void check_read_funcs(int fd, int mode, int data_addr, int pec)
331 const char *err = NULL;
333 get_funcs_matrix(fd, &funcs);
336 if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
337 err = "SMBus receive byte";
340 if (data_addr >= 0 && !(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
341 err = "SMBus send byte";
343 case I2C_SMBUS_BYTE_DATA:
344 if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE_DATA))
345 err = "SMBus read byte";
347 case I2C_SMBUS_WORD_DATA:
348 if (!(funcs & I2C_FUNC_SMBUS_READ_WORD_DATA))
349 err = "SMBus read word";
352 case I2C_SMBUS_BLOCK_DATA:
353 if (!(funcs & I2C_FUNC_SMBUS_READ_BLOCK_DATA))
354 err = "SMBus block read";
357 case I2C_SMBUS_I2C_BLOCK_DATA:
358 if (!(funcs & I2C_FUNC_SMBUS_READ_I2C_BLOCK))
359 err = "I2C block read";
361 #endif /* ENABLE_I2CDUMP */
363 bb_error_msg_and_die("internal error");
365 check_funcs_test_end(funcs, pec, err);
367 #endif /* ENABLE_I2CGET || ENABLE_I2CDUMP */
370 static void check_write_funcs(int fd, int mode, int pec)
373 const char *err = NULL;
375 get_funcs_matrix(fd, &funcs);
378 if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
379 err = "SMBus send byte";
382 case I2C_SMBUS_BYTE_DATA:
383 if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
384 err = "SMBus write byte";
387 case I2C_SMBUS_WORD_DATA:
388 if (!(funcs & I2C_FUNC_SMBUS_WRITE_WORD_DATA))
389 err = "SMBus write word";
392 case I2C_SMBUS_BLOCK_DATA:
393 if (!(funcs & I2C_FUNC_SMBUS_WRITE_BLOCK_DATA))
394 err = "SMBus block write";
396 case I2C_SMBUS_I2C_BLOCK_DATA:
397 if (!(funcs & I2C_FUNC_SMBUS_WRITE_I2C_BLOCK))
398 err = "I2C block write";
401 check_funcs_test_end(funcs, pec, err);
403 #endif /* ENABLE_I2CSET */
405 static void confirm_or_abort(void)
407 fprintf(stderr, "Continue? [y/N] ");
409 if (!bb_ask_confirmation())
410 bb_error_msg_and_die("aborting");
414 * Return only if user confirms the action, abort otherwise.
416 * The messages displayed here are much less elaborate than their i2c-tools
417 * counterparts - this is done for size reduction.
419 static void confirm_action(int bus_addr, int mode, int data_addr, int pec)
421 bb_error_msg("WARNING! This program can confuse your I2C bus");
423 /* Don't let the user break his/her EEPROMs */
424 if (bus_addr >= 0x50 && bus_addr <= 0x57 && pec) {
425 bb_error_msg_and_die("this is I2C not smbus - using PEC on I2C "
426 "devices may result in data loss, aborting");
429 if (mode == I2C_SMBUS_BYTE && data_addr >= 0 && pec)
430 bb_error_msg("WARNING! May interpret a write byte command "
431 "with PEC as a write byte data command");
434 bb_error_msg("PEC checking enabled");
440 //usage:#define i2cget_trivial_usage
441 //usage: "[-f] [-y] BUS CHIP-ADDRESS [DATA-ADDRESS [MODE]]"
442 //usage:#define i2cget_full_usage "\n\n"
443 //usage: "Read from I2C/SMBus chip registers\n"
444 //usage: "\n I2CBUS i2c bus number"
445 //usage: "\n ADDRESS 0x03 - 0x77"
446 //usage: "\nMODE is:"
447 //usage: "\n b read byte data (default)"
448 //usage: "\n w read word data"
449 //usage: "\n c write byte/read byte"
450 //usage: "\n Append p for SMBus PEC"
452 //usage: "\n -f force access"
453 //usage: "\n -y disable interactive mode"
454 int i2cget_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
455 int i2cget_main(int argc UNUSED_PARAM, char **argv)
457 const unsigned opt_f = (1 << 0), opt_y = (1 << 1);
459 int bus_num, bus_addr, data_addr = -1, status;
460 int mode = I2C_SMBUS_BYTE, pec = 0, fd;
463 opts = getopt32(argv, "^" "fy" "\0" "-2:?4"/*from 2 to 4 args*/);
466 bus_num = i2c_bus_lookup(argv[0]);
467 bus_addr = i2c_parse_bus_addr(argv[1]);
470 data_addr = i2c_parse_data_addr(argv[2]);
471 mode = I2C_SMBUS_BYTE_DATA;
473 switch (argv[3][0]) {
474 case 'b': /* Already set */ break;
475 case 'w': mode = I2C_SMBUS_WORD_DATA; break;
476 case 'c': mode = I2C_SMBUS_BYTE; break;
478 bb_error_msg("invalid mode");
481 pec = argv[3][1] == 'p';
485 fd = i2c_dev_open(bus_num);
486 check_read_funcs(fd, mode, data_addr, pec);
487 i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
490 confirm_action(bus_addr, mode, data_addr, pec);
497 if (data_addr >= 0) {
498 status = i2c_smbus_write_byte(fd, data_addr);
500 bb_error_msg("warning - write failed");
502 status = i2c_smbus_read_byte(fd);
504 case I2C_SMBUS_WORD_DATA:
505 status = i2c_smbus_read_word_data(fd, data_addr);
507 default: /* I2C_SMBUS_BYTE_DATA */
508 status = i2c_smbus_read_byte_data(fd, data_addr);
513 bb_perror_msg_and_die("read failed");
515 printf("0x%0*x\n", mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
519 #endif /* ENABLE_I2CGET */
522 //usage:#define i2cset_trivial_usage
523 //usage: "[-f] [-y] [-m MASK] BUS CHIP-ADDR DATA-ADDR [VALUE] ... [MODE]"
524 //usage:#define i2cset_full_usage "\n\n"
525 //usage: "Set I2C registers\n"
526 //usage: "\n I2CBUS i2c bus number"
527 //usage: "\n ADDRESS 0x03 - 0x77"
528 //usage: "\nMODE is:"
529 //usage: "\n c byte, no value"
530 //usage: "\n b byte data (default)"
531 //usage: "\n w word data"
532 //usage: "\n i I2C block data"
533 //usage: "\n s SMBus block data"
534 //usage: "\n Append p for SMBus PEC"
536 //usage: "\n -f force access"
537 //usage: "\n -y disable interactive mode"
538 //usage: "\n -r read back and compare the result"
539 //usage: "\n -m MASK mask specifying which bits to write"
540 int i2cset_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
541 int i2cset_main(int argc, char **argv)
543 const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
544 opt_m = (1 << 2), opt_r = (1 << 3);
546 int bus_num, bus_addr, data_addr, mode = I2C_SMBUS_BYTE, pec = 0;
547 int val, blen = 0, mask = 0, fd, status;
548 unsigned char block[I2C_SMBUS_BLOCK_MAX];
549 char *opt_m_arg = NULL;
552 opts = getopt32(argv, "^" "fym:r" "\0" "-3"/*from 3 to ? args*/, &opt_m_arg);
556 bus_num = i2c_bus_lookup(argv[0]);
557 bus_addr = i2c_parse_bus_addr(argv[1]);
558 data_addr = i2c_parse_data_addr(argv[2]);
561 if (!argv[4] && argv[3][0] != 'c') {
562 mode = I2C_SMBUS_BYTE_DATA; /* Implicit b */
564 switch (argv[argc-1][0]) {
565 case 'c': /* Already set */ break;
566 case 'b': mode = I2C_SMBUS_BYTE_DATA; break;
567 case 'w': mode = I2C_SMBUS_WORD_DATA; break;
568 case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
569 case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
571 bb_error_msg("invalid mode");
575 pec = argv[argc-1][1] == 'p';
576 if (mode == I2C_SMBUS_BLOCK_DATA ||
577 mode == I2C_SMBUS_I2C_BLOCK_DATA) {
578 if (pec && mode == I2C_SMBUS_I2C_BLOCK_DATA)
579 bb_error_msg_and_die(
580 "PEC not supported for I2C "
583 bb_error_msg_and_die(
584 "mask not supported for block "
590 /* Prepare the value(s) to be written according to current mode. */
592 case I2C_SMBUS_BYTE_DATA:
593 val = xstrtou_range(argv[3], 0, 0, 0xff);
595 case I2C_SMBUS_WORD_DATA:
596 val = xstrtou_range(argv[3], 0, 0, 0xffff);
598 case I2C_SMBUS_BLOCK_DATA:
599 case I2C_SMBUS_I2C_BLOCK_DATA:
600 for (blen = 3; blen < (argc - 1); blen++)
601 block[blen] = xstrtou_range(argv[blen], 0, 0, 0xff);
610 mask = xstrtou_range(opt_m_arg, 0, 0,
611 (mode == I2C_SMBUS_BYTE ||
612 mode == I2C_SMBUS_BYTE_DATA) ? 0xff : 0xffff);
615 fd = i2c_dev_open(bus_num);
616 check_write_funcs(fd, mode, pec);
617 i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
620 confirm_action(bus_addr, mode, data_addr, pec);
623 * If we're using mask - read the current value here and adjust the
624 * value to be written.
631 tmpval = i2c_smbus_read_byte(fd);
633 case I2C_SMBUS_WORD_DATA:
634 tmpval = i2c_smbus_read_word_data(fd, data_addr);
637 tmpval = i2c_smbus_read_byte_data(fd, data_addr);
641 bb_perror_msg_and_die("can't read old value");
643 val = (val & mask) | (tmpval & ~mask);
645 if (!(opts & opt_y)) {
646 bb_error_msg("old value 0x%0*x, write mask "
647 "0x%0*x, will write 0x%0*x to register "
649 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, tmpval,
650 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, mask,
651 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
662 status = i2c_smbus_write_byte(fd, data_addr);
664 case I2C_SMBUS_WORD_DATA:
665 status = i2c_smbus_write_word_data(fd, data_addr, val);
667 case I2C_SMBUS_BLOCK_DATA:
668 status = i2c_smbus_write_block_data(fd, data_addr,
671 case I2C_SMBUS_I2C_BLOCK_DATA:
672 status = i2c_smbus_write_i2c_block_data(fd, data_addr,
675 default: /* I2C_SMBUS_BYTE_DATA */
676 status = i2c_smbus_write_byte_data(fd, data_addr, val);
680 bb_perror_msg_and_die("write failed");
683 i2c_set_pec(fd, 0); /* Clear PEC. */
685 /* No readback required - we're done. */
691 status = i2c_smbus_read_byte(fd);
694 case I2C_SMBUS_WORD_DATA:
695 status = i2c_smbus_read_word_data(fd, data_addr);
697 default: /* I2C_SMBUS_BYTE_DATA */
698 status = i2c_smbus_read_byte_data(fd, data_addr);
702 puts("Warning - readback failed");
705 printf("Warning - data mismatch - wrote "
706 "0x%0*x, read back 0x%0*x\n",
707 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
708 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
710 printf("Value 0x%0*x written, readback matched\n",
711 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val);
716 #endif /* ENABLE_I2CSET */
719 static int read_block_data(int buf_fd, int mode, int *block)
721 uint8_t cblock[I2C_SMBUS_BLOCK_MAX + I2CDUMP_NUM_REGS];
722 int res, blen = 0, tmp, i;
724 if (mode == I2C_SMBUS_BLOCK_DATA) {
725 blen = i2c_smbus_read_block_data(buf_fd, 0, cblock);
729 for (res = 0; res < I2CDUMP_NUM_REGS; res += tmp) {
730 tmp = i2c_smbus_read_i2c_block_data(
731 buf_fd, res, I2C_SMBUS_BLOCK_MAX,
739 if (res >= I2CDUMP_NUM_REGS)
740 res = I2CDUMP_NUM_REGS;
742 for (i = 0; i < res; i++)
743 block[i] = cblock[i];
745 if (mode != I2C_SMBUS_BLOCK_DATA)
746 for (i = res; i < I2CDUMP_NUM_REGS; i++)
753 bb_error_msg_and_die("block read failed: %d", blen);
756 /* Dump all but word data. */
757 static void dump_data(int bus_fd, int mode, unsigned first,
758 unsigned last, int *block, int blen)
762 puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f"
763 " 0123456789abcdef");
765 for (i = 0; i < I2CDUMP_NUM_REGS; i += 0x10) {
766 if (mode == I2C_SMBUS_BLOCK_DATA && i >= blen)
774 for (j = 0; j < 16; j++) {
776 /* Skip unwanted registers */
777 if (i+j < first || i+j > last) {
779 if (mode == I2C_SMBUS_WORD_DATA) {
787 case I2C_SMBUS_BYTE_DATA:
788 res = i2c_smbus_read_byte_data(bus_fd, i+j);
791 case I2C_SMBUS_WORD_DATA:
792 res = i2c_smbus_read_word_data(bus_fd, i+j);
797 block[i+j] = res & 0xff;
798 block[i+j+1] = res >> 8;
802 res = i2c_smbus_read_byte(bus_fd);
809 if (mode == I2C_SMBUS_BLOCK_DATA &&
812 } else if (res < 0) {
814 if (mode == I2C_SMBUS_WORD_DATA)
817 printf("%02x ", block[i+j]);
818 if (mode == I2C_SMBUS_WORD_DATA)
819 printf("%02x ", block[i+j+1]);
822 if (mode == I2C_SMBUS_WORD_DATA)
827 for (j = 0; j < 16; j++) {
828 if (mode == I2C_SMBUS_BLOCK_DATA && i+j >= blen)
830 /* Skip unwanted registers */
831 if (i+j < first || i+j > last) {
839 } else if (res == 0x00 || res == 0xff) {
841 } else if (res < 32 || res >= 127) {
851 static void dump_word_data(int bus_fd, unsigned first, unsigned last)
856 puts(" 0,8 1,9 2,a 3,b 4,c 5,d 6,e 7,f");
857 for (i = 0; i < 256; i += 8) {
864 for (j = 0; j < 8; j++) {
865 /* Skip unwanted registers. */
866 if (i+j < first || i+j > last) {
871 rv = i2c_smbus_read_word_data(bus_fd, i+j);
875 printf("%04x ", rv & 0xffff);
881 //usage:#define i2cdump_trivial_usage
882 //usage: "[-f] [-r FIRST-LAST] [-y] BUS ADDR [MODE]"
883 //usage:#define i2cdump_full_usage "\n\n"
884 //usage: "Examine I2C registers\n"
885 //usage: "\n I2CBUS i2c bus number"
886 //usage: "\n ADDRESS 0x03 - 0x77"
887 //usage: "\nMODE is:"
888 //usage: "\n b byte (default)"
890 //usage: "\n W word on even register addresses"
891 //usage: "\n i I2C block"
892 //usage: "\n s SMBus block"
893 //usage: "\n c consecutive byte"
894 //usage: "\n Append p for SMBus PEC"
896 //usage: "\n -f force access"
897 //usage: "\n -y disable interactive mode"
898 //usage: "\n -r limit the number of registers being accessed"
899 int i2cdump_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
900 int i2cdump_main(int argc UNUSED_PARAM, char **argv)
902 const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
905 int bus_num, bus_addr, mode = I2C_SMBUS_BYTE_DATA, even = 0, pec = 0;
906 unsigned first = 0x00, last = 0xff, opts;
907 int block[I2CDUMP_NUM_REGS];
908 char *opt_r_str, *dash;
911 opts = getopt32(argv, "^"
913 "\0" "-2:?3" /* from 2 to 3 args */,
918 bus_num = i2c_bus_lookup(argv[0]);
919 bus_addr = i2c_parse_bus_addr(argv[1]);
922 switch (argv[2][0]) {
923 case 'b': /* Already set. */ break;
924 case 'c': mode = I2C_SMBUS_BYTE; break;
925 case 'w': mode = I2C_SMBUS_WORD_DATA; break;
927 mode = I2C_SMBUS_WORD_DATA;
930 case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
931 case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
933 bb_error_msg_and_die("invalid mode");
936 if (argv[2][1] == 'p') {
937 if (argv[2][0] == 'W' || argv[2][0] == 'i') {
938 bb_error_msg_and_die(
939 "pec not supported for -W and -i");
947 first = strtol(opt_r_str, &dash, 0);
948 if (dash == opt_r_str || *dash != '-' || first > 0xff)
949 bb_error_msg_and_die("invalid range");
950 last = xstrtou_range(++dash, 0, first, 0xff);
952 /* Range is not available for every mode. */
955 case I2C_SMBUS_BYTE_DATA:
957 case I2C_SMBUS_WORD_DATA:
958 if (!even || (!(first % 2) && last % 2))
962 bb_error_msg_and_die(
963 "range not compatible with selected mode");
967 fd = i2c_dev_open(bus_num);
968 check_read_funcs(fd, mode, -1 /* data_addr */, pec);
969 i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
975 confirm_action(bus_addr, mode, -1 /* data_addr */, pec);
977 /* All but word data. */
978 if (mode != I2C_SMBUS_WORD_DATA || even) {
981 if (mode == I2C_SMBUS_BLOCK_DATA || mode == I2C_SMBUS_I2C_BLOCK_DATA)
982 blen = read_block_data(fd, mode, block);
984 if (mode == I2C_SMBUS_BYTE) {
985 res = i2c_smbus_write_byte(fd, first);
987 bb_perror_msg_and_die("write start address");
990 dump_data(fd, mode, first, last, block, blen);
992 dump_word_data(fd, first, last);
997 #endif /* ENABLE_I2CDUMP */
1012 static const struct adap_desc adap_descs[] = {
1014 .algo = "Dummy bus", },
1016 .algo = "ISA bus", },
1018 .algo = "I2C adapter", },
1020 .algo = "SMBus adapter", },
1029 static const struct i2c_func i2c_funcs_tab[] = {
1030 { .value = I2C_FUNC_I2C,
1032 { .value = I2C_FUNC_SMBUS_QUICK,
1033 .name = "SMBus quick command" },
1034 { .value = I2C_FUNC_SMBUS_WRITE_BYTE,
1035 .name = "SMBus send byte" },
1036 { .value = I2C_FUNC_SMBUS_READ_BYTE,
1037 .name = "SMBus receive byte" },
1038 { .value = I2C_FUNC_SMBUS_WRITE_BYTE_DATA,
1039 .name = "SMBus write byte" },
1040 { .value = I2C_FUNC_SMBUS_READ_BYTE_DATA,
1041 .name = "SMBus read byte" },
1042 { .value = I2C_FUNC_SMBUS_WRITE_WORD_DATA,
1043 .name = "SMBus write word" },
1044 { .value = I2C_FUNC_SMBUS_READ_WORD_DATA,
1045 .name = "SMBus read word" },
1046 { .value = I2C_FUNC_SMBUS_PROC_CALL,
1047 .name = "SMBus process call" },
1048 { .value = I2C_FUNC_SMBUS_WRITE_BLOCK_DATA,
1049 .name = "SMBus block write" },
1050 { .value = I2C_FUNC_SMBUS_READ_BLOCK_DATA,
1051 .name = "SMBus block read" },
1052 { .value = I2C_FUNC_SMBUS_BLOCK_PROC_CALL,
1053 .name = "SMBus block process call" },
1054 { .value = I2C_FUNC_SMBUS_PEC,
1055 .name = "SMBus PEC" },
1056 { .value = I2C_FUNC_SMBUS_WRITE_I2C_BLOCK,
1057 .name = "I2C block write" },
1058 { .value = I2C_FUNC_SMBUS_READ_I2C_BLOCK,
1059 .name = "I2C block read" },
1060 { .value = 0, .name = NULL }
1063 static enum adapter_type i2cdetect_get_funcs(int bus)
1065 enum adapter_type ret;
1066 unsigned long funcs;
1069 fd = i2c_dev_open(bus);
1071 get_funcs_matrix(fd, &funcs);
1072 if (funcs & I2C_FUNC_I2C)
1074 else if (funcs & (I2C_FUNC_SMBUS_BYTE |
1075 I2C_FUNC_SMBUS_BYTE_DATA |
1076 I2C_FUNC_SMBUS_WORD_DATA))
1086 static void NORETURN list_i2c_busses_and_exit(void)
1088 const char *const i2cdev_path = "/sys/class/i2c-dev";
1090 char path[NAME_MAX], name[128];
1091 struct dirent *de, *subde;
1092 enum adapter_type adt;
1099 * XXX Upstream i2cdetect also looks for i2c bus info in /proc/bus/i2c,
1100 * but we won't bother since it's only useful on older kernels (before
1101 * 2.6.5). We expect sysfs to be present and mounted at /sys/.
1104 dir = xopendir(i2cdev_path);
1105 while ((de = readdir(dir))) {
1106 if (de->d_name[0] == '.')
1109 /* Simple version for ISA chips. */
1110 snprintf(path, NAME_MAX, "%s/%s/name",
1111 i2cdev_path, de->d_name);
1112 fp = fopen(path, "r");
1114 snprintf(path, NAME_MAX,
1115 "%s/%s/device/name",
1116 i2cdev_path, de->d_name);
1117 fp = fopen(path, "r");
1120 /* Non-ISA chips require the hard-way. */
1122 snprintf(path, NAME_MAX,
1123 "%s/%s/device/name",
1124 i2cdev_path, de->d_name);
1125 subdir = opendir(path);
1129 while ((subde = readdir(subdir))) {
1130 if (subde->d_name[0] == '.')
1133 if (is_prefixed_with(subde->d_name, "i2c-")) {
1134 snprintf(path, NAME_MAX,
1135 "%s/%s/device/%s/name",
1136 i2cdev_path, de->d_name,
1138 fp = fopen(path, "r");
1146 * Get the rest of the info and display a line
1149 memset(name, 0, sizeof(name));
1150 pos = fgets(name, sizeof(name), fp);
1155 pos = strchr(name, '\n');
1159 rv = sscanf(de->d_name, "i2c-%d", &bus);
1163 if (is_prefixed_with(name, "ISA"))
1166 adt = i2cdetect_get_funcs(bus);
1169 "i2c-%d\t%-10s\t%-32s\t%s\n",
1170 bus, adap_descs[adt].funcs,
1171 name, adap_descs[adt].algo);
1178 static void NORETURN no_support(const char *cmd)
1180 bb_error_msg_and_die("bus doesn't support %s", cmd);
1183 static void will_skip(const char *cmd)
1186 "warning: can't use %s command, "
1187 "will skip some addresses", cmd);
1190 //usage:#define i2cdetect_trivial_usage
1191 //usage: "[-F I2CBUS] [-l] [-y] [-a] [-q|-r] I2CBUS [FIRST LAST]"
1192 //usage:#define i2cdetect_full_usage "\n\n"
1193 //usage: "Detect I2C chips.\n"
1194 //usage: "\n I2CBUS i2c bus number"
1195 //usage: "\n FIRST and LAST limit the probing range"
1197 //usage: "\n -l output list of installed busses"
1198 //usage: "\n -y disable interactive mode"
1199 //usage: "\n -a force scanning of non-regular addresses"
1200 //usage: "\n -q use smbus quick write commands for probing (default)"
1201 //usage: "\n -r use smbus read byte commands for probing"
1202 //usage: "\n -F display list of functionalities"
1203 int i2cdetect_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
1204 int i2cdetect_main(int argc UNUSED_PARAM, char **argv)
1206 const unsigned opt_y = (1 << 0), opt_a = (1 << 1),
1207 opt_q = (1 << 2), opt_r = (1 << 3),
1208 opt_F = (1 << 4), opt_l = (1 << 5);
1210 int fd, bus_num, i, j, mode = I2CDETECT_MODE_AUTO, status, cmd;
1211 unsigned first = 0x03, last = 0x77, opts;
1212 unsigned long funcs;
1214 opts = getopt32(argv, "^"
1217 "q--r:r--q:"/*mutually exclusive*/ "?3"/*up to 3 args*/
1222 list_i2c_busses_and_exit();
1227 bus_num = i2c_bus_lookup(argv[0]);
1228 fd = i2c_dev_open(bus_num);
1229 get_funcs_matrix(fd, &funcs);
1232 /* Only list the functionalities. */
1233 printf("Functionalities implemented by bus #%d\n", bus_num);
1234 for (i = 0; i2c_funcs_tab[i].value; i++) {
1235 printf("%-32s %s\n", i2c_funcs_tab[i].name,
1236 funcs & i2c_funcs_tab[i].value ? "yes" : "no");
1239 return EXIT_SUCCESS;
1243 mode = I2CDETECT_MODE_READ;
1244 else if (opts & opt_q)
1245 mode = I2CDETECT_MODE_QUICK;
1252 /* Read address range. */
1254 first = xstrtou_range(argv[1], 16, first, last);
1256 last = xstrtou_range(argv[2], 16, first, last);
1259 if (!(funcs & (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_READ_BYTE))) {
1260 no_support("detection commands");
1262 if (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)) {
1263 no_support("SMBus quick write");
1265 if (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
1266 no_support("SMBus receive byte");
1269 if (mode == I2CDETECT_MODE_AUTO) {
1270 if (!(funcs & I2C_FUNC_SMBUS_QUICK))
1271 will_skip("SMBus quick write");
1272 if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE))
1273 will_skip("SMBus receive byte");
1276 if (!(opts & opt_y))
1277 confirm_action(-1, -1, -1, 0);
1279 puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f");
1280 for (i = 0; i < 128; i += 16) {
1281 printf("%02x: ", i);
1282 for (j = 0; j < 16; j++) {
1286 if (mode == I2CDETECT_MODE_AUTO) {
1287 if ((i+j >= 0x30 && i+j <= 0x37) ||
1288 (i+j >= 0x50 && i+j <= 0x5F))
1289 cmd = I2CDETECT_MODE_READ;
1291 cmd = I2CDETECT_MODE_QUICK;
1294 /* Skip unwanted addresses. */
1297 || (cmd == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE))
1298 || (cmd == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)))
1304 status = ioctl(fd, I2C_SLAVE, itoptr(i + j));
1306 if (errno == EBUSY) {
1311 bb_perror_msg_and_die(
1312 "can't set address to 0x%02x", i + j);
1316 case I2CDETECT_MODE_READ:
1318 * This is known to lock SMBus on various
1319 * write-only chips (mainly clock chips).
1321 status = i2c_smbus_read_byte(fd);
1323 default: /* I2CDETECT_MODE_QUICK: */
1325 * This is known to corrupt the Atmel
1328 status = i2c_smbus_write_quick(fd,
1336 printf("%02x ", i+j);
1343 #endif /* ENABLE_I2CDETECT */