1 /* vi: set sw=4 ts=4: */
3 * Minimal i2c-tools implementation for busybox.
4 * Parts of code ported from i2c-tools:
5 * http://www.lm-sensors.org/wiki/I2CTools.
7 * Copyright (C) 2014 by Bartosz Golaszewski <bartekgola@gmail.com>
9 * Licensed under GPLv2 or later, see file LICENSE in this source tree.
12 //config:config I2CGET
13 //config: bool "i2cget"
15 //config: select PLATFORM_LINUX
17 //config: Read from I2C/SMBus chip registers.
19 //config:config I2CSET
20 //config: bool "i2cset"
22 //config: select PLATFORM_LINUX
24 //config: Set I2C registers.
26 //config:config I2CDUMP
27 //config: bool "i2cdump"
29 //config: select PLATFORM_LINUX
31 //config: Examine I2C registers.
33 //config:config I2CDETECT
34 //config: bool "i2cdetect"
36 //config: select PLATFORM_LINUX
38 //config: Detect I2C chips.
41 //applet:IF_I2CGET(APPLET(i2cget, BB_DIR_USR_SBIN, BB_SUID_DROP))
42 //applet:IF_I2CSET(APPLET(i2cset, BB_DIR_USR_SBIN, BB_SUID_DROP))
43 //applet:IF_I2CDUMP(APPLET(i2cdump, BB_DIR_USR_SBIN, BB_SUID_DROP))
44 //applet:IF_I2CDETECT(APPLET(i2cdetect, BB_DIR_USR_SBIN, BB_SUID_DROP))
46 //kbuild:lib-$(CONFIG_I2CGET) += i2c_tools.o
47 //kbuild:lib-$(CONFIG_I2CSET) += i2c_tools.o
48 //kbuild:lib-$(CONFIG_I2CDUMP) += i2c_tools.o
49 //kbuild:lib-$(CONFIG_I2CDETECT) += i2c_tools.o
54 * - upstream i2c-tools can also look-up i2c busses by name, we only accept
56 * - bank and bankreg parameters for i2cdump are not supported because of
57 * their limited usefulness (see i2cdump manual entry for more info),
58 * - i2cdetect doesn't look for bus info in /proc as it does in upstream, but
59 * it shouldn't be a problem in modern kernels.
64 #include <linux/i2c.h>
65 #include <linux/i2c-dev.h>
67 #define I2CDUMP_NUM_REGS 256
69 #define I2CDETECT_MODE_AUTO 0
70 #define I2CDETECT_MODE_QUICK 1
71 #define I2CDETECT_MODE_READ 2
74 * This is needed for ioctl_or_perror_and_die() since it only accepts pointers.
76 static ALWAYS_INLINE void *itoptr(int i)
78 return (void*)(intptr_t)i;
81 static int32_t i2c_smbus_access(int fd, char read_write, uint8_t cmd,
82 int size, union i2c_smbus_data *data)
84 struct i2c_smbus_ioctl_data args;
86 args.read_write = read_write;
91 return ioctl(fd, I2C_SMBUS, &args);
94 static int32_t i2c_smbus_read_byte(int fd)
96 union i2c_smbus_data data;
99 err = i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
106 #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
107 static int32_t i2c_smbus_write_byte(int fd, uint8_t val)
109 return i2c_smbus_access(fd, I2C_SMBUS_WRITE,
110 val, I2C_SMBUS_BYTE, NULL);
113 static int32_t i2c_smbus_read_byte_data(int fd, uint8_t cmd)
115 union i2c_smbus_data data;
118 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
119 I2C_SMBUS_BYTE_DATA, &data);
126 static int32_t i2c_smbus_read_word_data(int fd, uint8_t cmd)
128 union i2c_smbus_data data;
131 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
132 I2C_SMBUS_WORD_DATA, &data);
138 #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
141 static int32_t i2c_smbus_write_byte_data(int file,
142 uint8_t cmd, uint8_t value)
144 union i2c_smbus_data data;
148 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
149 I2C_SMBUS_BYTE_DATA, &data);
152 static int32_t i2c_smbus_write_word_data(int file, uint8_t cmd, uint16_t value)
154 union i2c_smbus_data data;
158 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
159 I2C_SMBUS_WORD_DATA, &data);
162 static int32_t i2c_smbus_write_block_data(int file, uint8_t cmd,
163 uint8_t length, const uint8_t *values)
165 union i2c_smbus_data data;
167 if (length > I2C_SMBUS_BLOCK_MAX)
168 length = I2C_SMBUS_BLOCK_MAX;
170 memcpy(data.block+1, values, length);
171 data.block[0] = length;
173 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
174 I2C_SMBUS_BLOCK_DATA, &data);
177 static int32_t i2c_smbus_write_i2c_block_data(int file, uint8_t cmd,
178 uint8_t length, const uint8_t *values)
180 union i2c_smbus_data data;
182 if (length > I2C_SMBUS_BLOCK_MAX)
183 length = I2C_SMBUS_BLOCK_MAX;
185 memcpy(data.block+1, values, length);
186 data.block[0] = length;
188 return i2c_smbus_access(file, I2C_SMBUS_WRITE, cmd,
189 I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
191 #endif /* ENABLE_I2CSET */
195 * Returns the number of bytes read, vals must hold at
196 * least I2C_SMBUS_BLOCK_MAX bytes.
198 static int32_t i2c_smbus_read_block_data(int fd, uint8_t cmd, uint8_t *vals)
200 union i2c_smbus_data data;
203 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
204 I2C_SMBUS_BLOCK_DATA, &data);
208 for (i = 1; i <= data.block[0]; i++)
209 *vals++ = data.block[i];
210 return data.block[0];
213 static int32_t i2c_smbus_read_i2c_block_data(int fd, uint8_t cmd,
214 uint8_t len, uint8_t *vals)
216 union i2c_smbus_data data;
219 if (len > I2C_SMBUS_BLOCK_MAX)
220 len = I2C_SMBUS_BLOCK_MAX;
223 err = i2c_smbus_access(fd, I2C_SMBUS_READ, cmd,
224 len == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
225 I2C_SMBUS_I2C_BLOCK_DATA, &data);
229 for (i = 1; i <= data.block[0]; i++)
230 *vals++ = data.block[i];
231 return data.block[0];
233 #endif /* ENABLE_I2CDUMP */
236 static int32_t i2c_smbus_write_quick(int fd, uint8_t val)
238 return i2c_smbus_access(fd, val, 0, I2C_SMBUS_QUICK, NULL);
240 #endif /* ENABLE_I2CDETECT */
242 static int i2c_bus_lookup(const char *bus_str)
244 return xstrtou_range(bus_str, 10, 0, 0xfffff);
247 #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
248 static int i2c_parse_bus_addr(const char *addr_str)
250 /* Slave address must be in range 0x03 - 0x77. */
251 return xstrtou_range(addr_str, 16, 0x03, 0x77);
254 static void i2c_set_pec(int fd, int pec)
256 ioctl_or_perror_and_die(fd, I2C_PEC,
261 static void i2c_set_slave_addr(int fd, int addr, int force)
263 ioctl_or_perror_and_die(fd, force ? I2C_SLAVE_FORCE : I2C_SLAVE,
265 "can't set address to 0x%02x", addr);
267 #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
269 #if ENABLE_I2CGET || ENABLE_I2CSET
270 static int i2c_parse_data_addr(const char *data_addr)
272 /* Data address must be an 8 bit integer. */
273 return xstrtou_range(data_addr, 16, 0, 0xff);
275 #endif /* ENABLE_I2CGET || ENABLE_I2CSET */
278 * Opens the device file associated with given i2c bus.
280 * Upstream i2c-tools also support opening devices by i2c bus name
281 * but we drop it here for size reduction.
283 static int i2c_dev_open(int i2cbus)
285 char filename[sizeof("/dev/i2c-%d") + sizeof(int)*3];
288 sprintf(filename, "/dev/i2c-%d", i2cbus);
289 fd = open(filename, O_RDWR);
291 if (errno == ENOENT) {
292 filename[8] = '/'; /* change to "/dev/i2c/%d" */
293 fd = xopen(filename, O_RDWR);
295 bb_perror_msg_and_die("can't open '%s'", filename);
302 /* Size reducing helpers for xxx_check_funcs(). */
303 static void get_funcs_matrix(int fd, unsigned long *funcs)
305 ioctl_or_perror_and_die(fd, I2C_FUNCS, funcs,
306 "can't get adapter functionality matrix");
309 #if ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP
310 static void check_funcs_test_end(int funcs, int pec, const char *err)
312 if (pec && !(funcs & (I2C_FUNC_SMBUS_PEC | I2C_FUNC_I2C)))
313 bb_error_msg("warning: adapter does not support PEC");
316 bb_error_msg_and_die(
317 "adapter has no %s capability", err);
319 #endif /* ENABLE_I2CGET || ENABLE_I2CSET || ENABLE_I2CDUMP */
322 * The below functions emit an error message and exit if the adapter doesn't
323 * support desired functionalities.
325 #if ENABLE_I2CGET || ENABLE_I2CDUMP
326 static void check_read_funcs(int fd, int mode, int data_addr, int pec)
329 const char *err = NULL;
331 get_funcs_matrix(fd, &funcs);
334 if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
335 err = "SMBus receive byte";
338 if (data_addr >= 0 && !(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
339 err = "SMBus send byte";
341 case I2C_SMBUS_BYTE_DATA:
342 if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE_DATA))
343 err = "SMBus read byte";
345 case I2C_SMBUS_WORD_DATA:
346 if (!(funcs & I2C_FUNC_SMBUS_READ_WORD_DATA))
347 err = "SMBus read word";
350 case I2C_SMBUS_BLOCK_DATA:
351 if (!(funcs & I2C_FUNC_SMBUS_READ_BLOCK_DATA))
352 err = "SMBus block read";
355 case I2C_SMBUS_I2C_BLOCK_DATA:
356 if (!(funcs & I2C_FUNC_SMBUS_READ_I2C_BLOCK))
357 err = "I2C block read";
359 #endif /* ENABLE_I2CDUMP */
361 bb_error_msg_and_die("Programmer goofed!");
363 check_funcs_test_end(funcs, pec, err);
365 #endif /* ENABLE_I2CGET || ENABLE_I2CDUMP */
368 static void check_write_funcs(int fd, int mode, int pec)
371 const char *err = NULL;
373 get_funcs_matrix(fd, &funcs);
376 if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE))
377 err = "SMBus send byte";
380 case I2C_SMBUS_BYTE_DATA:
381 if (!(funcs & I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
382 err = "SMBus write byte";
385 case I2C_SMBUS_WORD_DATA:
386 if (!(funcs & I2C_FUNC_SMBUS_WRITE_WORD_DATA))
387 err = "SMBus write word";
390 case I2C_SMBUS_BLOCK_DATA:
391 if (!(funcs & I2C_FUNC_SMBUS_WRITE_BLOCK_DATA))
392 err = "SMBus block write";
394 case I2C_SMBUS_I2C_BLOCK_DATA:
395 if (!(funcs & I2C_FUNC_SMBUS_WRITE_I2C_BLOCK))
396 err = "I2C block write";
399 check_funcs_test_end(funcs, pec, err);
401 #endif /* ENABLE_I2CSET */
403 static void confirm_or_abort(void)
405 fprintf(stderr, "Continue? [y/N] ");
407 if (!bb_ask_confirmation())
408 bb_error_msg_and_die("aborting");
412 * Return only if user confirms the action, abort otherwise.
414 * The messages displayed here are much less elaborate than their i2c-tools
415 * counterparts - this is done for size reduction.
417 static void confirm_action(int bus_addr, int mode, int data_addr, int pec)
419 bb_error_msg("WARNING! This program can confuse your I2C bus");
421 /* Don't let the user break his/her EEPROMs */
422 if (bus_addr >= 0x50 && bus_addr <= 0x57 && pec) {
423 bb_error_msg_and_die("this is I2C not smbus - using PEC on I2C "
424 "devices may result in data loss, aborting");
427 if (mode == I2C_SMBUS_BYTE && data_addr >= 0 && pec)
428 bb_error_msg("WARNING! May interpret a write byte command "
429 "with PEC as a write byte data command");
432 bb_error_msg("PEC checking enabled");
438 //usage:#define i2cget_trivial_usage
439 //usage: "[-f] [-y] BUS CHIP-ADDRESS [DATA-ADDRESS [MODE]]"
440 //usage:#define i2cget_full_usage "\n\n"
441 //usage: "Read from I2C/SMBus chip registers\n"
442 //usage: "\n I2CBUS i2c bus number"
443 //usage: "\n ADDRESS 0x03 - 0x77"
444 //usage: "\nMODE is:"
445 //usage: "\n b read byte data (default)"
446 //usage: "\n w read word data"
447 //usage: "\n c write byte/read byte"
448 //usage: "\n Append p for SMBus PEC"
450 //usage: "\n -f force access"
451 //usage: "\n -y disable interactive mode"
452 int i2cget_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
453 int i2cget_main(int argc UNUSED_PARAM, char **argv)
455 const unsigned opt_f = (1 << 0), opt_y = (1 << 1);
456 const char *const optstr = "fy";
458 int bus_num, bus_addr, data_addr = -1, status;
459 int mode = I2C_SMBUS_BYTE, pec = 0, fd;
462 opt_complementary = "-2:?4"; /* from 2 to 4 args */
463 opts = getopt32(argv, optstr);
466 bus_num = i2c_bus_lookup(argv[0]);
467 bus_addr = i2c_parse_bus_addr(argv[1]);
470 data_addr = i2c_parse_data_addr(argv[2]);
471 mode = I2C_SMBUS_BYTE_DATA;
473 switch (argv[3][0]) {
474 case 'b': /* Already set */ break;
475 case 'w': mode = I2C_SMBUS_WORD_DATA; break;
476 case 'c': mode = I2C_SMBUS_BYTE; break;
478 bb_error_msg("invalid mode");
481 pec = argv[3][1] == 'p';
485 fd = i2c_dev_open(bus_num);
486 check_read_funcs(fd, mode, data_addr, pec);
487 i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
490 confirm_action(bus_addr, mode, data_addr, pec);
497 if (data_addr >= 0) {
498 status = i2c_smbus_write_byte(fd, data_addr);
500 bb_error_msg("warning - write failed");
502 status = i2c_smbus_read_byte(fd);
504 case I2C_SMBUS_WORD_DATA:
505 status = i2c_smbus_read_word_data(fd, data_addr);
507 default: /* I2C_SMBUS_BYTE_DATA */
508 status = i2c_smbus_read_byte_data(fd, data_addr);
513 bb_perror_msg_and_die("read failed");
515 printf("0x%0*x\n", mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
519 #endif /* ENABLE_I2CGET */
522 //usage:#define i2cset_trivial_usage
523 //usage: "[-f] [-y] [-m MASK] BUS CHIP-ADDR DATA-ADDR [VALUE] ... [MODE]"
524 //usage:#define i2cset_full_usage "\n\n"
525 //usage: "Set I2C registers\n"
526 //usage: "\n I2CBUS i2c bus number"
527 //usage: "\n ADDRESS 0x03 - 0x77"
528 //usage: "\nMODE is:"
529 //usage: "\n c byte, no value"
530 //usage: "\n b byte data (default)"
531 //usage: "\n w word data"
532 //usage: "\n i I2C block data"
533 //usage: "\n s SMBus block data"
534 //usage: "\n Append p for SMBus PEC"
536 //usage: "\n -f force access"
537 //usage: "\n -y disable interactive mode"
538 //usage: "\n -r read back and compare the result"
539 //usage: "\n -m MASK mask specifying which bits to write"
540 int i2cset_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
541 int i2cset_main(int argc, char **argv)
543 const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
544 opt_m = (1 << 2), opt_r = (1 << 3);
545 const char *const optstr = "fym:r";
547 int bus_num, bus_addr, data_addr, mode = I2C_SMBUS_BYTE, pec = 0;
548 int val, blen = 0, mask = 0, fd, status;
549 unsigned char block[I2C_SMBUS_BLOCK_MAX];
550 char *opt_m_arg = NULL;
553 opt_complementary = "-3"; /* from 3 to ? args */
554 opts = getopt32(argv, optstr, &opt_m_arg);
558 bus_num = i2c_bus_lookup(argv[0]);
559 bus_addr = i2c_parse_bus_addr(argv[1]);
560 data_addr = i2c_parse_data_addr(argv[2]);
563 if (!argv[4] && argv[3][0] != 'c') {
564 mode = I2C_SMBUS_BYTE_DATA; /* Implicit b */
566 switch (argv[argc-1][0]) {
567 case 'c': /* Already set */ break;
568 case 'b': mode = I2C_SMBUS_BYTE_DATA; break;
569 case 'w': mode = I2C_SMBUS_WORD_DATA; break;
570 case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
571 case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
573 bb_error_msg("invalid mode");
577 pec = argv[argc-1][1] == 'p';
578 if (mode == I2C_SMBUS_BLOCK_DATA ||
579 mode == I2C_SMBUS_I2C_BLOCK_DATA) {
580 if (pec && mode == I2C_SMBUS_I2C_BLOCK_DATA)
581 bb_error_msg_and_die(
582 "PEC not supported for I2C "
585 bb_error_msg_and_die(
586 "mask not supported for block "
592 /* Prepare the value(s) to be written according to current mode. */
594 case I2C_SMBUS_BYTE_DATA:
595 val = xstrtou_range(argv[3], 0, 0, 0xff);
597 case I2C_SMBUS_WORD_DATA:
598 val = xstrtou_range(argv[3], 0, 0, 0xffff);
600 case I2C_SMBUS_BLOCK_DATA:
601 case I2C_SMBUS_I2C_BLOCK_DATA:
602 for (blen = 3; blen < (argc - 1); blen++)
603 block[blen] = xstrtou_range(argv[blen], 0, 0, 0xff);
612 mask = xstrtou_range(opt_m_arg, 0, 0,
613 (mode == I2C_SMBUS_BYTE ||
614 mode == I2C_SMBUS_BYTE_DATA) ? 0xff : 0xffff);
617 fd = i2c_dev_open(bus_num);
618 check_write_funcs(fd, mode, pec);
619 i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
622 confirm_action(bus_addr, mode, data_addr, pec);
625 * If we're using mask - read the current value here and adjust the
626 * value to be written.
633 tmpval = i2c_smbus_read_byte(fd);
635 case I2C_SMBUS_WORD_DATA:
636 tmpval = i2c_smbus_read_word_data(fd, data_addr);
639 tmpval = i2c_smbus_read_byte_data(fd, data_addr);
643 bb_perror_msg_and_die("can't read old value");
645 val = (val & mask) | (tmpval & ~mask);
647 if (!(opts & opt_y)) {
648 bb_error_msg("old value 0x%0*x, write mask "
649 "0x%0*x, will write 0x%0*x to register "
651 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, tmpval,
652 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, mask,
653 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
664 status = i2c_smbus_write_byte(fd, data_addr);
666 case I2C_SMBUS_WORD_DATA:
667 status = i2c_smbus_write_word_data(fd, data_addr, val);
669 case I2C_SMBUS_BLOCK_DATA:
670 status = i2c_smbus_write_block_data(fd, data_addr,
673 case I2C_SMBUS_I2C_BLOCK_DATA:
674 status = i2c_smbus_write_i2c_block_data(fd, data_addr,
677 default: /* I2C_SMBUS_BYTE_DATA */
678 status = i2c_smbus_write_byte_data(fd, data_addr, val);
682 bb_perror_msg_and_die("write failed");
685 i2c_set_pec(fd, 0); /* Clear PEC. */
687 /* No readback required - we're done. */
693 status = i2c_smbus_read_byte(fd);
696 case I2C_SMBUS_WORD_DATA:
697 status = i2c_smbus_read_word_data(fd, data_addr);
699 default: /* I2C_SMBUS_BYTE_DATA */
700 status = i2c_smbus_read_byte_data(fd, data_addr);
704 puts("Warning - readback failed");
707 printf("Warning - data mismatch - wrote "
708 "0x%0*x, read back 0x%0*x\n",
709 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val,
710 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, status);
712 printf("Value 0x%0*x written, readback matched\n",
713 mode == I2C_SMBUS_WORD_DATA ? 4 : 2, val);
718 #endif /* ENABLE_I2CSET */
721 static int read_block_data(int buf_fd, int mode, int *block)
723 uint8_t cblock[I2C_SMBUS_BLOCK_MAX + I2CDUMP_NUM_REGS];
724 int res, blen = 0, tmp, i;
726 if (mode == I2C_SMBUS_BLOCK_DATA || mode == I2C_SMBUS_I2C_BLOCK_DATA) {
727 res = i2c_smbus_read_block_data(buf_fd, 0, cblock);
730 for (res = 0; res < I2CDUMP_NUM_REGS; res += tmp) {
731 tmp = i2c_smbus_read_i2c_block_data(
732 buf_fd, res, I2C_SMBUS_BLOCK_MAX,
735 bb_error_msg_and_die("block read failed");
739 if (res >= I2CDUMP_NUM_REGS)
740 res = I2CDUMP_NUM_REGS;
742 for (i = 0; i < res; i++)
743 block[i] = cblock[i];
745 if (mode != I2C_SMBUS_BLOCK_DATA)
746 for (i = res; i < I2CDUMP_NUM_REGS; i++)
753 /* Dump all but word data. */
754 static void dump_data(int bus_fd, int mode, unsigned first,
755 unsigned last, int *block, int blen)
759 puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f"
760 " 0123456789abcdef");
762 for (i = 0; i < I2CDUMP_NUM_REGS; i += 0x10) {
763 if (mode == I2C_SMBUS_BLOCK_DATA && i >= blen)
771 for (j = 0; j < 16; j++) {
773 /* Skip unwanted registers */
774 if (i+j < first || i+j > last) {
776 if (mode == I2C_SMBUS_WORD_DATA) {
784 case I2C_SMBUS_BYTE_DATA:
785 res = i2c_smbus_read_byte_data(bus_fd, i+j);
788 case I2C_SMBUS_WORD_DATA:
789 res = i2c_smbus_read_word_data(bus_fd, i+j);
794 block[i+j] = res & 0xff;
795 block[i+j+1] = res >> 8;
799 res = i2c_smbus_read_byte(bus_fd);
806 if (mode == I2C_SMBUS_BLOCK_DATA &&
809 } else if (res < 0) {
811 if (mode == I2C_SMBUS_WORD_DATA)
814 printf("%02x ", block[i+j]);
815 if (mode == I2C_SMBUS_WORD_DATA)
816 printf("%02x ", block[i+j+1]);
819 if (mode == I2C_SMBUS_WORD_DATA)
824 for (j = 0; j < 16; j++) {
825 if (mode == I2C_SMBUS_BLOCK_DATA && i+j >= blen)
827 /* Skip unwanted registers */
828 if (i+j < first || i+j > last) {
836 } else if (res == 0x00 || res == 0xff) {
838 } else if (res < 32 || res >= 127) {
848 static void dump_word_data(int bus_fd, unsigned first, unsigned last)
853 puts(" 0,8 1,9 2,a 3,b 4,c 5,d 6,e 7,f");
854 for (i = 0; i < 256; i += 8) {
861 for (j = 0; j < 8; j++) {
862 /* Skip unwanted registers. */
863 if (i+j < first || i+j > last) {
868 rv = i2c_smbus_read_word_data(bus_fd, i+j);
872 printf("%04x ", rv & 0xffff);
878 //usage:#define i2cdump_trivial_usage
879 //usage: "[-f] [-r FIRST-LAST] [-y] BUS ADDR [MODE]"
880 //usage:#define i2cdump_full_usage "\n\n"
881 //usage: "Examine I2C registers\n"
882 //usage: "\n I2CBUS i2c bus number"
883 //usage: "\n ADDRESS 0x03 - 0x77"
884 //usage: "\nMODE is:"
885 //usage: "\n b byte (default)"
887 //usage: "\n W word on even register addresses"
888 //usage: "\n i I2C block"
889 //usage: "\n s SMBus block"
890 //usage: "\n c consecutive byte"
891 //usage: "\n Append p for SMBus PEC"
893 //usage: "\n -f force access"
894 //usage: "\n -y disable interactive mode"
895 //usage: "\n -r limit the number of registers being accessed"
896 int i2cdump_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
897 int i2cdump_main(int argc UNUSED_PARAM, char **argv)
899 const unsigned opt_f = (1 << 0), opt_y = (1 << 1),
901 const char *const optstr = "fyr:";
903 int bus_num, bus_addr, mode = I2C_SMBUS_BYTE_DATA, even = 0, pec = 0;
904 unsigned first = 0x00, last = 0xff, opts;
905 int *block = (int *)bb_common_bufsiz1;
906 char *opt_r_str, *dash;
909 opt_complementary = "-2:?3"; /* from 2 to 3 args */
910 opts = getopt32(argv, optstr, &opt_r_str);
913 bus_num = i2c_bus_lookup(argv[0]);
914 bus_addr = i2c_parse_bus_addr(argv[1]);
917 switch (argv[2][0]) {
918 case 'b': /* Already set. */ break;
919 case 'c': mode = I2C_SMBUS_BYTE; break;
920 case 'w': mode = I2C_SMBUS_WORD_DATA; break;
922 mode = I2C_SMBUS_WORD_DATA;
925 case 's': mode = I2C_SMBUS_BLOCK_DATA; break;
926 case 'i': mode = I2C_SMBUS_I2C_BLOCK_DATA; break;
928 bb_error_msg_and_die("invalid mode");
931 if (argv[2][1] == 'p') {
932 if (argv[2][0] == 'W' || argv[2][0] == 'i') {
933 bb_error_msg_and_die(
934 "pec not supported for -W and -i");
942 first = strtol(opt_r_str, &dash, 0);
943 if (dash == opt_r_str || *dash != '-' || first > 0xff)
944 bb_error_msg_and_die("invalid range");
945 last = xstrtou_range(++dash, 0, first, 0xff);
947 /* Range is not available for every mode. */
950 case I2C_SMBUS_BYTE_DATA:
952 case I2C_SMBUS_WORD_DATA:
953 if (!even || (!(first % 2) && last % 2))
957 bb_error_msg_and_die(
958 "range not compatible with selected mode");
962 fd = i2c_dev_open(bus_num);
963 check_read_funcs(fd, mode, -1 /* data_addr */, pec);
964 i2c_set_slave_addr(fd, bus_addr, opts & opt_f);
970 confirm_action(bus_addr, mode, -1 /* data_addr */, pec);
972 /* All but word data. */
973 if (mode != I2C_SMBUS_WORD_DATA || even) {
974 blen = read_block_data(fd, mode, block);
976 if (mode == I2C_SMBUS_BYTE) {
977 res = i2c_smbus_write_byte(fd, first);
979 bb_perror_msg_and_die("write start address");
982 dump_data(fd, mode, first, last, block, blen);
984 dump_word_data(fd, first, last);
989 #endif /* ENABLE_I2CDUMP */
1004 static const struct adap_desc adap_descs[] = {
1006 .algo = "Dummy bus", },
1008 .algo = "ISA bus", },
1010 .algo = "I2C adapter", },
1012 .algo = "SMBus adapter", },
1021 static const struct i2c_func i2c_funcs_tab[] = {
1022 { .value = I2C_FUNC_I2C,
1024 { .value = I2C_FUNC_SMBUS_QUICK,
1025 .name = "SMBus Quick Command" },
1026 { .value = I2C_FUNC_SMBUS_WRITE_BYTE,
1027 .name = "SMBus Send Byte" },
1028 { .value = I2C_FUNC_SMBUS_READ_BYTE,
1029 .name = "SMBus Receive Byte" },
1030 { .value = I2C_FUNC_SMBUS_WRITE_BYTE_DATA,
1031 .name = "SMBus Write Byte" },
1032 { .value = I2C_FUNC_SMBUS_READ_BYTE_DATA,
1033 .name = "SMBus Read Byte" },
1034 { .value = I2C_FUNC_SMBUS_WRITE_WORD_DATA,
1035 .name = "SMBus Write Word" },
1036 { .value = I2C_FUNC_SMBUS_READ_WORD_DATA,
1037 .name = "SMBus Read Word" },
1038 { .value = I2C_FUNC_SMBUS_PROC_CALL,
1039 .name = "SMBus Process Call" },
1040 { .value = I2C_FUNC_SMBUS_WRITE_BLOCK_DATA,
1041 .name = "SMBus Block Write" },
1042 { .value = I2C_FUNC_SMBUS_READ_BLOCK_DATA,
1043 .name = "SMBus Block Read" },
1044 { .value = I2C_FUNC_SMBUS_BLOCK_PROC_CALL,
1045 .name = "SMBus Block Process Call" },
1046 { .value = I2C_FUNC_SMBUS_PEC,
1047 .name = "SMBus PEC" },
1048 { .value = I2C_FUNC_SMBUS_WRITE_I2C_BLOCK,
1049 .name = "I2C Block Write" },
1050 { .value = I2C_FUNC_SMBUS_READ_I2C_BLOCK,
1051 .name = "I2C Block Read" },
1052 { .value = 0, .name = NULL }
1055 static enum adapter_type i2cdetect_get_funcs(int bus)
1057 enum adapter_type ret;
1058 unsigned long funcs;
1061 fd = i2c_dev_open(bus);
1063 get_funcs_matrix(fd, &funcs);
1064 if (funcs & I2C_FUNC_I2C)
1066 else if (funcs & (I2C_FUNC_SMBUS_BYTE |
1067 I2C_FUNC_SMBUS_BYTE_DATA |
1068 I2C_FUNC_SMBUS_WORD_DATA))
1078 static void NORETURN list_i2c_busses_and_exit(void)
1080 const char *const i2cdev_path = "/sys/class/i2c-dev";
1082 char path[NAME_MAX], name[128];
1083 struct dirent *de, *subde;
1084 enum adapter_type adt;
1091 * XXX Upstream i2cdetect also looks for i2c bus info in /proc/bus/i2c,
1092 * but we won't bother since it's only useful on older kernels (before
1093 * 2.6.5). We expect sysfs to be present and mounted at /sys/.
1096 dir = xopendir(i2cdev_path);
1097 while ((de = readdir(dir))) {
1098 if (de->d_name[0] == '.')
1101 /* Simple version for ISA chips. */
1102 snprintf(path, NAME_MAX, "%s/%s/name",
1103 i2cdev_path, de->d_name);
1104 fp = fopen(path, "r");
1106 snprintf(path, NAME_MAX,
1107 "%s/%s/device/name",
1108 i2cdev_path, de->d_name);
1109 fp = fopen(path, "r");
1112 /* Non-ISA chips require the hard-way. */
1114 snprintf(path, NAME_MAX,
1115 "%s/%s/device/name",
1116 i2cdev_path, de->d_name);
1117 subdir = opendir(path);
1121 while ((subde = readdir(subdir))) {
1122 if (subde->d_name[0] == '.')
1125 if (is_prefixed_with(subde->d_name, "i2c-")) {
1126 snprintf(path, NAME_MAX,
1127 "%s/%s/device/%s/name",
1128 i2cdev_path, de->d_name,
1130 fp = fopen(path, "r");
1138 * Get the rest of the info and display a line
1141 memset(name, 0, sizeof(name));
1142 pos = fgets(name, sizeof(name), fp);
1147 pos = strchr(name, '\n');
1151 rv = sscanf(de->d_name, "i2c-%d", &bus);
1155 if (is_prefixed_with(name, "ISA"))
1158 adt = i2cdetect_get_funcs(bus);
1161 "i2c-%d\t%-10s\t%-32s\t%s\n",
1162 bus, adap_descs[adt].funcs,
1163 name, adap_descs[adt].algo);
1170 static void NORETURN no_support(const char *cmd)
1172 bb_error_msg_and_die("bus doesn't support %s", cmd);
1175 static void will_skip(const char *cmd)
1178 "warning: can't use %s command, "
1179 "will skip some addresses", cmd);
1182 //usage:#define i2cdetect_trivial_usage
1183 //usage: "[-F I2CBUS] [-l] [-y] [-a] [-q|-r] I2CBUS [FIRST LAST]"
1184 //usage:#define i2cdetect_full_usage "\n\n"
1185 //usage: "Detect I2C chips.\n"
1186 //usage: "\n I2CBUS i2c bus number"
1187 //usage: "\n FIRST and LAST limit the probing range"
1189 //usage: "\n -l output list of installed busses"
1190 //usage: "\n -y disable interactive mode"
1191 //usage: "\n -a force scanning of non-regular addresses"
1192 //usage: "\n -q use smbus quick write commands for probing (default)"
1193 //usage: "\n -r use smbus read byte commands for probing"
1194 //usage: "\n -F display list of functionalities"
1195 int i2cdetect_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
1196 int i2cdetect_main(int argc UNUSED_PARAM, char **argv)
1198 const unsigned opt_y = (1 << 0), opt_a = (1 << 1),
1199 opt_q = (1 << 2), opt_r = (1 << 3),
1200 opt_F = (1 << 4), opt_l = (1 << 5);
1201 const char *const optstr = "yaqrFl";
1203 int fd, bus_num, i, j, mode = I2CDETECT_MODE_AUTO, status;
1204 unsigned first = 0x03, last = 0x77, opts;
1205 unsigned long funcs;
1207 opt_complementary = "q--r:r--q:" /* mutually exclusive */
1208 "?3"; /* up to 3 args */
1209 opts = getopt32(argv, optstr);
1213 list_i2c_busses_and_exit();
1218 bus_num = i2c_bus_lookup(argv[0]);
1219 fd = i2c_dev_open(bus_num);
1220 get_funcs_matrix(fd, &funcs);
1223 /* Only list the functionalities. */
1224 printf("Functionalities implemented by bus #%d\n", bus_num);
1225 for (i = 0; i2c_funcs_tab[i].value; i++) {
1226 printf("%-32s %s\n", i2c_funcs_tab[i].name,
1227 funcs & i2c_funcs_tab[i].value ? "yes" : "no");
1230 return EXIT_SUCCESS;
1234 mode = I2CDETECT_MODE_READ;
1235 else if (opts & opt_q)
1236 mode = I2CDETECT_MODE_QUICK;
1243 /* Read address range. */
1245 first = xstrtou_range(argv[1], 16, first, last);
1247 last = xstrtou_range(argv[2], 16, first, last);
1250 if (!(funcs & (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_READ_BYTE))) {
1251 no_support("detection commands");
1253 if (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)) {
1254 no_support("SMBus Quick Write command");
1256 if (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE)) {
1257 no_support("SMBus Receive Byte command");
1260 if (mode == I2CDETECT_MODE_AUTO) {
1261 if (!(funcs & I2C_FUNC_SMBUS_QUICK))
1262 will_skip("SMBus Quick Write");
1263 if (!(funcs & I2C_FUNC_SMBUS_READ_BYTE))
1264 will_skip("SMBus Receive Byte");
1267 if (!(opts & opt_y))
1268 confirm_action(-1, -1, -1, 0);
1270 puts(" 0 1 2 3 4 5 6 7 8 9 a b c d e f");
1271 for (i = 0; i < 128; i += 16) {
1272 printf("%02x: ", i);
1273 for(j = 0; j < 16; j++) {
1276 if (mode == I2CDETECT_MODE_AUTO) {
1277 if ((i+j >= 0x30 && i+j <= 0x37) ||
1278 (i+j >= 0x50 && i+j <= 0x5F))
1279 mode = I2CDETECT_MODE_READ;
1281 mode = I2CDETECT_MODE_QUICK;
1284 /* Skip unwanted addresses. */
1287 || (mode == I2CDETECT_MODE_READ && !(funcs & I2C_FUNC_SMBUS_READ_BYTE))
1288 || (mode == I2CDETECT_MODE_QUICK && !(funcs & I2C_FUNC_SMBUS_QUICK)))
1294 status = ioctl(fd, I2C_SLAVE, itoptr(i + j));
1296 if (errno == EBUSY) {
1301 bb_perror_msg_and_die(
1302 "can't set address to 0x%02x", i + j);
1306 case I2CDETECT_MODE_READ:
1308 * This is known to lock SMBus on various
1309 * write-only chips (mainly clock chips).
1311 status = i2c_smbus_read_byte(fd);
1313 default: /* I2CDETECT_MODE_QUICK: */
1315 * This is known to corrupt the Atmel
1318 status = i2c_smbus_write_quick(fd,
1326 printf("%02x ", i+j);
1333 #endif /* ENABLE_I2CDETECT */