1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
10 #include <dm/of_extra.h>
13 #include <fdt_support.h>
14 #include <linux/libfdt.h>
16 #include <asm/sections.h>
17 #include <linux/ctype.h>
18 #include <linux/lzo.h>
20 DECLARE_GLOBAL_DATA_PTR;
23 * Here are the type we know about. One day we might allow drivers to
24 * register. For now we just put them here. The COMPAT macro allows us to
25 * turn this into a sparse list later, and keeps the ID with the name.
27 * NOTE: This list is basically a TODO list for things that need to be
28 * converted to driver model. So don't add new things here unless there is a
29 * good reason why driver-model conversion is infeasible. Examples include
30 * things which are used before driver model is available.
32 #define COMPAT(id, name) name
33 static const char * const compat_names[COMPAT_COUNT] = {
34 COMPAT(UNKNOWN, "<none>"),
35 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
36 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
37 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
38 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
39 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
40 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
41 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
42 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
43 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
44 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
45 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
49 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
50 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
51 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
52 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
53 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
54 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
55 COMPAT(INTEL_MICROCODE, "intel,microcode"),
56 COMPAT(AMS_AS3722, "ams,as3722"),
57 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
58 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
59 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
60 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
61 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
62 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
63 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
64 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
65 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
66 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
67 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
68 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
73 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
74 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
75 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
78 const char *fdtdec_get_compatible(enum fdt_compat_id id)
80 /* We allow reading of the 'unknown' ID for testing purposes */
81 assert(id >= 0 && id < COMPAT_COUNT);
82 return compat_names[id];
85 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
86 const char *prop_name, int index, int na,
87 int ns, fdt_size_t *sizep,
90 const fdt32_t *prop, *prop_end;
91 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
95 debug("%s: %s: ", __func__, prop_name);
97 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
98 debug("(na too large for fdt_addr_t type)\n");
99 return FDT_ADDR_T_NONE;
102 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
103 debug("(ns too large for fdt_size_t type)\n");
104 return FDT_ADDR_T_NONE;
107 prop = fdt_getprop(blob, node, prop_name, &len);
109 debug("(not found)\n");
110 return FDT_ADDR_T_NONE;
112 prop_end = prop + (len / sizeof(*prop));
114 prop_addr = prop + (index * (na + ns));
115 prop_size = prop_addr + na;
116 prop_after_size = prop_size + ns;
117 if (prop_after_size > prop_end) {
118 debug("(not enough data: expected >= %d cells, got %d cells)\n",
119 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
120 return FDT_ADDR_T_NONE;
123 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
125 addr = fdt_translate_address(blob, node, prop_addr);
128 addr = fdtdec_get_number(prop_addr, na);
131 *sizep = fdtdec_get_number(prop_size, ns);
132 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
133 (unsigned long long)*sizep);
135 debug("addr=%08llx\n", (unsigned long long)addr);
141 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
142 int node, const char *prop_name,
143 int index, fdt_size_t *sizep,
148 debug("%s: ", __func__);
150 na = fdt_address_cells(blob, parent);
152 debug("(bad #address-cells)\n");
153 return FDT_ADDR_T_NONE;
156 ns = fdt_size_cells(blob, parent);
158 debug("(bad #size-cells)\n");
159 return FDT_ADDR_T_NONE;
162 debug("na=%d, ns=%d, ", na, ns);
164 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
165 ns, sizep, translate);
168 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
169 const char *prop_name, int index,
175 debug("%s: ", __func__);
177 parent = fdt_parent_offset(blob, node);
179 debug("(no parent found)\n");
180 return FDT_ADDR_T_NONE;
183 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
184 index, sizep, translate);
187 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
188 const char *prop_name, fdt_size_t *sizep)
190 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
192 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
193 sizeof(fdt_addr_t) / sizeof(fdt32_t),
197 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
199 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
202 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
203 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
204 const char *prop_name, struct fdt_pci_addr *addr)
210 debug("%s: %s: ", __func__, prop_name);
213 * If we follow the pci bus bindings strictly, we should check
214 * the value of the node's parent node's #address-cells and
215 * #size-cells. They need to be 3 and 2 accordingly. However,
216 * for simplicity we skip the check here.
218 cell = fdt_getprop(blob, node, prop_name, &len);
222 if ((len % FDT_PCI_REG_SIZE) == 0) {
223 int num = len / FDT_PCI_REG_SIZE;
226 for (i = 0; i < num; i++) {
227 debug("pci address #%d: %08lx %08lx %08lx\n", i,
228 (ulong)fdt32_to_cpu(cell[0]),
229 (ulong)fdt32_to_cpu(cell[1]),
230 (ulong)fdt32_to_cpu(cell[2]));
231 if ((fdt32_to_cpu(*cell) & type) == type) {
232 addr->phys_hi = fdt32_to_cpu(cell[0]);
233 addr->phys_mid = fdt32_to_cpu(cell[1]);
234 addr->phys_lo = fdt32_to_cpu(cell[1]);
238 cell += (FDT_PCI_ADDR_CELLS +
253 debug("(not found)\n");
257 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
259 const char *list, *end;
262 list = fdt_getprop(blob, node, "compatible", &len);
269 if (len >= strlen("pciVVVV,DDDD")) {
270 char *s = strstr(list, "pci");
273 * check if the string is something like pciVVVV,DDDD.RR
274 * or just pciVVVV,DDDD
276 if (s && s[7] == ',' &&
277 (s[12] == '.' || s[12] == 0)) {
279 *vendor = simple_strtol(s, NULL, 16);
282 *device = simple_strtol(s, NULL, 16);
293 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
298 /* extract the bar number from fdt_pci_addr */
299 barnum = addr->phys_hi & 0xff;
300 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
303 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
304 *bar = dm_pci_read_bar32(dev, barnum);
310 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
311 uint64_t default_val)
313 const uint64_t *cell64;
316 cell64 = fdt_getprop(blob, node, prop_name, &length);
317 if (!cell64 || length < sizeof(*cell64))
320 return fdt64_to_cpu(*cell64);
323 int fdtdec_get_is_enabled(const void *blob, int node)
328 * It should say "okay", so only allow that. Some fdts use "ok" but
329 * this is a bug. Please fix your device tree source file. See here
332 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
334 cell = fdt_getprop(blob, node, "status", NULL);
336 return strcmp(cell, "okay") == 0;
340 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
342 enum fdt_compat_id id;
344 /* Search our drivers */
345 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
346 if (fdt_node_check_compatible(blob, node,
347 compat_names[id]) == 0)
349 return COMPAT_UNKNOWN;
352 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
354 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
357 int fdtdec_next_compatible_subnode(const void *blob, int node,
358 enum fdt_compat_id id, int *depthp)
361 node = fdt_next_node(blob, node, depthp);
362 } while (*depthp > 1);
364 /* If this is a direct subnode, and compatible, return it */
365 if (*depthp == 1 && 0 == fdt_node_check_compatible(
366 blob, node, compat_names[id]))
369 return -FDT_ERR_NOTFOUND;
372 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
375 #define MAX_STR_LEN 20
376 char str[MAX_STR_LEN + 20];
379 /* snprintf() is not available */
380 assert(strlen(name) < MAX_STR_LEN);
381 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
382 node = fdt_path_offset(blob, str);
385 err = fdt_node_check_compatible(blob, node, compat_names[id]);
389 return -FDT_ERR_NOTFOUND;
394 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
395 enum fdt_compat_id id, int *node_list,
398 memset(node_list, '\0', sizeof(*node_list) * maxcount);
400 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
403 /* TODO: Can we tighten this code up a little? */
404 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
405 enum fdt_compat_id id, int *node_list,
408 int name_len = strlen(name);
416 /* find the alias node if present */
417 alias_node = fdt_path_offset(blob, "/aliases");
420 * start with nothing, and we can assume that the root node can't
423 memset(nodes, '\0', sizeof(nodes));
425 /* First find all the compatible nodes */
426 for (node = count = 0; node >= 0 && count < maxcount;) {
427 node = fdtdec_next_compatible(blob, node, id);
429 nodes[count++] = node;
432 debug("%s: warning: maxcount exceeded with alias '%s'\n",
435 /* Now find all the aliases */
436 for (offset = fdt_first_property_offset(blob, alias_node);
438 offset = fdt_next_property_offset(blob, offset)) {
439 const struct fdt_property *prop;
445 prop = fdt_get_property_by_offset(blob, offset, NULL);
446 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
447 if (prop->len && 0 == strncmp(path, name, name_len))
448 node = fdt_path_offset(blob, prop->data);
452 /* Get the alias number */
453 number = simple_strtoul(path + name_len, NULL, 10);
454 if (number < 0 || number >= maxcount) {
455 debug("%s: warning: alias '%s' is out of range\n",
460 /* Make sure the node we found is actually in our list! */
462 for (j = 0; j < count; j++)
463 if (nodes[j] == node) {
469 debug("%s: warning: alias '%s' points to a node "
470 "'%s' that is missing or is not compatible "
471 " with '%s'\n", __func__, path,
472 fdt_get_name(blob, node, NULL),
478 * Add this node to our list in the right place, and mark
481 if (fdtdec_get_is_enabled(blob, node)) {
482 if (node_list[number]) {
483 debug("%s: warning: alias '%s' requires that "
484 "a node be placed in the list in a "
485 "position which is already filled by "
486 "node '%s'\n", __func__, path,
487 fdt_get_name(blob, node, NULL));
490 node_list[number] = node;
491 if (number >= num_found)
492 num_found = number + 1;
497 /* Add any nodes not mentioned by an alias */
498 for (i = j = 0; i < maxcount; i++) {
500 for (; j < maxcount; j++)
502 fdtdec_get_is_enabled(blob, nodes[j]))
505 /* Have we run out of nodes to add? */
509 assert(!node_list[i]);
510 node_list[i] = nodes[j++];
519 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
522 int base_len = strlen(base);
523 const char *find_name;
528 find_name = fdt_get_name(blob, offset, &find_namelen);
529 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
531 aliases = fdt_path_offset(blob, "/aliases");
532 for (prop_offset = fdt_first_property_offset(blob, aliases);
534 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
540 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
541 debug(" - %s, %s\n", name, prop);
542 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
543 strncmp(name, base, base_len))
546 slash = strrchr(prop, '/');
547 if (strcmp(slash + 1, find_name))
549 val = trailing_strtol(name);
552 debug("Found seq %d\n", *seqp);
557 debug("Not found\n");
561 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
567 chosen_node = fdt_path_offset(blob, "/chosen");
568 return fdt_getprop(blob, chosen_node, name, NULL);
571 int fdtdec_get_chosen_node(const void *blob, const char *name)
575 prop = fdtdec_get_chosen_prop(blob, name);
577 return -FDT_ERR_NOTFOUND;
578 return fdt_path_offset(blob, prop);
581 int fdtdec_check_fdt(void)
584 * We must have an FDT, but we cannot panic() yet since the console
585 * is not ready. So for now, just assert(). Boards which need an early
586 * FDT (prior to console ready) will need to make their own
587 * arrangements and do their own checks.
589 assert(!fdtdec_prepare_fdt());
594 * This function is a little odd in that it accesses global data. At some
595 * point if the architecture board.c files merge this will make more sense.
596 * Even now, it is common code.
598 int fdtdec_prepare_fdt(void)
600 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
601 fdt_check_header(gd->fdt_blob)) {
602 #ifdef CONFIG_SPL_BUILD
603 puts("Missing DTB\n");
605 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
608 printf("fdt_blob=%p\n", gd->fdt_blob);
609 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
619 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
624 debug("%s: %s\n", __func__, prop_name);
625 phandle = fdt_getprop(blob, node, prop_name, NULL);
627 return -FDT_ERR_NOTFOUND;
629 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
634 * Look up a property in a node and check that it has a minimum length.
636 * @param blob FDT blob
637 * @param node node to examine
638 * @param prop_name name of property to find
639 * @param min_len minimum property length in bytes
640 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
641 found, or -FDT_ERR_BADLAYOUT if not enough data
642 * @return pointer to cell, which is only valid if err == 0
644 static const void *get_prop_check_min_len(const void *blob, int node,
645 const char *prop_name, int min_len,
651 debug("%s: %s\n", __func__, prop_name);
652 cell = fdt_getprop(blob, node, prop_name, &len);
654 *err = -FDT_ERR_NOTFOUND;
655 else if (len < min_len)
656 *err = -FDT_ERR_BADLAYOUT;
662 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
663 u32 *array, int count)
668 debug("%s: %s\n", __func__, prop_name);
669 cell = get_prop_check_min_len(blob, node, prop_name,
670 sizeof(u32) * count, &err);
674 for (i = 0; i < count; i++)
675 array[i] = fdt32_to_cpu(cell[i]);
680 int fdtdec_get_int_array_count(const void *blob, int node,
681 const char *prop_name, u32 *array, int count)
687 debug("%s: %s\n", __func__, prop_name);
688 cell = fdt_getprop(blob, node, prop_name, &len);
690 return -FDT_ERR_NOTFOUND;
691 elems = len / sizeof(u32);
694 for (i = 0; i < count; i++)
695 array[i] = fdt32_to_cpu(cell[i]);
700 const u32 *fdtdec_locate_array(const void *blob, int node,
701 const char *prop_name, int count)
706 cell = get_prop_check_min_len(blob, node, prop_name,
707 sizeof(u32) * count, &err);
708 return err ? NULL : cell;
711 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
716 debug("%s: %s\n", __func__, prop_name);
717 cell = fdt_getprop(blob, node, prop_name, &len);
721 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
722 const char *list_name,
723 const char *cells_name,
724 int cell_count, int index,
725 struct fdtdec_phandle_args *out_args)
727 const __be32 *list, *list_end;
728 int rc = 0, size, cur_index = 0;
733 /* Retrieve the phandle list property */
734 list = fdt_getprop(blob, src_node, list_name, &size);
737 list_end = list + size / sizeof(*list);
739 /* Loop over the phandles until all the requested entry is found */
740 while (list < list_end) {
745 * If phandle is 0, then it is an empty entry with no
746 * arguments. Skip forward to the next entry.
748 phandle = be32_to_cpup(list++);
751 * Find the provider node and parse the #*-cells
752 * property to determine the argument length.
754 * This is not needed if the cell count is hard-coded
755 * (i.e. cells_name not set, but cell_count is set),
756 * except when we're going to return the found node
759 if (cells_name || cur_index == index) {
760 node = fdt_node_offset_by_phandle(blob,
763 debug("%s: could not find phandle\n",
764 fdt_get_name(blob, src_node,
771 count = fdtdec_get_int(blob, node, cells_name,
774 debug("%s: could not get %s for %s\n",
775 fdt_get_name(blob, src_node,
778 fdt_get_name(blob, node,
787 * Make sure that the arguments actually fit in the
788 * remaining property data length
790 if (list + count > list_end) {
791 debug("%s: arguments longer than property\n",
792 fdt_get_name(blob, src_node, NULL));
798 * All of the error cases above bail out of the loop, so at
799 * this point, the parsing is successful. If the requested
800 * index matches, then fill the out_args structure and return,
801 * or return -ENOENT for an empty entry.
804 if (cur_index == index) {
811 if (count > MAX_PHANDLE_ARGS) {
812 debug("%s: too many arguments %d\n",
813 fdt_get_name(blob, src_node,
815 count = MAX_PHANDLE_ARGS;
817 out_args->node = node;
818 out_args->args_count = count;
819 for (i = 0; i < count; i++) {
821 be32_to_cpup(list++);
825 /* Found it! return success */
835 * Result will be one of:
836 * -ENOENT : index is for empty phandle
837 * -EINVAL : parsing error on data
838 * [1..n] : Number of phandle (count mode; when index = -1)
840 rc = index < 0 ? cur_index : -ENOENT;
845 int fdtdec_get_child_count(const void *blob, int node)
850 fdt_for_each_subnode(subnode, blob, node)
856 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
857 u8 *array, int count)
862 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
864 memcpy(array, cell, count);
868 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
869 const char *prop_name, int count)
874 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
880 int fdtdec_get_config_int(const void *blob, const char *prop_name,
885 debug("%s: %s\n", __func__, prop_name);
886 config_node = fdt_path_offset(blob, "/config");
889 return fdtdec_get_int(blob, config_node, prop_name, default_val);
892 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
897 debug("%s: %s\n", __func__, prop_name);
898 config_node = fdt_path_offset(blob, "/config");
901 prop = fdt_get_property(blob, config_node, prop_name, NULL);
906 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
912 debug("%s: %s\n", __func__, prop_name);
913 nodeoffset = fdt_path_offset(blob, "/config");
917 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
921 return (char *)nodep;
924 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
925 fdt_addr_t *basep, fdt_size_t *sizep)
927 const fdt_addr_t *cell;
930 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
932 cell = fdt_getprop(blob, node, prop_name, &len);
933 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
934 debug("cell=%p, len=%d\n", cell, len);
938 *basep = fdt_addr_to_cpu(*cell);
939 *sizep = fdt_size_to_cpu(cell[1]);
940 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
946 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
951 number = (number << 32) | fdt32_to_cpu(*ptr++);
956 int fdt_get_resource(const void *fdt, int node, const char *property,
957 unsigned int index, struct fdt_resource *res)
959 const fdt32_t *ptr, *end;
960 int na, ns, len, parent;
963 parent = fdt_parent_offset(fdt, node);
967 na = fdt_address_cells(fdt, parent);
968 ns = fdt_size_cells(fdt, parent);
970 ptr = fdt_getprop(fdt, node, property, &len);
974 end = ptr + len / sizeof(*ptr);
976 while (ptr + na + ns <= end) {
978 res->start = fdtdec_get_number(ptr, na);
979 res->end = res->start;
980 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
988 return -FDT_ERR_NOTFOUND;
991 int fdt_get_named_resource(const void *fdt, int node, const char *property,
992 const char *prop_names, const char *name,
993 struct fdt_resource *res)
997 index = fdt_stringlist_search(fdt, node, prop_names, name);
1001 return fdt_get_resource(fdt, node, property, index, res);
1004 int fdtdec_decode_memory_region(const void *blob, int config_node,
1005 const char *mem_type, const char *suffix,
1006 fdt_addr_t *basep, fdt_size_t *sizep)
1010 fdt_size_t size, offset_size;
1011 fdt_addr_t base, offset;
1014 if (config_node == -1) {
1015 config_node = fdt_path_offset(blob, "/config");
1016 if (config_node < 0) {
1017 debug("%s: Cannot find /config node\n", __func__);
1024 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1026 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1028 debug("%s: No memory type for '%s', using /memory\n", __func__,
1033 node = fdt_path_offset(blob, mem);
1035 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1036 fdt_strerror(node));
1041 * Not strictly correct - the memory may have multiple banks. We just
1044 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1045 debug("%s: Failed to decode memory region %s\n", __func__,
1050 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1052 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1054 debug("%s: Failed to decode memory region '%s'\n", __func__,
1059 *basep = base + offset;
1060 *sizep = offset_size;
1065 static int decode_timing_property(const void *blob, int node, const char *name,
1066 struct timing_entry *result)
1068 int length, ret = 0;
1071 prop = fdt_getprop(blob, node, name, &length);
1073 debug("%s: could not find property %s\n",
1074 fdt_get_name(blob, node, NULL), name);
1078 if (length == sizeof(u32)) {
1079 result->typ = fdtdec_get_int(blob, node, name, 0);
1080 result->min = result->typ;
1081 result->max = result->typ;
1083 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1089 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1090 struct display_timing *dt)
1092 int i, node, timings_node;
1096 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1097 if (timings_node < 0)
1098 return timings_node;
1100 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1101 node > 0 && i != index;
1102 node = fdt_next_subnode(blob, node))
1108 memset(dt, 0, sizeof(*dt));
1110 ret |= decode_timing_property(blob, node, "hback-porch",
1112 ret |= decode_timing_property(blob, node, "hfront-porch",
1114 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1115 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1116 ret |= decode_timing_property(blob, node, "vback-porch",
1118 ret |= decode_timing_property(blob, node, "vfront-porch",
1120 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1121 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1122 ret |= decode_timing_property(blob, node, "clock-frequency",
1126 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1128 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1129 DISPLAY_FLAGS_VSYNC_LOW;
1131 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1133 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1134 DISPLAY_FLAGS_HSYNC_LOW;
1136 val = fdtdec_get_int(blob, node, "de-active", -1);
1138 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1139 DISPLAY_FLAGS_DE_LOW;
1141 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1143 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1144 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1147 if (fdtdec_get_bool(blob, node, "interlaced"))
1148 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1149 if (fdtdec_get_bool(blob, node, "doublescan"))
1150 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1151 if (fdtdec_get_bool(blob, node, "doubleclk"))
1152 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1157 int fdtdec_setup_mem_size_base(void)
1160 struct fdt_resource res;
1162 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1164 debug("%s: Missing /memory node\n", __func__);
1168 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1170 debug("%s: Unable to decode first memory bank\n", __func__);
1174 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1175 gd->ram_base = (unsigned long)res.start;
1176 debug("%s: Initial DRAM size %llx\n", __func__,
1177 (unsigned long long)gd->ram_size);
1182 #if defined(CONFIG_NR_DRAM_BANKS)
1184 static int get_next_memory_node(const void *blob, int mem)
1187 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
1188 "device_type", "memory", 7);
1189 } while (!fdtdec_get_is_enabled(blob, mem));
1194 int fdtdec_setup_memory_banksize(void)
1196 int bank, ret, mem, reg = 0;
1197 struct fdt_resource res;
1199 mem = get_next_memory_node(gd->fdt_blob, -1);
1201 debug("%s: Missing /memory node\n", __func__);
1205 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1206 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1207 if (ret == -FDT_ERR_NOTFOUND) {
1209 mem = get_next_memory_node(gd->fdt_blob, mem);
1210 if (mem == -FDT_ERR_NOTFOUND)
1213 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1214 if (ret == -FDT_ERR_NOTFOUND)
1221 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1222 gd->bd->bi_dram[bank].size =
1223 (phys_size_t)(res.end - res.start + 1);
1225 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1227 (unsigned long long)gd->bd->bi_dram[bank].start,
1228 (unsigned long long)gd->bd->bi_dram[bank].size);
1235 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1236 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1237 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1238 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1240 size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
1241 ulong sz_in = sz_src;
1245 if (CONFIG_IS_ENABLED(GZIP))
1246 if (gzip_parse_header(src, sz_in) < 0)
1248 if (CONFIG_IS_ENABLED(LZO))
1249 if (!lzop_is_valid_header(src))
1252 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1253 dst = malloc(sz_out);
1255 puts("uncompress_blob: Unable to allocate memory\n");
1259 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1260 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1266 if (CONFIG_IS_ENABLED(GZIP))
1267 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1268 else if (CONFIG_IS_ENABLED(LZO))
1269 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1272 /* not a valid compressed blob */
1273 puts("uncompress_blob: Unable to uncompress\n");
1274 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1282 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1289 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1291 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1292 * provide and/or fixup the fdt.
1294 __weak void *board_fdt_blob_setup(void)
1296 void *fdt_blob = NULL;
1297 #ifdef CONFIG_SPL_BUILD
1298 /* FDT is at end of BSS unless it is in a different memory region */
1299 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1300 fdt_blob = (ulong *)&_image_binary_end;
1302 fdt_blob = (ulong *)&__bss_end;
1304 /* FDT is at end of image */
1305 fdt_blob = (ulong *)&_end;
1311 int fdtdec_setup(void)
1313 #if CONFIG_IS_ENABLED(OF_CONTROL)
1314 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1317 # ifdef CONFIG_OF_EMBED
1318 /* Get a pointer to the FDT */
1319 # ifdef CONFIG_SPL_BUILD
1320 gd->fdt_blob = __dtb_dt_spl_begin;
1322 gd->fdt_blob = __dtb_dt_begin;
1324 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1325 /* Allow the board to override the fdt address. */
1326 gd->fdt_blob = board_fdt_blob_setup();
1327 # elif defined(CONFIG_OF_HOSTFILE)
1328 if (sandbox_read_fdt_from_file()) {
1329 puts("Failed to read control FDT\n");
1333 # ifndef CONFIG_SPL_BUILD
1334 /* Allow the early environment to override the fdt address */
1335 # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
1336 gd->fdt_blob = (void *)prior_stage_fdt_address;
1338 gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
1339 (uintptr_t)gd->fdt_blob);
1343 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1345 * Try and uncompress the blob.
1346 * Unfortunately there is no way to know how big the input blob really
1347 * is. So let us set the maximum input size arbitrarily high. 16MB
1348 * ought to be more than enough for packed DTBs.
1350 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1351 gd->fdt_blob = fdt_blob;
1354 * Check if blob is a FIT images containings DTBs.
1355 * If so, pick the most relevant
1357 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1359 gd->fdt_blob = fdt_blob;
1363 return fdtdec_prepare_fdt();
1366 #ifdef CONFIG_NR_DRAM_BANKS
1367 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1368 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1370 int addr_cells, size_cells;
1371 const u32 *cell, *end;
1372 u64 total_size, size, addr;
1378 debug("%s: board_id=%d\n", __func__, board_id);
1381 node = fdt_path_offset(blob, area);
1383 debug("No %s node found\n", area);
1387 cell = fdt_getprop(blob, node, "reg", &len);
1389 debug("No reg property found\n");
1393 addr_cells = fdt_address_cells(blob, node);
1394 size_cells = fdt_size_cells(blob, node);
1396 /* Check the board id and mask */
1397 for (child = fdt_first_subnode(blob, node);
1399 child = fdt_next_subnode(blob, child)) {
1400 int match_mask, match_value;
1402 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1403 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1405 if (match_value >= 0 &&
1406 ((board_id & match_mask) == match_value)) {
1407 /* Found matching mask */
1408 debug("Found matching mask %d\n", match_mask);
1410 cell = fdt_getprop(blob, node, "reg", &len);
1412 debug("No memory-banks property found\n");
1418 /* Note: if no matching subnode was found we use the parent node */
1421 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1422 CONFIG_NR_DRAM_BANKS);
1425 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1428 end = cell + len / 4 - addr_cells - size_cells;
1429 debug("cell at %p, end %p\n", cell, end);
1430 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1434 if (addr_cells == 2)
1435 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1436 addr += fdt32_to_cpu(*cell++);
1438 bd->bi_dram[bank].start = addr;
1440 *basep = (phys_addr_t)addr;
1443 if (size_cells == 2)
1444 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1445 size += fdt32_to_cpu(*cell++);
1450 debug("Auto-sizing %llx, size %llx: ", addr, size);
1451 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1452 if (new_size == size) {
1455 debug("sized to %llx\n", new_size);
1461 bd->bi_dram[bank].size = size;
1465 debug("Memory size %llu\n", total_size);
1467 *sizep = (phys_size_t)total_size;
1471 #endif /* CONFIG_NR_DRAM_BANKS */
1473 #endif /* !USE_HOSTCC */