1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014 NVIDIA Corporation
6 #ifndef __SOC_TEGRA_MC_H__
7 #define __SOC_TEGRA_MC_H__
10 #include <linux/reset-controller.h>
11 #include <linux/types.h>
17 struct tegra_smmu_enable {
22 struct tegra_mc_timing {
28 /* latency allowance */
36 struct tegra_mc_client {
41 unsigned int fifo_size;
43 struct tegra_smmu_enable smmu;
44 struct tegra_mc_la la;
47 struct tegra_smmu_swgroup {
53 struct tegra_smmu_group_soc {
55 const unsigned int *swgroups;
56 unsigned int num_swgroups;
59 struct tegra_smmu_soc {
60 const struct tegra_mc_client *clients;
61 unsigned int num_clients;
63 const struct tegra_smmu_swgroup *swgroups;
64 unsigned int num_swgroups;
66 const struct tegra_smmu_group_soc *groups;
67 unsigned int num_groups;
69 bool supports_round_robin_arbitration;
70 bool supports_request_limit;
72 unsigned int num_tlb_lines;
73 unsigned int num_asids;
80 #ifdef CONFIG_TEGRA_IOMMU_SMMU
81 struct tegra_smmu *tegra_smmu_probe(struct device *dev,
82 const struct tegra_smmu_soc *soc,
84 void tegra_smmu_remove(struct tegra_smmu *smmu);
86 static inline struct tegra_smmu *
87 tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
93 static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
98 #ifdef CONFIG_TEGRA_IOMMU_GART
99 struct gart_device *tegra_gart_probe(struct device *dev, struct tegra_mc *mc);
100 int tegra_gart_suspend(struct gart_device *gart);
101 int tegra_gart_resume(struct gart_device *gart);
103 static inline struct gart_device *
104 tegra_gart_probe(struct device *dev, struct tegra_mc *mc)
106 return ERR_PTR(-ENODEV);
109 static inline int tegra_gart_suspend(struct gart_device *gart)
114 static inline int tegra_gart_resume(struct gart_device *gart)
120 struct tegra_mc_reset {
123 unsigned int control;
129 struct tegra_mc_reset_ops {
130 int (*hotreset_assert)(struct tegra_mc *mc,
131 const struct tegra_mc_reset *rst);
132 int (*hotreset_deassert)(struct tegra_mc *mc,
133 const struct tegra_mc_reset *rst);
134 int (*block_dma)(struct tegra_mc *mc,
135 const struct tegra_mc_reset *rst);
136 bool (*dma_idling)(struct tegra_mc *mc,
137 const struct tegra_mc_reset *rst);
138 int (*unblock_dma)(struct tegra_mc *mc,
139 const struct tegra_mc_reset *rst);
140 int (*reset_status)(struct tegra_mc *mc,
141 const struct tegra_mc_reset *rst);
144 struct tegra_mc_soc {
145 const struct tegra_mc_client *clients;
146 unsigned int num_clients;
148 const unsigned long *emem_regs;
149 unsigned int num_emem_regs;
151 unsigned int num_address_bits;
152 unsigned int atom_size;
156 const struct tegra_smmu_soc *smmu;
160 const struct tegra_mc_reset_ops *reset_ops;
161 const struct tegra_mc_reset *resets;
162 unsigned int num_resets;
167 struct tegra_smmu *smmu;
168 struct gart_device *gart;
173 const struct tegra_mc_soc *soc;
176 struct tegra_mc_timing *timings;
177 unsigned int num_timings;
179 struct reset_controller_dev reset;
184 void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
185 unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
187 #endif /* __SOC_TEGRA_MC_H__ */