1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Texas Instruments System Control Interface Protocol
4 * Based on include/linux/soc/ti/ti_sci_protocol.h from Linux.
6 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
8 * Lokesh Vutla <lokeshvutla@ti.com>
11 #ifndef __TISCI_PROTOCOL_H
12 #define __TISCI_PROTOCOL_H
15 * struct ti_sci_version_info - version information structure
16 * @abi_major: Major ABI version. Change here implies risk of backward
17 * compatibility break.
18 * @abi_minor: Minor ABI version. Change here implies new feature addition,
19 * or compatible change in ABI.
20 * @firmware_revision: Firmware revision (not usually used).
21 * @firmware_description: Firmware description (not usually used).
23 struct ti_sci_version_info {
26 u16 firmware_revision;
27 char firmware_description[32];
33 * struct ti_sci_board_ops - Board config operations
34 * @board_config: Command to set the board configuration
35 * Returns 0 for successful exclusive request, else returns
36 * corresponding error message.
37 * @board_config_rm: Command to set the board resource management
39 * Returns 0 for successful exclusive request, else returns
40 * corresponding error message.
41 * @board_config_security: Command to set the board security configuration
42 * Returns 0 for successful exclusive request, else returns
43 * corresponding error message.
44 * @board_config_pm: Command to trigger and set the board power and clock
45 * management related configuration
46 * Returns 0 for successful exclusive request, else returns
47 * corresponding error message.
49 struct ti_sci_board_ops {
50 int (*board_config)(const struct ti_sci_handle *handle,
52 int (*board_config_rm)(const struct ti_sci_handle *handle,
54 int (*board_config_security)(const struct ti_sci_handle *handle,
56 int (*board_config_pm)(const struct ti_sci_handle *handle,
61 * struct ti_sci_dev_ops - Device control operations
62 * @get_device: Command to request for device managed by TISCI
63 * Returns 0 for successful exclusive request, else returns
64 * corresponding error message.
65 * @idle_device: Command to idle a device managed by TISCI
66 * Returns 0 for successful exclusive request, else returns
67 * corresponding error message.
68 * @put_device: Command to release a device managed by TISCI
69 * Returns 0 for successful release, else returns corresponding
71 * @is_valid: Check if the device ID is a valid ID.
72 * Returns 0 if the ID is valid, else returns corresponding error.
73 * @get_context_loss_count: Command to retrieve context loss counter - this
74 * increments every time the device looses context. Overflow
76 * - count: pointer to u32 which will retrieve counter
77 * Returns 0 for successful information request and count has
78 * proper data, else returns corresponding error message.
79 * @is_idle: Reports back about device idle state
80 * - req_state: Returns requested idle state
81 * Returns 0 for successful information request and req_state and
82 * current_state has proper data, else returns corresponding error
84 * @is_stop: Reports back about device stop state
85 * - req_state: Returns requested stop state
86 * - current_state: Returns current stop state
87 * Returns 0 for successful information request and req_state and
88 * current_state has proper data, else returns corresponding error
90 * @is_on: Reports back about device ON(or active) state
91 * - req_state: Returns requested ON state
92 * - current_state: Returns current ON state
93 * Returns 0 for successful information request and req_state and
94 * current_state has proper data, else returns corresponding error
96 * @is_transitioning: Reports back if the device is in the middle of transition
98 * -current_state: Returns 'true' if currently transitioning.
99 * @set_device_resets: Command to configure resets for device managed by TISCI.
100 * -reset_state: Device specific reset bit field
101 * Returns 0 for successful request, else returns
102 * corresponding error message.
103 * @get_device_resets: Command to read state of resets for device managed
105 * -reset_state: pointer to u32 which will retrieve resets
106 * Returns 0 for successful request, else returns
107 * corresponding error message.
109 * NOTE: for all these functions, the following parameters are generic in
111 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
112 * -id: Device Identifier
114 * Request for the device - NOTE: the client MUST maintain integrity of
115 * usage count by balancing get_device with put_device. No refcounting is
116 * managed by driver for that purpose.
118 struct ti_sci_dev_ops {
119 int (*get_device)(const struct ti_sci_handle *handle, u32 id);
120 int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
121 int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
122 int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
124 int (*put_device)(const struct ti_sci_handle *handle, u32 id);
125 int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
126 int (*get_context_loss_count)(const struct ti_sci_handle *handle,
128 int (*is_idle)(const struct ti_sci_handle *handle, u32 id,
129 bool *requested_state);
130 int (*is_stop)(const struct ti_sci_handle *handle, u32 id,
131 bool *req_state, bool *current_state);
132 int (*is_on)(const struct ti_sci_handle *handle, u32 id,
133 bool *req_state, bool *current_state);
134 int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id,
135 bool *current_state);
136 int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id,
138 int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id,
143 * struct ti_sci_clk_ops - Clock control operations
144 * @get_clock: Request for activation of clock and manage by processor
145 * - needs_ssc: 'true' if Spread Spectrum clock is desired.
146 * - can_change_freq: 'true' if frequency change is desired.
147 * - enable_input_term: 'true' if input termination is desired.
148 * @idle_clock: Request for Idling a clock managed by processor
149 * @put_clock: Release the clock to be auto managed by TISCI
150 * @is_auto: Is the clock being auto managed
151 * - req_state: state indicating if the clock is auto managed
152 * @is_on: Is the clock ON
153 * - req_state: if the clock is requested to be forced ON
154 * - current_state: if the clock is currently ON
155 * @is_off: Is the clock OFF
156 * - req_state: if the clock is requested to be forced OFF
157 * - current_state: if the clock is currently Gated
158 * @set_parent: Set the clock source of a specific device clock
159 * - parent_id: Parent clock identifier to set.
160 * @get_parent: Get the current clock source of a specific device clock
161 * - parent_id: Parent clock identifier which is the parent.
162 * @get_num_parents: Get the number of parents of the current clock source
163 * - num_parents: returns the number of parent clocks.
164 * @get_best_match_freq: Find a best matching frequency for a frequency
166 * - match_freq: Best matching frequency in Hz.
167 * @set_freq: Set the Clock frequency
168 * @get_freq: Get the Clock frequency
169 * - current_freq: Frequency in Hz that the clock is at.
171 * NOTE: for all these functions, the following parameters are generic in
173 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
174 * -did: Device identifier this request is for
175 * -cid: Clock identifier for the device for this request.
176 * Each device has it's own set of clock inputs. This indexes
177 * which clock input to modify.
178 * -min_freq: The minimum allowable frequency in Hz. This is the minimum
179 * allowable programmed frequency and does not account for clock
180 * tolerances and jitter.
181 * -target_freq: The target clock frequency in Hz. A frequency will be
182 * processed as close to this target frequency as possible.
183 * -max_freq: The maximum allowable frequency in Hz. This is the maximum
184 * allowable programmed frequency and does not account for clock
185 * tolerances and jitter.
187 * Request for the clock - NOTE: the client MUST maintain integrity of
188 * usage count by balancing get_clock with put_clock. No refcounting is
189 * managed by driver for that purpose.
191 struct ti_sci_clk_ops {
192 int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid,
193 bool needs_ssc, bool can_change_freq,
194 bool enable_input_term);
195 int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
196 int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
197 int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u8 cid,
199 int (*is_on)(const struct ti_sci_handle *handle, u32 did, u8 cid,
200 bool *req_state, bool *current_state);
201 int (*is_off)(const struct ti_sci_handle *handle, u32 did, u8 cid,
202 bool *req_state, bool *current_state);
203 int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
205 int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
207 int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did,
208 u8 cid, u8 *num_parents);
209 int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did,
210 u8 cid, u64 min_freq, u64 target_freq,
211 u64 max_freq, u64 *match_freq);
212 int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
213 u64 min_freq, u64 target_freq, u64 max_freq);
214 int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
219 * struct ti_sci_rm_core_ops - Resource management core operations
220 * @get_range: Get a range of resources belonging to ti sci host.
221 * @get_rage_from_shost: Get a range of resources belonging to
223 * - s_host: Host processing entity to which the
224 * resources are allocated
226 * NOTE: for these functions, all the parameters are consolidated and defined
228 * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
229 * - dev_id: TISCI device ID.
230 * - subtype: Resource assignment subtype that is being requested
231 * from the given device.
232 * - range_start: Start index of the resource range
233 * - range_end: Number of resources in the range
235 struct ti_sci_rm_core_ops {
236 int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id,
237 u8 subtype, u16 *range_start, u16 *range_num);
238 int (*get_range_from_shost)(const struct ti_sci_handle *handle,
239 u32 dev_id, u8 subtype, u8 s_host,
240 u16 *range_start, u16 *range_num);
244 * struct ti_sci_core_ops - SoC Core Operations
245 * @reboot_device: Reboot the SoC
246 * Returns 0 for successful request(ideally should never return),
247 * else returns corresponding error value.
248 * @query_msmc: Query the size of available msmc
249 * Return 0 for successful query else appropriate error value.
251 struct ti_sci_core_ops {
252 int (*reboot_device)(const struct ti_sci_handle *handle);
253 int (*query_msmc)(const struct ti_sci_handle *handle,
254 u64 *msmc_start, u64 *msmc_end);
258 * struct ti_sci_proc_ops - Processor specific operations.
260 * @proc_request: Request for controlling a physical processor.
261 * The requesting host should be in the processor access list.
262 * @proc_release: Relinquish a physical processor control
263 * @proc_handover: Handover a physical processor control to another host
264 * in the permitted list.
265 * @set_proc_boot_cfg: Base configuration of the processor
266 * @set_proc_boot_ctrl: Setup limited control flags in specific cases.
267 * @proc_auth_boot_image:
268 * @get_proc_boot_status: Get the state of physical processor
270 * NOTE: for all these functions, the following parameters are generic in
272 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
276 struct ti_sci_proc_ops {
277 int (*proc_request)(const struct ti_sci_handle *handle, u8 pid);
278 int (*proc_release)(const struct ti_sci_handle *handle, u8 pid);
279 int (*proc_handover)(const struct ti_sci_handle *handle, u8 pid,
281 int (*set_proc_boot_cfg)(const struct ti_sci_handle *handle, u8 pid,
282 u64 bv, u32 cfg_set, u32 cfg_clr);
283 int (*set_proc_boot_ctrl)(const struct ti_sci_handle *handle, u8 pid,
284 u32 ctrl_set, u32 ctrl_clr);
285 int (*proc_auth_boot_image)(const struct ti_sci_handle *handle,
286 u64 *image_addr, u32 *image_size);
287 int (*get_proc_boot_status)(const struct ti_sci_handle *handle, u8 pid,
288 u64 *bv, u32 *cfg_flags, u32 *ctrl_flags,
292 #define TI_SCI_RING_MODE_RING (0)
293 #define TI_SCI_RING_MODE_MESSAGE (1)
294 #define TI_SCI_RING_MODE_CREDENTIALS (2)
295 #define TI_SCI_RING_MODE_QM (3)
297 #define TI_SCI_MSG_UNUSED_SECONDARY_HOST TI_SCI_RM_NULL_U8
299 /* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */
300 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0)
301 /* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */
302 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1)
303 /* RA config.count parameter is valid for RM ring configure TI_SCI message */
304 #define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2)
305 /* RA config.mode parameter is valid for RM ring configure TI_SCI message */
306 #define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3)
307 /* RA config.size parameter is valid for RM ring configure TI_SCI message */
308 #define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4)
309 /* RA config.order_id parameter is valid for RM ring configure TISCI message */
310 #define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5)
312 #define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \
313 (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \
314 TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \
315 TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \
316 TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \
317 TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID)
320 * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations
321 * @config: configure the SoC Navigator Subsystem Ring Accelerator ring
322 * @get_config: get the SoC Navigator Subsystem Ring Accelerator ring
325 struct ti_sci_rm_ringacc_ops {
326 int (*config)(const struct ti_sci_handle *handle,
327 u32 valid_params, u16 nav_id, u16 index,
328 u32 addr_lo, u32 addr_hi, u32 count, u8 mode,
331 int (*get_config)(const struct ti_sci_handle *handle,
332 u32 nav_id, u32 index, u8 *mode,
333 u32 *addr_lo, u32 *addr_hi, u32 *count,
334 u8 *size, u8 *order_id);
338 * struct ti_sci_rm_psil_ops - PSI-L thread operations
339 * @pair: pair PSI-L source thread to a destination thread.
340 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
341 * TCHAN_THRD_ID register is updated.
342 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
343 * RCHAN_THRD_ID register is updated.
344 * @unpair: unpair PSI-L source thread from a destination thread.
345 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
346 * TCHAN_THRD_ID register is cleared.
347 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
348 * RCHAN_THRD_ID register is cleared.
350 struct ti_sci_rm_psil_ops {
351 int (*pair)(const struct ti_sci_handle *handle, u32 nav_id,
352 u32 src_thread, u32 dst_thread);
353 int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id,
354 u32 src_thread, u32 dst_thread);
357 /* UDMAP channel types */
358 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2
359 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */
360 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10
361 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11
362 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12
363 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13
365 /* UDMAP channel atypes */
366 #define TI_SCI_RM_UDMAP_ATYPE_PHYS 0
367 #define TI_SCI_RM_UDMAP_ATYPE_INTERMEDIATE 1
368 #define TI_SCI_RM_UDMAP_ATYPE_VIRTUAL 2
370 /* UDMAP channel scheduling priorities */
371 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_HIGH 0
372 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDHIGH 1
373 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDLOW 2
374 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_LOW 3
376 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0
377 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2
379 /* UDMAP TX/RX channel valid_params common declarations */
380 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0)
381 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1)
382 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2)
383 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3)
384 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4)
385 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5)
386 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6)
387 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7)
388 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8)
391 * Configures a Navigator Subsystem UDMAP transmit channel
393 * Configures a Navigator Subsystem UDMAP transmit channel registers.
394 * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req
396 struct ti_sci_msg_rm_udmap_tx_ch_cfg {
398 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9)
399 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10)
400 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11)
401 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12)
402 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13)
418 u8 tx_sched_priority;
422 * Configures a Navigator Subsystem UDMAP receive channel
424 * Configures a Navigator Subsystem UDMAP receive channel registers.
425 * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req
427 struct ti_sci_msg_rm_udmap_rx_ch_cfg {
429 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9)
430 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10)
431 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11)
432 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12)
440 u8 rx_sched_priority;
451 * Configures a Navigator Subsystem UDMAP receive flow
453 * Configures a Navigator Subsystem UDMAP receive flow's registers.
454 * See @tis_ci_msg_rm_udmap_flow_cfg_req
456 struct ti_sci_msg_rm_udmap_flow_cfg {
458 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0)
459 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1)
460 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2)
461 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3)
462 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4)
463 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5)
464 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6)
465 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7)
466 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8)
467 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9)
468 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10)
469 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11)
470 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12)
471 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13)
472 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14)
473 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15)
474 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16)
475 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17)
476 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18)
480 u8 rx_psinfo_present;
481 u8 rx_error_handling;
489 u8 rx_src_tag_hi_sel;
490 u8 rx_src_tag_lo_sel;
491 u8 rx_dest_tag_hi_sel;
492 u8 rx_dest_tag_lo_sel;
493 u16 rx_fdq0_sz0_qnum;
501 * struct ti_sci_rm_udmap_ops - UDMA Management operations
502 * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel.
503 * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel.
504 * @rx_flow_cfg: configure SoC Navigator Subsystem UDMA receive flow.
506 struct ti_sci_rm_udmap_ops {
507 int (*tx_ch_cfg)(const struct ti_sci_handle *handle,
508 const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params);
509 int (*rx_ch_cfg)(const struct ti_sci_handle *handle,
510 const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params);
512 const struct ti_sci_handle *handle,
513 const struct ti_sci_msg_rm_udmap_flow_cfg *params);
517 * struct ti_sci_msg_fwl_region_cfg - Request and Response for firewalls settings
519 * @fwl_id: Firewall ID in question
520 * @region: Region or channel number to set config info
521 * This field is unused in case of a simple firewall and must be initialized
522 * to zero. In case of a region based firewall, this field indicates the
523 * region in question. (index starting from 0) In case of a channel based
524 * firewall, this field indicates the channel in question (index starting
526 * @n_permission_regs: Number of permission registers to set
527 * @control: Contents of the firewall CONTROL register to set
528 * @permissions: Contents of the firewall PERMISSION register to set
529 * @start_address: Contents of the firewall START_ADDRESS register to set
530 * @end_address: Contents of the firewall END_ADDRESS register to set
532 struct ti_sci_msg_fwl_region {
535 u32 n_permission_regs;
543 * \brief Request and Response for firewall owner change
545 * @fwl_id: Firewall ID in question
546 * @region: Region or channel number to set config info
547 * This field is unused in case of a simple firewall and must be initialized
548 * to zero. In case of a region based firewall, this field indicates the
549 * region in question. (index starting from 0) In case of a channel based
550 * firewall, this field indicates the channel in question (index starting
552 * @n_permission_regs: Number of permission registers <= 3
553 * @control: Control register value for this region
554 * @owner_index: New owner index to change to. Owner indexes are setup in DMSC firmware boot configuration data
555 * @owner_privid: New owner priv-id, used to lookup owner_index is not known, must be set to zero otherwise
556 * @owner_permission_bits: New owner permission bits
558 struct ti_sci_msg_fwl_owner {
563 u16 owner_permission_bits;
567 * struct ti_sci_fwl_ops - Firewall specific operations
568 * @set_fwl_region: Request for configuring the firewall permissions.
569 * @get_fwl_region: Request for retrieving the firewall permissions.
570 * @change_fwl_owner: Request for a change of firewall owner.
572 struct ti_sci_fwl_ops {
573 int (*set_fwl_region)(const struct ti_sci_handle *handle, const struct ti_sci_msg_fwl_region *region);
574 int (*get_fwl_region)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_region *region);
575 int (*change_fwl_owner)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_owner *owner);
579 * struct ti_sci_ops - Function support for TI SCI
580 * @board_ops: Miscellaneous operations
581 * @dev_ops: Device specific operations
582 * @clk_ops: Clock specific operations
583 * @core_ops: Core specific operations
584 * @proc_ops: Processor specific operations
585 * @ring_ops: Ring Accelerator Management operations
586 * @fw_ops: Firewall specific operations
589 struct ti_sci_board_ops board_ops;
590 struct ti_sci_dev_ops dev_ops;
591 struct ti_sci_clk_ops clk_ops;
592 struct ti_sci_core_ops core_ops;
593 struct ti_sci_proc_ops proc_ops;
594 struct ti_sci_rm_core_ops rm_core_ops;
595 struct ti_sci_rm_ringacc_ops rm_ring_ops;
596 struct ti_sci_rm_psil_ops rm_psil_ops;
597 struct ti_sci_rm_udmap_ops rm_udmap_ops;
598 struct ti_sci_fwl_ops fwl_ops;
602 * struct ti_sci_handle - Handle returned to TI SCI clients for usage.
603 * @ops: operations that are made available to TI SCI clients
604 * @version: structure containing version information
606 struct ti_sci_handle {
607 struct ti_sci_ops ops;
608 struct ti_sci_version_info version;
611 #define TI_SCI_RESOURCE_NULL 0xffff
614 * struct ti_sci_resource_desc - Description of TI SCI resource instance range.
615 * @start: Start index of the resource.
616 * @num: Number of resources.
617 * @res_map: Bitmap to manage the allocation of these resources.
619 struct ti_sci_resource_desc {
622 unsigned long *res_map;
626 * struct ti_sci_resource - Structure representing a resource assigned
628 * @sets: Number of sets available from this resource type
629 * @desc: Array of resource descriptors.
631 struct ti_sci_resource {
633 struct ti_sci_resource_desc *desc;
636 #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL)
638 const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev);
639 const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev);
640 const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
641 const char *property);
642 u16 ti_sci_get_free_resource(struct ti_sci_resource *res);
643 void ti_sci_release_resource(struct ti_sci_resource *res, u16 id);
644 struct ti_sci_resource *
645 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
646 struct udevice *dev, u32 dev_id, char *of_prop);
648 #else /* CONFIG_TI_SCI_PROTOCOL */
651 const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev)
653 return ERR_PTR(-EINVAL);
656 static inline const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev)
658 return ERR_PTR(-EINVAL);
662 const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
663 const char *property)
665 return ERR_PTR(-EINVAL);
668 static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res)
670 return TI_SCI_RESOURCE_NULL;
673 static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id)
677 static inline struct ti_sci_resource *
678 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
679 struct udevice *dev, u32 dev_id, char *of_prop)
681 return ERR_PTR(-EINVAL);
683 #endif /* CONFIG_TI_SCI_PROTOCOL */
685 #endif /* __TISCI_PROTOCOL_H */