1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * DA9055 declarations for DA9055 PMICs.
5 * Copyright(c) 2012 Dialog Semiconductor Ltd.
7 * Author: David Dajun Chen <dchen@diasemi.com>
10 #ifndef __DA9055_REG_H
11 #define __DA9055_REG_H
17 #define DA9055_REG_PAGE_CON 0x00
19 /* System Control and Event Registers */
20 #define DA9055_REG_STATUS_A 0x01
21 #define DA9055_REG_STATUS_B 0x02
22 #define DA9055_REG_FAULT_LOG 0x03
23 #define DA9055_REG_EVENT_A 0x04
24 #define DA9055_REG_EVENT_B 0x05
25 #define DA9055_REG_EVENT_C 0x06
26 #define DA9055_REG_IRQ_MASK_A 0x07
27 #define DA9055_REG_IRQ_MASK_B 0x08
28 #define DA9055_REG_IRQ_MASK_C 0x09
29 #define DA9055_REG_CONTROL_A 0x0A
30 #define DA9055_REG_CONTROL_B 0x0B
31 #define DA9055_REG_CONTROL_C 0x0C
32 #define DA9055_REG_CONTROL_D 0x0D
33 #define DA9055_REG_CONTROL_E 0x0E
34 #define DA9055_REG_PD_DIS 0x0F
36 /* GPIO Control Registers */
37 #define DA9055_REG_GPIO0_1 0x10
38 #define DA9055_REG_GPIO2 0x11
39 #define DA9055_REG_GPIO_MODE0_2 0x12
41 /* Regulator Control Registers */
42 #define DA9055_REG_BCORE_CONT 0x13
43 #define DA9055_REG_BMEM_CONT 0x14
44 #define DA9055_REG_LDO1_CONT 0x15
45 #define DA9055_REG_LDO2_CONT 0x16
46 #define DA9055_REG_LDO3_CONT 0x17
47 #define DA9055_REG_LDO4_CONT 0x18
48 #define DA9055_REG_LDO5_CONT 0x19
49 #define DA9055_REG_LDO6_CONT 0x1A
51 /* GP-ADC Control Registers */
52 #define DA9055_REG_ADC_MAN 0x1B
53 #define DA9055_REG_ADC_CONT 0x1C
54 #define DA9055_REG_VSYS_MON 0x1D
55 #define DA9055_REG_ADC_RES_L 0x1E
56 #define DA9055_REG_ADC_RES_H 0x1F
57 #define DA9055_REG_VSYS_RES 0x20
58 #define DA9055_REG_ADCIN1_RES 0x21
59 #define DA9055_REG_ADCIN2_RES 0x22
60 #define DA9055_REG_ADCIN3_RES 0x23
62 /* Sequencer Control Registers */
63 #define DA9055_REG_EN_32K 0x35
65 /* Regulator Setting Registers */
66 #define DA9055_REG_BUCK_LIM 0x37
67 #define DA9055_REG_BCORE_MODE 0x38
68 #define DA9055_REG_VBCORE_A 0x39
69 #define DA9055_REG_VBMEM_A 0x3A
70 #define DA9055_REG_VLDO1_A 0x3B
71 #define DA9055_REG_VLDO2_A 0x3C
72 #define DA9055_REG_VLDO3_A 0x3D
73 #define DA9055_REG_VLDO4_A 0x3E
74 #define DA9055_REG_VLDO5_A 0x3F
75 #define DA9055_REG_VLDO6_A 0x40
76 #define DA9055_REG_VBCORE_B 0x41
77 #define DA9055_REG_VBMEM_B 0x42
78 #define DA9055_REG_VLDO1_B 0x43
79 #define DA9055_REG_VLDO2_B 0x44
80 #define DA9055_REG_VLDO3_B 0x45
81 #define DA9055_REG_VLDO4_B 0x46
82 #define DA9055_REG_VLDO5_B 0x47
83 #define DA9055_REG_VLDO6_B 0x48
85 /* GP-ADC Threshold Registers */
86 #define DA9055_REG_AUTO1_HIGH 0x49
87 #define DA9055_REG_AUTO1_LOW 0x4A
88 #define DA9055_REG_AUTO2_HIGH 0x4B
89 #define DA9055_REG_AUTO2_LOW 0x4C
90 #define DA9055_REG_AUTO3_HIGH 0x4D
91 #define DA9055_REG_AUTO3_LOW 0x4E
94 #define DA9055_REG_OPT_COUNT 0x50
95 #define DA9055_REG_OPT_ADDR 0x51
96 #define DA9055_REG_OPT_DATA 0x52
98 /* RTC Calendar and Alarm Registers */
99 #define DA9055_REG_COUNT_S 0x53
100 #define DA9055_REG_COUNT_MI 0x54
101 #define DA9055_REG_COUNT_H 0x55
102 #define DA9055_REG_COUNT_D 0x56
103 #define DA9055_REG_COUNT_MO 0x57
104 #define DA9055_REG_COUNT_Y 0x58
105 #define DA9055_REG_ALARM_MI 0x59
106 #define DA9055_REG_ALARM_H 0x5A
107 #define DA9055_REG_ALARM_D 0x5B
108 #define DA9055_REG_ALARM_MO 0x5C
109 #define DA9055_REG_ALARM_Y 0x5D
110 #define DA9055_REG_SECOND_A 0x5E
111 #define DA9055_REG_SECOND_B 0x5F
112 #define DA9055_REG_SECOND_C 0x60
113 #define DA9055_REG_SECOND_D 0x61
115 /* Customer Trim and Configuration */
116 #define DA9055_REG_T_OFFSET 0x63
117 #define DA9055_REG_INTERFACE 0x64
118 #define DA9055_REG_CONFIG_A 0x65
119 #define DA9055_REG_CONFIG_B 0x66
120 #define DA9055_REG_CONFIG_C 0x67
121 #define DA9055_REG_CONFIG_D 0x68
122 #define DA9055_REG_CONFIG_E 0x69
123 #define DA9055_REG_TRIM_CLDR 0x6F
125 /* General Purpose Registers */
126 #define DA9055_REG_GP_ID_0 0x70
127 #define DA9055_REG_GP_ID_1 0x71
128 #define DA9055_REG_GP_ID_2 0x72
129 #define DA9055_REG_GP_ID_3 0x73
130 #define DA9055_REG_GP_ID_4 0x74
131 #define DA9055_REG_GP_ID_5 0x75
132 #define DA9055_REG_GP_ID_6 0x76
133 #define DA9055_REG_GP_ID_7 0x77
134 #define DA9055_REG_GP_ID_8 0x78
135 #define DA9055_REG_GP_ID_9 0x79
136 #define DA9055_REG_GP_ID_10 0x7A
137 #define DA9055_REG_GP_ID_11 0x7B
138 #define DA9055_REG_GP_ID_12 0x7C
139 #define DA9055_REG_GP_ID_13 0x7D
140 #define DA9055_REG_GP_ID_14 0x7E
141 #define DA9055_REG_GP_ID_15 0x7F
142 #define DA9055_REG_GP_ID_16 0x80
143 #define DA9055_REG_GP_ID_17 0x81
144 #define DA9055_REG_GP_ID_18 0x82
145 #define DA9055_REG_GP_ID_19 0x83
147 #define DA9055_MAX_REGISTER_CNT DA9055_REG_GP_ID_19
150 * PMIC registers bits
153 /* DA9055_REG_PAGE_CON (addr=0x00) */
154 #define DA9055_PAGE_WRITE_MODE (0<<6)
155 #define DA9055_REPEAT_WRITE_MODE (1<<6)
157 /* DA9055_REG_STATUS_A (addr=0x01) */
158 #define DA9055_NOKEY_STS 0x01
159 #define DA9055_WAKE_STS 0x02
160 #define DA9055_DVC_BUSY_STS 0x04
161 #define DA9055_COMP1V2_STS 0x08
162 #define DA9055_NJIG_STS 0x10
163 #define DA9055_LDO5_LIM_STS 0x20
164 #define DA9055_LDO6_LIM_STS 0x40
166 /* DA9055_REG_STATUS_B (addr=0x02) */
167 #define DA9055_GPI0_STS 0x01
168 #define DA9055_GPI1_STS 0x02
169 #define DA9055_GPI2_STS 0x04
171 /* DA9055_REG_FAULT_LOG (addr=0x03) */
172 #define DA9055_TWD_ERROR_FLG 0x01
173 #define DA9055_POR_FLG 0x02
174 #define DA9055_VDD_FAULT_FLG 0x04
175 #define DA9055_VDD_START_FLG 0x08
176 #define DA9055_TEMP_CRIT_FLG 0x10
177 #define DA9055_KEY_RESET_FLG 0x20
178 #define DA9055_WAIT_SHUT_FLG 0x80
180 /* DA9055_REG_EVENT_A (addr=0x04) */
181 #define DA9055_NOKEY_EINT 0x01
182 #define DA9055_ALARM_EINT 0x02
183 #define DA9055_TICK_EINT 0x04
184 #define DA9055_ADC_RDY_EINT 0x08
185 #define DA9055_SEQ_RDY_EINT 0x10
186 #define DA9055_EVENTS_B_EINT 0x20
187 #define DA9055_EVENTS_C_EINT 0x40
189 /* DA9055_REG_EVENT_B (addr=0x05) */
190 #define DA9055_E_WAKE_EINT 0x01
191 #define DA9055_E_TEMP_EINT 0x02
192 #define DA9055_E_COMP1V2_EINT 0x04
193 #define DA9055_E_LDO_LIM_EINT 0x08
194 #define DA9055_E_NJIG_EINT 0x20
195 #define DA9055_E_VDD_MON_EINT 0x40
196 #define DA9055_E_VDD_WARN_EINT 0x80
198 /* DA9055_REG_EVENT_C (addr=0x06) */
199 #define DA9055_E_GPI0_EINT 0x01
200 #define DA9055_E_GPI1_EINT 0x02
201 #define DA9055_E_GPI2_EINT 0x04
203 /* DA9055_REG_IRQ_MASK_A (addr=0x07) */
204 #define DA9055_M_NONKEY_EINT 0x01
205 #define DA9055_M_ALARM_EINT 0x02
206 #define DA9055_M_TICK_EINT 0x04
207 #define DA9055_M_ADC_RDY_EINT 0x08
208 #define DA9055_M_SEQ_RDY_EINT 0x10
210 /* DA9055_REG_IRQ_MASK_B (addr=0x08) */
211 #define DA9055_M_WAKE_EINT 0x01
212 #define DA9055_M_TEMP_EINT 0x02
213 #define DA9055_M_COMP_1V2_EINT 0x04
214 #define DA9055_M_LDO_LIM_EINT 0x08
215 #define DA9055_M_NJIG_EINT 0x20
216 #define DA9055_M_VDD_MON_EINT 0x40
217 #define DA9055_M_VDD_WARN_EINT 0x80
219 /* DA9055_REG_IRQ_MASK_C (addr=0x09) */
220 #define DA9055_M_GPI0_EINT 0x01
221 #define DA9055_M_GPI1_EINT 0x02
222 #define DA9055_M_GPI2_EINT 0x04
224 /* DA9055_REG_CONTROL_A (addr=0xA) */
225 #define DA9055_DEBOUNCING_SHIFT 0x00
226 #define DA9055_DEBOUNCING_MASK 0x07
227 #define DA9055_NRES_MODE_SHIFT 0x03
228 #define DA9055_NRES_MODE_MASK 0x08
229 #define DA9055_SLEW_RATE_SHIFT 0x04
230 #define DA9055_SLEW_RATE_MASK 0x30
231 #define DA9055_NOKEY_LOCK_SHIFT 0x06
232 #define DA9055_NOKEY_LOCK_MASK 0x40
234 /* DA9055_REG_CONTROL_B (addr=0xB) */
235 #define DA9055_RTC_MODE_PD 0x01
236 #define DA9055_RTC_MODE_SD_SHIFT 0x01
237 #define DA9055_RTC_MODE_SD 0x02
238 #define DA9055_RTC_EN 0x04
239 #define DA9055_ECO_MODE_SHIFT 0x03
240 #define DA9055_ECO_MODE_MASK 0x08
241 #define DA9055_TWDSCALE_SHIFT 4
242 #define DA9055_TWDSCALE_MASK 0x70
243 #define DA9055_V_LOCK_SHIFT 0x07
244 #define DA9055_V_LOCK_MASK 0x80
246 /* DA9055_REG_CONTROL_C (addr=0xC) */
247 #define DA9055_SYSTEM_EN_SHIFT 0x00
248 #define DA9055_SYSTEM_EN_MASK 0x01
249 #define DA9055_POWERN_EN_SHIFT 0x01
250 #define DA9055_POWERN_EN_MASK 0x02
251 #define DA9055_POWER1_EN_SHIFT 0x02
252 #define DA9055_POWER1_EN_MASK 0x04
254 /* DA9055_REG_CONTROL_D (addr=0xD) */
255 #define DA9055_STANDBY_SHIFT 0x02
256 #define DA9055_STANDBY_MASK 0x08
257 #define DA9055_AUTO_BOOT_SHIFT 0x03
258 #define DA9055_AUTO_BOOT_MASK 0x04
260 /* DA9055_REG_CONTROL_E (addr=0xE) */
261 #define DA9055_WATCHDOG_SHIFT 0x00
262 #define DA9055_WATCHDOG_MASK 0x01
263 #define DA9055_SHUTDOWN_SHIFT 0x01
264 #define DA9055_SHUTDOWN_MASK 0x02
265 #define DA9055_WAKE_UP_SHIFT 0x02
266 #define DA9055_WAKE_UP_MASK 0x04
268 /* DA9055_REG_GPIO (addr=0x10/0x11) */
269 #define DA9055_GPIO0_PIN_SHIFT 0x00
270 #define DA9055_GPIO0_PIN_MASK 0x03
271 #define DA9055_GPIO0_TYPE_SHIFT 0x02
272 #define DA9055_GPIO0_TYPE_MASK 0x04
273 #define DA9055_GPIO0_WEN_SHIFT 0x03
274 #define DA9055_GPIO0_WEN_MASK 0x08
275 #define DA9055_GPIO1_PIN_SHIFT 0x04
276 #define DA9055_GPIO1_PIN_MASK 0x30
277 #define DA9055_GPIO1_TYPE_SHIFT 0x06
278 #define DA9055_GPIO1_TYPE_MASK 0x40
279 #define DA9055_GPIO1_WEN_SHIFT 0x07
280 #define DA9055_GPIO1_WEN_MASK 0x80
281 #define DA9055_GPIO2_PIN_SHIFT 0x00
282 #define DA9055_GPIO2_PIN_MASK 0x30
283 #define DA9055_GPIO2_TYPE_SHIFT 0x02
284 #define DA9055_GPIO2_TYPE_MASK 0x04
285 #define DA9055_GPIO2_WEN_SHIFT 0x03
286 #define DA9055_GPIO2_WEN_MASK 0x08
288 /* DA9055_REG_GPIO_MODE (addr=0x12) */
289 #define DA9055_GPIO0_MODE_SHIFT 0x00
290 #define DA9055_GPIO0_MODE_MASK 0x01
291 #define DA9055_GPIO1_MODE_SHIFT 0x01
292 #define DA9055_GPIO1_MODE_MASK 0x02
293 #define DA9055_GPIO2_MODE_SHIFT 0x02
294 #define DA9055_GPIO2_MODE_MASK 0x04
296 /* DA9055_REG_BCORE_CONT (addr=0x13) */
297 #define DA9055_BCORE_EN_SHIFT 0x00
298 #define DA9055_BCORE_EN_MASK 0x01
299 #define DA9055_BCORE_GPI_SHIFT 0x01
300 #define DA9055_BCORE_GPI_MASK 0x02
301 #define DA9055_BCORE_PD_DIS_SHIFT 0x03
302 #define DA9055_BCORE_PD_DIS_MASK 0x04
303 #define DA9055_VBCORE_SEL_SHIFT 0x04
304 #define DA9055_SEL_REG_A 0x0
305 #define DA9055_SEL_REG_B 0x10
306 #define DA9055_VBCORE_SEL_MASK 0x10
307 #define DA9055_V_GPI_MASK 0x60
308 #define DA9055_V_GPI_SHIFT 0x05
309 #define DA9055_E_GPI_MASK 0x06
310 #define DA9055_E_GPI_SHIFT 0x01
311 #define DA9055_VBCORE_GPI_SHIFT 0x05
312 #define DA9055_VBCORE_GPI_MASK 0x60
313 #define DA9055_BCORE_CONF_SHIFT 0x07
314 #define DA9055_BCORE_CONF_MASK 0x80
316 /* DA9055_REG_BMEM_CONT (addr=0x14) */
317 #define DA9055_BMEM_EN_SHIFT 0x00
318 #define DA9055_BMEM_EN_MASK 0x01
319 #define DA9055_BMEM_GPI_SHIFT 0x01
320 #define DA9055_BMEM_GPI_MASK 0x06
321 #define DA9055_BMEM_PD_DIS_SHIFT 0x03
322 #define DA9055_BMEM_PD_DIS_MASK 0x08
323 #define DA9055_VBMEM_SEL_SHIT 0x04
324 #define DA9055_VBMEM_SEL_VBMEM_A (0<<4)
325 #define DA9055_VBMEM_SEL_VBMEM_B (1<<4)
326 #define DA9055_VBMEM_SEL_MASK 0x10
327 #define DA9055_VBMEM_GPI_SHIFT 0x05
328 #define DA9055_VBMEM_GPI_MASK 0x60
329 #define DA9055_BMEM_CONF_SHIFT 0x07
330 #define DA9055_BMEM_CONF_MASK 0x80
332 /* DA9055_REG_LDO_CONT (addr=0x15-0x1A) */
333 #define DA9055_LDO_EN_SHIFT 0x00
334 #define DA9055_LDO_EN_MASK 0x01
335 #define DA9055_LDO_GPI_SHIFT 0x01
336 #define DA9055_LDO_GPI_MASK 0x06
337 #define DA9055_LDO_PD_DIS_SHIFT 0x03
338 #define DA9055_LDO_PD_DIS_MASK 0x08
339 #define DA9055_VLDO_SEL_SHIFT 0x04
340 #define DA9055_VLDO_SEL_MASK 0x10
341 #define DA9055_VLDO_SEL_VLDO_A 0x00
342 #define DA9055_VLDO_SEL_VLDO_B 0x01
343 #define DA9055_VLDO_GPI_SHIFT 0x05
344 #define DA9055_VLDO_GPI_MASK 0x60
345 #define DA9055_LDO_CONF_SHIFT 0x07
346 #define DA9055_LDO_CONF_MASK 0x80
347 #define DA9055_REGUALTOR_SET_A 0x00
348 #define DA9055_REGUALTOR_SET_B 0x10
350 /* DA9055_REG_ADC_MAN (addr=0x1B) */
351 #define DA9055_ADC_MUX_SHIFT 0
352 #define DA9055_ADC_MUX_MASK 0xF
353 #define DA9055_ADC_MUX_VSYS 0x0
354 #define DA9055_ADC_MUX_ADCIN1 0x01
355 #define DA9055_ADC_MUX_ADCIN2 0x02
356 #define DA9055_ADC_MUX_ADCIN3 0x03
357 #define DA9055_ADC_MUX_T_SENSE 0x04
358 #define DA9055_ADC_MAN_SHIFT 0x04
359 #define DA9055_ADC_MAN_CONV 0x10
360 #define DA9055_ADC_LSB_MASK 0X03
361 #define DA9055_ADC_MODE_MASK 0x20
362 #define DA9055_ADC_MODE_SHIFT 5
363 #define DA9055_ADC_MODE_1MS (1<<5)
364 #define DA9055_COMP1V2_EN_SHIFT 7
366 /* DA9055_REG_ADC_CONT (addr=0x1C) */
367 #define DA9055_ADC_AUTO_VSYS_EN_SHIFT 0
368 #define DA9055_ADC_AUTO_AD1_EN_SHIFT 1
369 #define DA9055_ADC_AUTO_AD2_EN_SHIFT 2
370 #define DA9055_ADC_AUTO_AD3_EN_SHIFT 3
371 #define DA9055_ADC_ISRC_EN_SHIFT 4
372 #define DA9055_ADC_ADCIN1_DEB_SHIFT 5
373 #define DA9055_ADC_ADCIN2_DEB_SHIFT 6
374 #define DA9055_ADC_ADCIN3_DEB_SHIFT 7
375 #define DA9055_AD1_ISRC_MASK 0x10
376 #define DA9055_AD1_ISRC_SHIFT 4
378 /* DA9055_REG_VSYS_MON (addr=0x1D) */
379 #define DA9055_VSYS_VAL_SHIFT 0
380 #define DA9055_VSYS_VAL_MASK 0xFF
381 #define DA9055_VSYS_VAL_BASE 0x00
382 #define DA9055_VSYS_VAL_MAX DA9055_VSYS_VAL_MASK
383 #define DA9055_VSYS_VOLT_BASE 2500
384 #define DA9055_VSYS_VOLT_INC 10
385 #define DA9055_VSYS_STEPS 255
386 #define DA9055_VSYS_VOLT_MIN 2500
388 /* DA9044_REG_XXX_RES (addr=0x20-0x23) */
389 #define DA9055_ADC_VAL_SHIFT 0
390 #define DA9055_ADC_VAL_MASK 0xFF
391 #define DA9055_ADC_VAL_BASE 0x00
392 #define DA9055_ADC_VAL_MAX DA9055_ADC_VAL_MASK
393 #define DA9055_ADC_VOLT_BASE 0
394 #define DA9055_ADC_VSYS_VOLT_BASE 2500
395 #define DA9055_ADC_VOLT_INC 10
396 #define DA9055_ADC_VSYS_VOLT_INC 12
397 #define DA9055_ADC_STEPS 255
399 /* DA9055_REG_EN_32K (addr=0x35)*/
400 #define DA9055_STARTUP_TIME_MASK 0x07
401 #define DA9055_STARTUP_TIME_0S 0x0
402 #define DA9055_STARTUP_TIME_0_52S 0x1
403 #define DA9055_STARTUP_TIME_1S 0x2
404 #define DA9055_CRYSTAL_EN 0x08
405 #define DA9055_DELAY_MODE_EN 0x10
406 #define DA9055_OUT_CLCK_GATED 0x20
407 #define DA9055_RTC_CLOCK_GATED 0x40
408 #define DA9055_EN_32KOUT_BUF 0x80
410 /* DA9055_REG_RESET (addr=0x36) */
411 /* Timer up to 31.744 ms */
412 #define DA9055_RESET_TIMER_VAL_SHIFT 0
413 #define DA9055_RESET_LOW_VAL_MASK 0x3F
414 #define DA9055_RESET_LOW_VAL_BASE 0
415 #define DA9055_RESET_LOW_VAL_MAX DA9055_RESET_LOW_VAL_MASK
416 #define DA9055_RESET_US_LOW_BASE 1024 /* min val in units of us */
417 #define DA9055_RESET_US_LOW_INC 1024 /* inc val in units of us */
418 #define DA9055_RESET_US_LOW_STEP 30
420 /* Timer up to 1048.576ms */
421 #define DA9055_RESET_HIGH_VAL_MASK 0x3F
422 #define DA9055_RESET_HIGH_VAL_BASE 0
423 #define DA9055_RESET_HIGH_VAL_MAX DA9055_RESET_HIGH_VAL_MASK
424 #define DA9055_RESET_US_HIGH_BASE 32768 /* min val in units of us */
425 #define DA9055_RESET_US_HIGH_INC 32768 /* inv val in units of us */
426 #define DA9055_RESET_US_HIGH_STEP 31
428 /* DA9055_REG_BUCK_ILIM (addr=0x37)*/
429 #define DA9055_BMEM_ILIM_SHIFT 0
430 #define DA9055_ILIM_MASK 0x3
431 #define DA9055_ILIM_500MA 0x0
432 #define DA9055_ILIM_600MA 0x1
433 #define DA9055_ILIM_700MA 0x2
434 #define DA9055_ILIM_800MA 0x3
435 #define DA9055_BCORE_ILIM_SHIFT 2
437 /* DA9055_REG_BCORE_MODE (addr=0x38) */
438 #define DA9055_BMEM_MODE_SHIFT 0
439 #define DA9055_MODE_MASK 0x3
440 #define DA9055_MODE_AB 0x0
441 #define DA9055_MODE_SLEEP 0x1
442 #define DA9055_MODE_SYNCHRO 0x2
443 #define DA9055_MODE_AUTO 0x3
444 #define DA9055_BCORE_MODE_SHIFT 2
446 /* DA9055_REG_VBCORE_A/B (addr=0x39/0x41)*/
447 #define DA9055_VBCORE_VAL_SHIFT 0
448 #define DA9055_VBCORE_VAL_MASK 0x3F
449 #define DA9055_VBCORE_VAL_BASE 0x09
450 #define DA9055_VBCORE_VAL_MAX DA9055_VBCORE_VAL_MASK
451 #define DA9055_VBCORE_VOLT_BASE 750
452 #define DA9055_VBCORE_VOLT_INC 25
453 #define DA9055_VBCORE_STEPS 53
454 #define DA9055_VBCORE_VOLT_MIN DA9055_VBCORE_VOLT_BASE
455 #define DA9055_BCORE_SL_SYNCHRO (0<<7)
456 #define DA9055_BCORE_SL_SLEEP (1<<7)
458 /* DA9055_REG_VBMEM_A/B (addr=0x3A/0x42)*/
459 #define DA9055_VBMEM_VAL_SHIFT 0
460 #define DA9055_VBMEM_VAL_MASK 0x3F
461 #define DA9055_VBMEM_VAL_BASE 0x00
462 #define DA9055_VBMEM_VAL_MAX DA9055_VBMEM_VAL_MASK
463 #define DA9055_VBMEM_VOLT_BASE 925
464 #define DA9055_VBMEM_VOLT_INC 25
465 #define DA9055_VBMEM_STEPS 63
466 #define DA9055_VBMEM_VOLT_MIN DA9055_VBMEM_VOLT_BASE
467 #define DA9055_BCMEM_SL_SYNCHRO (0<<7)
468 #define DA9055_BCMEM_SL_SLEEP (1<<7)
471 /* DA9055_REG_VLDO (addr=0x3B-0x40/0x43-0x48)*/
472 #define DA9055_VLDO_VAL_SHIFT 0
473 #define DA9055_VLDO_VAL_MASK 0x3F
474 #define DA9055_VLDO6_VAL_MASK 0x7F
475 #define DA9055_VLDO_VAL_BASE 0x02
476 #define DA9055_VLDO2_VAL_BASE 0x03
477 #define DA9055_VLDO6_VAL_BASE 0x00
478 #define DA9055_VLDO_VAL_MAX DA9055_VLDO_VAL_MASK
479 #define DA9055_VLDO6_VAL_MAX DA9055_VLDO6_VAL_MASK
480 #define DA9055_VLDO_VOLT_BASE 900
481 #define DA9055_VLDO_VOLT_INC 50
482 #define DA9055_VLDO6_VOLT_INC 20
483 #define DA9055_VLDO_STEPS 48
484 #define DA9055_VLDO5_STEPS 37
485 #define DA9055_VLDO6_STEPS 120
486 #define DA9055_VLDO_VOLT_MIN DA9055_VLDO_VOLT_BASE
487 #define DA9055_LDO_MODE_SHIFT 7
488 #define DA9055_LDO_SL_NORMAL 0
489 #define DA9055_LDO_SL_SLEEP 1
491 /* DA9055_REG_OTP_CONT (addr=0x50) */
492 #define DA9055_OTP_TIM_NORMAL (0<<0)
493 #define DA9055_OTP_TIM_MARGINAL (1<<0)
494 #define DA9055_OTP_GP_RD_SHIFT 1
495 #define DA9055_OTP_APPS_RD_SHIFT 2
496 #define DA9055_PC_DONE_SHIFT 3
497 #define DA9055_OTP_GP_LOCK_SHIFT 4
498 #define DA9055_OTP_APPS_LOCK_SHIFT 5
499 #define DA9055_OTP_CONF_LOCK_SHIFT 6
500 #define DA9055_OTP_WRITE_DIS_SHIFT 7
502 /* DA9055_REG_COUNT_S (addr=0x53) */
503 #define DA9055_RTC_SEC 0x3F
504 #define DA9055_RTC_MONITOR_EN 0x40
505 #define DA9055_RTC_READ 0x80
507 /* DA9055_REG_COUNT_MI (addr=0x54) */
508 #define DA9055_RTC_MIN 0x3F
510 /* DA9055_REG_COUNT_H (addr=0x55) */
511 #define DA9055_RTC_HOUR 0x1F
513 /* DA9055_REG_COUNT_D (addr=0x56) */
514 #define DA9055_RTC_DAY 0x1F
516 /* DA9055_REG_COUNT_MO (addr=0x57) */
517 #define DA9055_RTC_MONTH 0x0F
519 /* DA9055_REG_COUNT_Y (addr=0x58) */
520 #define DA9055_RTC_YEAR 0x3F
521 #define DA9055_RTC_YEAR_BASE 2000
523 /* DA9055_REG_ALARM_MI (addr=0x59) */
524 #define DA9055_RTC_ALM_MIN 0x3F
525 #define DA9055_ALARM_STATUS_SHIFT 6
526 #define DA9055_ALARM_STATUS_MASK 0x3
527 #define DA9055_ALARM_STATUS_NO_ALARM 0x0
528 #define DA9055_ALARM_STATUS_TICK 0x1
529 #define DA9055_ALARM_STATUS_TIMER_ALARM 0x2
530 #define DA9055_ALARM_STATUS_BOTH 0x3
532 /* DA9055_REG_ALARM_H (addr=0x5A) */
533 #define DA9055_RTC_ALM_HOUR 0x1F
535 /* DA9055_REG_ALARM_D (addr=0x5B) */
536 #define DA9055_RTC_ALM_DAY 0x1F
538 /* DA9055_REG_ALARM_MO (addr=0x5C) */
539 #define DA9055_RTC_ALM_MONTH 0x0F
540 #define DA9055_RTC_TICK_WAKE_MASK 0x20
541 #define DA9055_RTC_TICK_WAKE_SHIFT 5
542 #define DA9055_RTC_TICK_TYPE 0x10
543 #define DA9055_RTC_TICK_TYPE_SHIFT 0x4
544 #define DA9055_RTC_TICK_SEC 0x0
545 #define DA9055_RTC_TICK_MIN 0x1
546 #define DA9055_ALARAM_TICK_WAKE 0x20
548 /* DA9055_REG_ALARM_Y (addr=0x5D) */
549 #define DA9055_RTC_TICK_EN 0x80
550 #define DA9055_RTC_ALM_EN 0x40
551 #define DA9055_RTC_TICK_ALM_MASK 0xC0
552 #define DA9055_RTC_ALM_YEAR 0x3F
554 /* DA9055_REG_TRIM_CLDR (addr=0x62) */
555 #define DA9055_TRIM_32K_SHIFT 0
556 #define DA9055_TRIM_32K_MASK 0x7F
557 #define DA9055_TRIM_DECREMENT (1<<7)
558 #define DA9055_TRIM_INCREMENT (0<<7)
559 #define DA9055_TRIM_VAL_BASE 0x0
560 #define DA9055_TRIM_PPM_BASE 0x0 /* min val in units of 0.1PPM */
561 #define DA9055_TRIM_PPM_INC 19 /* min inc in units of 0.1PPM */
562 #define DA9055_TRIM_STEPS 127
564 /* DA9055_REG_CONFIG_A (addr=0x65) */
565 #define DA9055_PM_I_V_VDDCORE (0<<0)
566 #define DA9055_PM_I_V_VDD_IO (1<<0)
567 #define DA9055_VDD_FAULT_TYPE_ACT_LOW (0<<1)
568 #define DA9055_VDD_FAULT_TYPE_ACT_HIGH (1<<1)
569 #define DA9055_PM_O_TYPE_PUSH_PULL (0<<2)
570 #define DA9055_PM_O_TYPE_OPEN_DRAIN (1<<2)
571 #define DA9055_IRQ_TYPE_ACT_LOW (0<<3)
572 #define DA9055_IRQ_TYPE_ACT_HIGH (1<<3)
573 #define DA9055_NIRQ_MODE_IMM (0<<4)
574 #define DA9055_NIRQ_MODE_ACTIVE (1<<4)
575 #define DA9055_GPI_V_VDDCORE (0<<5)
576 #define DA9055_GPI_V_VDD_IO (1<<5)
577 #define DA9055_PM_IF_V_VDDCORE (0<<6)
578 #define DA9055_PM_IF_V_VDD_IO (1<<6)
580 /* DA9055_REG_CONFIG_B (addr=0x66) */
581 #define DA9055_VDD_FAULT_VAL_SHIFT 0
582 #define DA9055_VDD_FAULT_VAL_MASK 0xF
583 #define DA9055_VDD_FAULT_VAL_BASE 0x0
584 #define DA9055_VDD_FAULT_VAL_MAX DA9055_VDD_FAULT_VAL_MASK
585 #define DA9055_VDD_FAULT_VOLT_BASE 2500
586 #define DA9055_VDD_FAULT_VOLT_INC 50
587 #define DA9055_VDD_FAULT_STEPS 15
589 #define DA9055_VDD_HYST_VAL_SHIFT 4
590 #define DA9055_VDD_HYST_VAL_MASK 0x7
591 #define DA9055_VDD_HYST_VAL_BASE 0x0
592 #define DA9055_VDD_HYST_VAL_MAX DA9055_VDD_HYST_VAL_MASK
593 #define DA9055_VDD_HYST_VOLT_BASE 100
594 #define DA9055_VDD_HYST_VOLT_INC 50
595 #define DA9055_VDD_HYST_STEPS 7
596 #define DA9055_VDD_HYST_VOLT_MIN DA9055_VDD_HYST_VOLT_BASE
598 #define DA9055_VDD_FAULT_EN_SHIFT 7
600 /* DA9055_REG_CONFIG_C (addr=0x67) */
601 #define DA9055_BCORE_CLK_INV_SHIFT 0
602 #define DA9055_BMEM_CLK_INV_SHIFT 1
603 #define DA9055_NFAULT_CONF_SHIFT 2
604 #define DA9055_LDO_SD_SHIFT 4
605 #define DA9055_LDO5_BYP_SHIFT 6
606 #define DA9055_LDO6_BYP_SHIFT 7
608 /* DA9055_REG_CONFIG_D (addr=0x68) */
609 #define DA9055_NONKEY_PIN_SHIFT 0
610 #define DA9055_NONKEY_PIN_MASK 0x3
611 #define DA9055_NONKEY_PIN_PORT_MODE 0x0
612 #define DA9055_NONKEY_PIN_KEY_MODE 0x1
613 #define DA9055_NONKEY_PIN_MULTI_FUNC 0x2
614 #define DA9055_NONKEY_PIN_DEDICT 0x3
615 #define DA9055_NONKEY_SD_SHIFT 2
616 #define DA9055_KEY_DELAY_SHIFT 3
617 #define DA9055_KEY_DELAY_MASK 0x3
618 #define DA9055_KEY_DELAY_4S 0x0
619 #define DA9055_KEY_DELAY_6S 0x1
620 #define DA9055_KEY_DELAY_8S 0x2
621 #define DA9055_KEY_DELAY_10S 0x3
623 /* DA9055_REG_CONFIG_E (addr=0x69) */
624 #define DA9055_GPIO_PUPD_PULL_UP 0x0
625 #define DA9055_GPIO_PUPD_OPEN_DRAIN 0x1
626 #define DA9055_GPIO0_PUPD_SHIFT 0
627 #define DA9055_GPIO1_PUPD_SHIFT 1
628 #define DA9055_GPIO2_PUPD_SHIFT 2
629 #define DA9055_UVOV_DELAY_SHIFT 4
630 #define DA9055_UVOV_DELAY_MASK 0x3
631 #define DA9055_RESET_DURATION_SHIFT 6
632 #define DA9055_RESET_DURATION_MASK 0x3
633 #define DA9055_RESET_DURATION_0MS 0x0
634 #define DA9055_RESET_DURATION_100MS 0x1
635 #define DA9055_RESET_DURATION_500MS 0x2
636 #define DA9055_RESET_DURATION_1000MS 0x3
638 /* DA9055_REG_MON_REG_1 (addr=0x6A) */
639 #define DA9055_MON_THRES_SHIFT 0
640 #define DA9055_MON_THRES_MASK 0x3
641 #define DA9055_MON_RES_SHIFT 2
642 #define DA9055_MON_DEB_SHIFT 3
643 #define DA9055_MON_MODE_SHIFT 4
644 #define DA9055_MON_MODE_MASK 0x3
645 #define DA9055_START_MAX_SHIFT 6
646 #define DA9055_START_MAX_MASK 0x3
648 /* DA9055_REG_MON_REG_2 (addr=0x6B) */
649 #define DA9055_LDO1_MON_EN_SHIFT 0
650 #define DA9055_LDO2_MON_EN_SHIFT 1
651 #define DA9055_LDO3_MON_EN_SHIFT 2
652 #define DA9055_LDO4_MON_EN_SHIFT 3
653 #define DA9055_LDO5_MON_EN_SHIFT 4
654 #define DA9055_LDO6_MON_EN_SHIFT 5
655 #define DA9055_BCORE_MON_EN_SHIFT 6
656 #define DA9055_BMEM_MON_EN_SHIFT 7
658 /* DA9055_REG_CONFIG_F (addr=0x6C) */
659 #define DA9055_LDO1_DEF_SHIFT 0
660 #define DA9055_LDO2_DEF_SHIFT 1
661 #define DA9055_LDO3_DEF_SHIFT 2
662 #define DA9055_LDO4_DEF_SHIFT 3
663 #define DA9055_LDO5_DEF_SHIFT 4
664 #define DA9055_LDO6_DEF_SHIFT 5
665 #define DA9055_BCORE_DEF_SHIFT 6
666 #define DA9055_BMEM_DEF_SHIFT 7
668 /* DA9055_REG_MON_REG_4 (addr=0x6D) */
669 #define DA9055_MON_A8_IDX_SHIFT 0
670 #define DA9055_MON_A89_IDX_MASK 0x3
671 #define DA9055_MON_A89_IDX_NONE 0x0
672 #define DA9055_MON_A89_IDX_BUCKCORE 0x1
673 #define DA9055_MON_A89_IDX_LDO3 0x2
674 #define DA9055_MON_A9_IDX_SHIFT 5
676 /* DA9055_REG_MON_REG_5 (addr=0x6E) */
677 #define DA9055_MON_A10_IDX_SHIFT 0
678 #define DA9055_MON_A10_IDX_MASK 0x3
679 #define DA9055_MON_A10_IDX_NONE 0x0
680 #define DA9055_MON_A10_IDX_LDO1 0x1
681 #define DA9055_MON_A10_IDX_LDO2 0x2
682 #define DA9055_MON_A10_IDX_LDO5 0x3
683 #define DA9055_MON_A10_IDX_LDO6 0x4
685 #endif /* __DA9055_REG_H */
projects / librecmc / linux-libre.git / blob