include/linux/mailbox/mtk-cmdq-mailbox.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2018 MediaTek Inc.
   4  *
   5  */
   6
   7 #ifndef __MTK_CMDQ_MAILBOX_H__
   8 #define __MTK_CMDQ_MAILBOX_H__
   9
  10 #include <linux/platform_device.h>
  11 #include <linux/slab.h>
  12 #include <linux/types.h>
  13
  14 #define CMDQ_INST_SIZE                  8 /* instruction is 64-bit */
  15 #define CMDQ_SUBSYS_SHIFT               16
  16 #define CMDQ_OP_CODE_SHIFT              24
  17 #define CMDQ_JUMP_PASS                  CMDQ_INST_SIZE
  18
  19 #define CMDQ_WFE_UPDATE                 BIT(31)
  20 #define CMDQ_WFE_WAIT                   BIT(15)
  21 #define CMDQ_WFE_WAIT_VALUE             0x1
  22
  23 /** cmdq event maximum */
  24 #define CMDQ_MAX_EVENT                  0x3ff
  25
  26 /*
  27  * CMDQ_CODE_MASK:
  28  *   set write mask
  29  *   format: op mask
  30  * CMDQ_CODE_WRITE:
  31  *   write value into target register
  32  *   format: op subsys address value
  33  * CMDQ_CODE_JUMP:
  34  *   jump by offset
  35  *   format: op offset
  36  * CMDQ_CODE_WFE:
  37  *   wait for event and clear
  38  *   it is just clear if no wait
  39  *   format: [wait]  op event update:1 to_wait:1 wait:1
  40  *           [clear] op event update:1 to_wait:0 wait:0
  41  * CMDQ_CODE_EOC:
  42  *   end of command
  43  *   format: op irq_flag
  44  */
  45 enum cmdq_code {
  46         CMDQ_CODE_MASK = 0x02,
  47         CMDQ_CODE_WRITE = 0x04,
  48         CMDQ_CODE_JUMP = 0x10,
  49         CMDQ_CODE_WFE = 0x20,
  50         CMDQ_CODE_EOC = 0x40,
  51 };
  52
  53 enum cmdq_cb_status {
  54         CMDQ_CB_NORMAL = 0,
  55         CMDQ_CB_ERROR
  56 };
  57
  58 struct cmdq_cb_data {
  59         enum cmdq_cb_status     sta;
  60         void                    *data;
  61 };
  62
  63 typedef void (*cmdq_async_flush_cb)(struct cmdq_cb_data data);
  64
  65 struct cmdq_task_cb {
  66         cmdq_async_flush_cb     cb;
  67         void                    *data;
  68 };
  69
  70 struct cmdq_pkt {
  71         void                    *va_base;
  72         dma_addr_t              pa_base;
  73         size_t                  cmd_buf_size; /* command occupied size */
  74         size_t                  buf_size; /* real buffer size */
  75         struct cmdq_task_cb     cb;
  76         struct cmdq_task_cb     async_cb;
  77         void                    *cl;
  78 };
  79
  80 #endif /* __MTK_CMDQ_MAILBOX_H__ */