1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __DT_BINDINGS_IMX8_PD_H
7 #define __DT_BINDINGS_IMX8_PD_H
10 * These defines are used to indicate a resource. Resources include peripherals
11 * and bus masters (but not memory regions). Note items from list should
12 * never be changed or removed (only added to at the end of the list).
14 #define PD_DC_0 dc0_power_domain
15 #define PD_DC_0_PLL_0 dc0_pll0
16 #define PD_DC_0_PLL_1 dc0_pll1
17 #define PD_LVDS0 lvds0_power_domain
18 #define PD_LVDS0_I2C0 lvds0_i2c0
19 #define PD_LVDS0_I2C1 lvds0_i2c1
20 #define PD_LVDS0_PWM lvds0_pwm
21 #define PD_LVDS0_PWM lvds0_pwm
22 #define PD_LVDS0_GPIO lvds0_gpio
23 #define PD_DC_1 dc1_power_domain
24 #define PD_DC_1_PLL_0 dc1_pll0
25 #define PD_DC_1_PLL_1 dc1_pll1
26 #define PD_LVDS1 lvds1_power_domain
27 #define PD_LVDS1_I2C0 lvds1_i2c0
28 #define PD_LVDS1_I2C1 lvds1_i2c1
29 #define PD_LVDS1_PWM lvds1_pwm
30 #define PD_LVDS1_GPIO lvds1_gpio
32 #define PD_DMA dma_power_domain
33 #define PD_DMA_SPI_0 dma_spi0
34 #define PD_DMA_SPI_1 dma_spi1
35 #define PD_DMA_SPI_2 dma_spi2
36 #define PD_DMA_SPI_3 dma_spi3
37 #define PD_DMA_UART0 dma_lpuart0
38 #define PD_DMA_UART1 dma_lpuart1
39 #define PD_DMA_UART2 dma_lpuart2
40 #define PD_DMA_UART3 dma_lpuart3
41 #define PD_DMA_UART4 dma_lpuart4
42 #define PD_DMA_EMVSIM_0 dma_emvsim0
43 #define PD_DMA_EMVSIM_1 dma_emvsim1
44 #define PD_DMA_I2C_0 dma_lpi2c0
45 #define PD_DMA_I2C_1 dma_lpi2c1
46 #define PD_DMA_I2C_2 dma_lpi2c2
47 #define PD_DMA_I2C_3 dma_lpi2c3
48 #define PD_DMA_I2C_4 dma_lpi2c4
49 #define PD_DMA_ADC_0 dma_adc0
50 #define PD_DMA_ADC_1 dma_adc1
51 #define PD_DMA_FTM_0 dma_ftm0
52 #define PD_DMA_FTM_1 dma_ftm1
53 #define PD_DMA_CAN_0 dma_flexcan0
54 #define PD_DMA_CAN_1 dma_flexcan1
55 #define PD_DMA_CAN_2 dma_flexcan2
56 #define PD_DMA_PWM_0 dma_pwm0
57 #define PD_DMA_LCD_0 dma_lcd0
59 #define PD_HSIO hsio_power_domain
60 #define PD_HSIO_PCIE_A hsio_pcie0
61 #define PD_HSIO_PCIE_B hsio_pcie1
62 #define PD_HSIO_SATA_0 hsio_sata0
63 #define PD_HSIO_GPIO hsio_gpio
65 #define PD_LCD_0 lcd0_power_domain
66 #define PD_LCD_0_I2C_0 lcd0_i2c0
67 #define PD_LCD_0_I2C_1 lcd0_i2c1
68 #define PD_LCD_PWM_0 lcd0_pwm0
70 #define PD_LSIO lsio_power_domain
71 #define PD_LSIO_GPIO_0 lsio_gpio0
72 #define PD_LSIO_GPIO_1 lsio_gpio1
73 #define PD_LSIO_GPIO_2 lsio_gpio2
74 #define PD_LSIO_GPIO_3 lsio_gpio3
75 #define PD_LSIO_GPIO_4 lsio_gpio4
76 #define PD_LSIO_GPIO_5 lsio_gpio5
77 #define PD_LSIO_GPIO_6 lsio_gpio6
78 #define PD_LSIO_GPIO_7 lsio_gpio7
79 #define PD_LSIO_GPT_0 lsio_gpt0
80 #define PD_LSIO_GPT_1 lsio_gpt1
81 #define PD_LSIO_GPT_2 lsio_gpt2
82 #define PD_LSIO_GPT_3 lsio_gpt3
83 #define PD_LSIO_GPT_4 lsio_gpt4
84 #define PD_LSIO_KPP lsio_kpp
85 #define PD_LSIO_FSPI_0 lsio_fspi0
86 #define PD_LSIO_FSPI_1 lsio_fspi1
87 #define PD_LSIO_PWM_0 lsio_pwm0
88 #define PD_LSIO_PWM_1 lsio_pwm1
89 #define PD_LSIO_PWM_2 lsio_pwm2
90 #define PD_LSIO_PWM_3 lsio_pwm3
91 #define PD_LSIO_PWM_4 lsio_pwm4
92 #define PD_LSIO_PWM_5 lsio_pwm5
93 #define PD_LSIO_PWM_6 lsio_pwm6
94 #define PD_LSIO_PWM_7 lsio_pwm7
96 #define PD_CONN connectivity_power_domain
97 #define PD_CONN_SDHC_0 conn_sdhc0
98 #define PD_CONN_SDHC_1 conn_sdhc1
99 #define PD_CONN_SDHC_2 conn_sdhc2
100 #define PD_CONN_ENET_0 conn_enet0
101 #define PD_CONN_ENET_1 conn_enet1
102 #define PD_CONN_MLB_0 conn_mlb0
103 #define PD_CONN_DMA_4_CH0 conn_dma4_ch0
104 #define PD_CONN_DMA_4_CH1 conn_dma4_ch1
105 #define PD_CONN_DMA_4_CH2 conn_dma4_ch2
106 #define PD_CONN_DMA_4_CH3 conn_dma4_ch3
107 #define PD_CONN_DMA_4_CH4 conn_dma4_ch4
108 #define PD_CONN_USB_0 conn_usb0
109 #define PD_CONN_USB_1 conn_usb1
110 #define PD_CONN_USB_0_PHY conn_usb0_phy
111 #define PD_CONN_USB_2 conn_usb2
112 #define PD_CONN_USB_2_PHY conn_usb2_phy
113 #define PD_CONN_NAND conn_nand
115 #define PD_AUDIO audio_power_domain
116 #define PD_AUD_SAI_0 audio_sai0
117 #define PD_AUD_SAI_1 audio_sai1
118 #define PD_AUD_SAI_2 audio_sai2
119 #define PD_AUD_ASRC_0 audio_asrc0
120 #define PD_AUD_ASRC_1 audio_asrc1
121 #define PD_AUD_ESAI_0 audio_esai0
122 #define PD_AUD_ESAI_1 audio_esai1
123 #define PD_AUD_SPDIF_0 audio_spdif0
124 #define PD_AUD_SPDIF_1 audio_spdif1
125 #define PD_AUD_SAI_3 audio_sai3
126 #define PD_AUD_SAI_4 audio_sai4
127 #define PD_AUD_SAI_5 audio_sai5
128 #define PD_AUD_SAI_6 audio_sai6
129 #define PD_AUD_SAI_7 audio_sai7
130 #define PD_AUD_GPT_5 audio_gpt5
131 #define PD_AUD_GPT_6 audio_gpt6
132 #define PD_AUD_GPT_7 audio_gpt7
133 #define PD_AUD_GPT_8 audio_gpt8
134 #define PD_AUD_GPT_9 audio_gpt9
135 #define PD_AUD_GPT_10 audio_gpt10
136 #define PD_AUD_AMIX audio_amix
137 #define PD_AUD_MQS_0 audio_mqs0
138 #define PD_AUD_HIFI audio_hifi
139 #define PD_AUD_OCRAM audio_ocram
140 #define PD_AUD_MCLK_OUT_0 audio_mclkout0
141 #define PD_AUD_MCLK_OUT_1 audio_mclkout1
142 #define PD_AUD_AUDIO_PLL_0 audio_audiopll0
143 #define PD_AUD_AUDIO_PLL_1 audio_audiopll1
144 #define PD_AUD_AUDIO_CLK_0 audio_audioclk0
145 #define PD_AUD_AUDIO_CLK_1 audio_audioclk1
147 #define PD_IMAGING imaging_power_domain
148 #define PD_IMAGING_JPEG_DEC imaging_jpeg_dec
149 #define PD_IMAGING_JPEG_ENC imaging_jpeg_enc
150 #define PD_IMAGING_PDMA0 PD_IMAGING
151 #define PD_IMAGING_PDMA1 imaging_pdma1
152 #define PD_IMAGING_PDMA2 imaging_pdma2
153 #define PD_IMAGING_PDMA3 imaging_pdma3
154 #define PD_IMAGING_PDMA4 imaging_pdma4
155 #define PD_IMAGING_PDMA5 imaging_pdma5
156 #define PD_IMAGING_PDMA6 imaging_pdma6
157 #define PD_IMAGING_PDMA7 imaging_pdma7
159 #define PD_MIPI_0_DSI mipi0_dsi_power_domain
160 #define PD_MIPI_0_DSI_I2C0 mipi0_dsi_i2c0
161 #define PD_MIPI_0_DSI_I2C1 mipi0_dsi_i2c1
162 #define PD_MIPI_0_DSI_PWM0 mipi0_dsi_pwm0
163 #define PD_MIPI_1_DSI mipi1_dsi_power_domain
164 #define PD_MIPI_1_DSI_I2C0 mipi1_dsi_i2c0
165 #define PD_MIPI_1_DSI_I2C1 mipi1_dsi_i2c1
166 #define PD_MIPI_1_DSI_PWM0 mipi1_dsi_pwm0
168 #define PD_MIPI_CSI0 mipi_csi0_power_domain
169 #define PD_MIPI_CSI0_PWM mipi_csi0_pwm
170 #define PD_MIPI_CSI0_I2C mipi_csi0_i2c
171 #define PD_MIPI_CSI1 mipi_csi1_power_domain
172 #define PD_MIPI_CSI1_PWM_0 mipi_csi1_pwm
173 #define PD_MIPI_CSI1_I2C_0 mipi_csi1_i2c
175 #define PD_HDMI hdmi_power_domain
176 #define PD_HDMI_I2C_0 hdmi_i2c
177 #define PD_HDMI_PWM_0 hdmi_pwm
178 #define PD_HDMI_GPIO_0 hdmi_gpio
180 #define PD_HDMI_RX hdmi_rx_power_domain
181 #define PD_HDMI_RX_I2C hdmi_rx_i2c
182 #define PD_HDMI_RX_PWM hdmi_rx_pwm
184 #define PD_CM40 cm40_power_domain
185 #define PD_CM40_I2C cm40_i2c
186 #define PD_CM40_INTMUX cm40_intmux
188 #endif /* __DT_BINDINGS_IMX8_PD_H */