1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2018 MediaTek Inc.
6 #ifndef _DT_BINDINGS_MTK_RESET_H_
7 #define _DT_BINDINGS_MTK_RESET_H_
10 #define ETHSYS_PPE_RST 31
11 #define ETHSYS_GMAC_RST 23
12 #define ETHSYS_FE_RST 6
13 #define ETHSYS_MCM_RST 2
14 #define ETHSYS_SYS_RST 0
17 #define HIFSYS_PCIE2_RST 26
18 #define HIFSYS_PCIE1_RST 25
19 #define HIFSYS_PCIE0_RST 24
20 #define HIFSYS_UPHY1_RST 22
21 #define HIFSYS_UPHY0_RST 21
22 #define HIFSYS_UHOST1_RST 4
23 #define HIFSYS_UHOST0_RST 3
25 #endif /* _DT_BINDINGS_MTK_RESET_H_ */