2 * Synopsys HSDK SDP CGU clock driver dts bindings
4 * Copyright (C) 2017 Synopsys
5 * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #ifndef __DT_BINDINGS_CLK_HSDK_CGU_H_
13 #define __DT_BINDINGS_CLK_HSDK_CGU_H_
23 #define CLK_SYS_SDIO 8
24 #define CLK_SYS_HDMI 9
25 #define CLK_SYS_GFX_CORE 10
26 #define CLK_SYS_GFX_DMA 11
27 #define CLK_SYS_GFX_CFG 12
28 #define CLK_SYS_DMAC_CORE 13
29 #define CLK_SYS_DMAC_CFG 14
30 #define CLK_SYS_SDIO_REF 15
31 #define CLK_SYS_SPI_REF 16
32 #define CLK_SYS_I2C_REF 17
33 #define CLK_SYS_UART_REF 18
34 #define CLK_SYS_EBI_REF 19
35 #define CLK_TUN_PLL 20
37 #define CLK_HDMI_PLL 22
40 #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */