include/configs/zynq-common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
   4  * (C) Copyright 2013 - 2018 Xilinx, Inc.
   5  *
   6  * Common configuration options for all Zynq boards.
   7  */
   8
   9 #ifndef __CONFIG_ZYNQ_COMMON_H
  10 #define __CONFIG_ZYNQ_COMMON_H
  11
  12 /* CPU clock */
  13 #ifndef CONFIG_CPU_FREQ_HZ
  14 # define CONFIG_CPU_FREQ_HZ     800000000
  15 #endif
  16
  17 /* Cache options */
  18 #define CONFIG_SYS_L2CACHE_OFF
  19 #ifndef CONFIG_SYS_L2CACHE_OFF
  20 # define CONFIG_SYS_L2_PL310
  21 # define CONFIG_SYS_PL310_BASE          0xf8f02000
  22 #endif
  23
  24 #define ZYNQ_SCUTIMER_BASEADDR          0xF8F00600
  25 #define CONFIG_SYS_TIMERBASE            ZYNQ_SCUTIMER_BASEADDR
  26 #define CONFIG_SYS_TIMER_COUNTS_DOWN
  27 #define CONFIG_SYS_TIMER_COUNTER        (CONFIG_SYS_TIMERBASE + 0x4)
  28
  29 /* Serial drivers */
  30 /* The following table includes the supported baudrates */
  31 #define CONFIG_SYS_BAUDRATE_TABLE  \
  32         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  33
  34 #define CONFIG_ARM_DCC
  35
  36 /* Ethernet driver */
  37 #if defined(CONFIG_ZYNQ_GEM)
  38 # define CONFIG_MII
  39 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  40 # define CONFIG_BOOTP_MAY_FAIL
  41 #endif
  42
  43 /* QSPI */
  44 #ifdef CONFIG_ZYNQ_QSPI
  45 # define CONFIG_SF_DEFAULT_SPEED        30000000
  46 # define CONFIG_SPI_FLASH_ISSI
  47 #endif
  48
  49 /* NOR */
  50 #ifdef CONFIG_MTD_NOR_FLASH
  51 # define CONFIG_SYS_FLASH_BASE          0xE2000000
  52 # define CONFIG_SYS_FLASH_SIZE          (16 * 1024 * 1024)
  53 # define CONFIG_SYS_MAX_FLASH_BANKS     1
  54 # define CONFIG_SYS_MAX_FLASH_SECT      512
  55 # define CONFIG_SYS_FLASH_ERASE_TOUT    1000
  56 # define CONFIG_SYS_FLASH_WRITE_TOUT    5000
  57 # define CONFIG_FLASH_SHOW_PROGRESS     10
  58 # define CONFIG_SYS_FLASH_CFI
  59 # undef CONFIG_SYS_FLASH_EMPTY_INFO
  60 # define CONFIG_FLASH_CFI_DRIVER
  61 # undef CONFIG_SYS_FLASH_PROTECTION
  62 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  63 #endif
  64
  65 #ifdef CONFIG_NAND_ZYNQ
  66 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  67 #define CONFIG_SYS_NAND_ONFI_DETECTION
  68 #define CONFIG_MTD_DEVICE
  69 #endif
  70
  71 #ifdef CONFIG_USB_EHCI_ZYNQ
  72 # define CONFIG_EHCI_IS_TDI
  73
  74 # define CONFIG_SYS_DFU_DATA_BUF_SIZE   0x600000
  75 # define DFU_DEFAULT_POLL_TIMEOUT       300
  76 # define CONFIG_USB_CABLE_CHECK
  77 # define CONFIG_THOR_RESET_OFF
  78 # define DFU_ALT_INFO_RAM \
  79         "dfu_ram_info=" \
  80         "set dfu_alt_info " \
  81         "${kernel_image} ram 0x3000000 0x500000\\\\;" \
  82         "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
  83         "${ramdisk_image} ram 0x2000000 0x600000\0" \
  84         "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
  85         "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
  86
  87 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
  88 #  define DFU_ALT_INFO_MMC \
  89         "dfu_mmc_info=" \
  90         "set dfu_alt_info " \
  91         "${kernel_image} fat 0 1\\\\;" \
  92         "${devicetree_image} fat 0 1\\\\;" \
  93         "${ramdisk_image} fat 0 1\0" \
  94         "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
  95         "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
  96
  97 #  define DFU_ALT_INFO  \
  98         DFU_ALT_INFO_RAM \
  99         DFU_ALT_INFO_MMC
 100 # else
 101 #  define DFU_ALT_INFO  \
 102         DFU_ALT_INFO_RAM
 103 # endif
 104 #endif
 105
 106 #if !defined(DFU_ALT_INFO)
 107 # define DFU_ALT_INFO
 108 #endif
 109
 110 /* I2C */
 111 #if defined(CONFIG_SYS_I2C_ZYNQ)
 112 # define CONFIG_SYS_I2C
 113 #endif
 114
 115 /* EEPROM */
 116 #ifdef CONFIG_ZYNQ_EEPROM
 117 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
 118 # define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
 119 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      4
 120 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 121 # define CONFIG_SYS_EEPROM_SIZE                 1024 /* Bytes */
 122 #endif
 123
 124 /* Allow to overwrite serial and ethaddr */
 125 #define CONFIG_ENV_OVERWRITE
 126
 127 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
 128 #define CONFIG_PREBOOT
 129
 130 /* Boot configuration */
 131 #define CONFIG_SYS_LOAD_ADDR            0 /* default? */
 132
 133 /* Distro boot enablement */
 134
 135 #ifdef CONFIG_SPL_BUILD
 136 #define BOOTENV
 137 #else
 138
 139 #ifdef CONFIG_CMD_MMC
 140 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
 141 #else
 142 #define BOOT_TARGET_DEVICES_MMC(func)
 143 #endif
 144
 145 #ifdef CONFIG_CMD_USB
 146 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
 147 #else
 148 #define BOOT_TARGET_DEVICES_USB(func)
 149 #endif
 150
 151 #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
 152 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
 153 #else
 154 #define BOOT_TARGET_DEVICES_PXE(func)
 155 #endif
 156
 157 #if defined(CONFIG_CMD_DHCP)
 158 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
 159 #else
 160 #define BOOT_TARGET_DEVICES_DHCP(func)
 161 #endif
 162
 163 #define BOOT_TARGET_DEVICES(func) \
 164         BOOT_TARGET_DEVICES_MMC(func) \
 165         BOOT_TARGET_DEVICES_USB(func) \
 166         BOOT_TARGET_DEVICES_PXE(func) \
 167         BOOT_TARGET_DEVICES_DHCP(func)
 168
 169 #include <config_distro_bootcmd.h>
 170 #endif /* CONFIG_SPL_BUILD */
 171
 172 /* Default environment */
 173 #ifndef CONFIG_EXTRA_ENV_SETTINGS
 174 #define CONFIG_EXTRA_ENV_SETTINGS       \
 175         "fit_image=fit.itb\0"           \
 176         "load_addr=0x2000000\0"         \
 177         "fit_size=0x800000\0"           \
 178         "flash_off=0x100000\0"          \
 179         "nor_flash_off=0xE2100000\0"    \
 180         "fdt_high=0x20000000\0"         \
 181         "initrd_high=0x20000000\0"      \
 182         "loadbootenv_addr=0x2000000\0" \
 183         "fdt_addr_r=0x1f00000\0"        \
 184         "pxefile_addr_r=0x2000000\0"    \
 185         "kernel_addr_r=0x2000000\0"     \
 186         "scriptaddr=0x3000000\0"        \
 187         "ramdisk_addr_r=0x3100000\0"    \
 188         "bootenv=uEnv.txt\0" \
 189         "bootenv_dev=mmc\0" \
 190         "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
 191         "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
 192                 "env import -t ${loadbootenv_addr} $filesize\0" \
 193         "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
 194         "setbootenv=if env run bootenv_existence_test; then " \
 195                         "if env run loadbootenv; then " \
 196                                 "env run importbootenv; " \
 197                         "fi; " \
 198                 "fi; \0" \
 199         "sd_loadbootenv=set bootenv_dev mmc && " \
 200                         "run setbootenv \0" \
 201         "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
 202         "preboot=if test $modeboot = sdboot; then " \
 203                         "run sd_loadbootenv; " \
 204                         "echo Checking if uenvcmd is set ...; " \
 205                         "if test -n $uenvcmd; then " \
 206                                 "echo Running uenvcmd ...; " \
 207                                 "run uenvcmd; " \
 208                         "fi; " \
 209                 "fi; \0" \
 210         "norboot=echo Copying FIT from NOR flash to RAM... && " \
 211                 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
 212                 "bootm ${load_addr}\0" \
 213         "sdboot=echo Copying FIT from SD to RAM... && " \
 214                 "load mmc 0 ${load_addr} ${fit_image} && " \
 215                 "bootm ${load_addr}\0" \
 216         "jtagboot=echo TFTPing FIT to RAM... && " \
 217                 "tftpboot ${load_addr} ${fit_image} && " \
 218                 "bootm ${load_addr}\0" \
 219         "usbboot=if usb start; then " \
 220                         "echo Copying FIT from USB to RAM... && " \
 221                         "load usb 0 ${load_addr} ${fit_image} && " \
 222                         "bootm ${load_addr}; fi\0" \
 223                 DFU_ALT_INFO \
 224                 BOOTENV
 225 #endif
 226
 227 /* Miscellaneous configurable options */
 228
 229 #define CONFIG_CLOCKS
 230 #define CONFIG_SYS_MAXARGS              32 /* max number of command args */
 231
 232 #ifndef CONFIG_NR_DRAM_BANKS
 233 # define CONFIG_NR_DRAM_BANKS           1
 234 #endif
 235
 236 #define CONFIG_SYS_MEMTEST_START        0
 237 #define CONFIG_SYS_MEMTEST_END          0x1000
 238
 239 #define CONFIG_SYS_MALLOC_LEN           0x1400000
 240
 241 #define CONFIG_SYS_INIT_RAM_ADDR        0xFFFF0000
 242 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
 243 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 244                                         CONFIG_SYS_INIT_RAM_SIZE - \
 245                                         GENERATED_GBL_DATA_SIZE)
 246
 247
 248 /* Extend size of kernel image for uncompression */
 249 #define CONFIG_SYS_BOOTM_LEN    (60 * 1024 * 1024)
 250
 251 /* Boot FreeBSD/vxWorks from an ELF image */
 252 #define CONFIG_SYS_MMC_MAX_DEVICE       1
 253
 254 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
 255
 256 /* Commands */
 257
 258 /* SPL part */
 259
 260 /* MMC support */
 261 #ifdef CONFIG_MMC_SDHCI_ZYNQ
 262 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
 263 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
 264 #endif
 265
 266 /* Disable dcache for SPL just for sure */
 267 #ifdef CONFIG_SPL_BUILD
 268 #define CONFIG_SYS_DCACHE_OFF
 269 #endif
 270
 271 /* Address in RAM where the parameters must be copied by SPL. */
 272 #define CONFIG_SYS_SPL_ARGS_ADDR        0x10000000
 273
 274 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "system.dtb"
 275 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
 276
 277 /* Not using MMC raw mode - just for compilation purpose */
 278 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0
 279 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0
 280 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
 281
 282 /* qspi mode is working fine */
 283 #ifdef CONFIG_ZYNQ_QSPI
 284 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x100000
 285 #define CONFIG_SYS_SPI_ARGS_OFFS        0x200000
 286 #define CONFIG_SYS_SPI_ARGS_SIZE        0x80000
 287 #define CONFIG_SYS_SPI_KERNEL_OFFS      (CONFIG_SYS_SPI_ARGS_OFFS + \
 288                                         CONFIG_SYS_SPI_ARGS_SIZE)
 289 #endif
 290
 291 /* for booting directly linux */
 292
 293 /* SP location before relocation, must use scratch RAM */
 294 #define CONFIG_SPL_TEXT_BASE    0x0
 295
 296 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
 297 #define CONFIG_SPL_MAX_SIZE     0x30000
 298
 299 /* On the top of OCM space */
 300 #define CONFIG_SYS_SPL_MALLOC_START     CONFIG_SPL_STACK_R_ADDR
 301 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x2000000
 302
 303 /*
 304  * SPL stack position - and stack goes down
 305  * 0xfffffe00 is used for putting wfi loop.
 306  * Set it up as limit for now.
 307  */
 308 #define CONFIG_SPL_STACK        0xfffffe00
 309
 310 /* BSS setup */
 311 #define CONFIG_SPL_BSS_START_ADDR       0x100000
 312 #define CONFIG_SPL_BSS_MAX_SIZE         0x100000
 313
 314 #define CONFIG_SYS_UBOOT_START  CONFIG_SYS_TEXT_BASE
 315
 316 #endif /* __CONFIG_ZYNQ_COMMON_H */