2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 Xilinx, Inc.
5 * Common configuration options for all Zynq boards.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
13 /* High Level configuration Options */
18 #ifndef CONFIG_CPU_FREQ_HZ
19 # define CONFIG_CPU_FREQ_HZ 800000000
23 #define CONFIG_CMD_CACHE
24 #define CONFIG_SYS_CACHELINE_SIZE 32
26 #define CONFIG_SYS_L2CACHE_OFF
27 #ifndef CONFIG_SYS_L2CACHE_OFF
28 # define CONFIG_SYS_L2_PL310
29 # define CONFIG_SYS_PL310_BASE 0xf8f02000
33 #define CONFIG_BAUDRATE 115200
34 /* The following table includes the supported baudrates */
35 #define CONFIG_SYS_BAUDRATE_TABLE \
36 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
39 #if defined(CONFIG_ZYNQ_DCC)
40 # define CONFIG_ARM_DCC
41 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
43 # define CONFIG_ZYNQ_SERIAL
47 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
48 # define CONFIG_NET_MULTI
49 # define CONFIG_ZYNQ_GEM
51 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
52 # define CONFIG_PHYLIB
53 # define CONFIG_PHY_MARVELL
57 #ifdef CONFIG_ZYNQ_SPI
58 # define CONFIG_SPI_FLASH
59 # define CONFIG_SPI_FLASH_SST
60 # define CONFIG_CMD_SF
64 #ifndef CONFIG_SYS_NO_FLASH
65 # define CONFIG_SYS_FLASH_BASE 0xE2000000
66 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
67 # define CONFIG_SYS_MAX_FLASH_BANKS 1
68 # define CONFIG_SYS_MAX_FLASH_SECT 512
69 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
70 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
71 # define CONFIG_FLASH_SHOW_PROGRESS 10
72 # define CONFIG_SYS_FLASH_CFI
73 # undef CONFIG_SYS_FLASH_EMPTY_INFO
74 # define CONFIG_FLASH_CFI_DRIVER
75 # undef CONFIG_SYS_FLASH_PROTECTION
76 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
80 #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
82 # define CONFIG_GENERIC_MMC
84 # define CONFIG_ZYNQ_SDHCI
85 # define CONFIG_CMD_MMC
88 #ifdef CONFIG_ZYNQ_USB
89 # define CONFIG_USB_EHCI
90 # define CONFIG_CMD_USB
91 # define CONFIG_USB_STORAGE
92 # define CONFIG_USB_EHCI_ZYNQ
93 # define CONFIG_USB_ULPI_VIEWPORT
94 # define CONFIG_USB_ULPI
95 # define CONFIG_EHCI_IS_TDI
96 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2
99 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
100 # define CONFIG_SUPPORT_VFAT
101 # define CONFIG_CMD_FAT
102 # define CONFIG_CMD_EXT2
103 # define CONFIG_FAT_WRITE
104 # define CONFIG_DOS_PARTITION
105 # define CONFIG_CMD_EXT4
106 # define CONFIG_CMD_EXT4_WRITE
109 #define CONFIG_SYS_I2C_ZYNQ
111 #if defined(CONFIG_SYS_I2C_ZYNQ)
112 # define CONFIG_CMD_I2C
113 # define CONFIG_SYS_I2C
114 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
115 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
119 #ifdef CONFIG_ZYNQ_EEPROM
120 # define CONFIG_CMD_EEPROM
121 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
122 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
123 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
124 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
125 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
128 #define CONFIG_BOOTP_SERVERIP
129 #define CONFIG_BOOTP_BOOTPATH
130 #define CONFIG_BOOTP_GATEWAY
131 #define CONFIG_BOOTP_HOSTNAME
132 #define CONFIG_BOOTP_MAY_FAIL
134 /* Total Size of Environment Sector */
135 #define CONFIG_ENV_SIZE (128 << 10)
137 /* Allow to overwrite serial and ethaddr */
138 #define CONFIG_ENV_OVERWRITE
141 #ifndef CONFIG_ENV_IS_NOWHERE
142 # ifndef CONFIG_SYS_NO_FLASH
143 # define CONFIG_ENV_IS_IN_FLASH
144 # elif defined(CONFIG_SYS_NO_FLASH)
145 # define CONFIG_ENV_IS_NOWHERE
148 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
149 # define CONFIG_ENV_OFFSET 0xE0000
150 # define CONFIG_CMD_SAVEENV
153 /* Default environment */
154 #define CONFIG_EXTRA_ENV_SETTINGS \
155 "fit_image=fit.itb\0" \
156 "load_addr=0x2000000\0" \
157 "fit_size=0x800000\0" \
158 "flash_off=0x100000\0" \
159 "nor_flash_off=0xE2100000\0" \
160 "fdt_high=0x20000000\0" \
161 "initrd_high=0x20000000\0" \
162 "norboot=echo Copying FIT from NOR flash to RAM... && " \
163 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
164 "bootm ${load_addr}\0" \
165 "sdboot=echo Copying FIT from SD to RAM... && " \
166 "fatload mmc 0 ${load_addr} ${fit_image} && " \
167 "bootm ${load_addr}\0" \
168 "jtagboot=echo TFTPing FIT to RAM... && " \
169 "tftpboot ${load_addr} ${fit_image} && " \
170 "bootm ${load_addr}\0" \
171 "usbboot=if usb start; then " \
172 "echo Copying FIT from USB to RAM... && " \
173 "fatload usb 0 ${load_addr} ${fit_image} && " \
174 "bootm ${load_addr}\0" \
177 #define CONFIG_BOOTCOMMAND "run $modeboot"
178 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
179 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
181 /* Miscellaneous configurable options */
182 #define CONFIG_SYS_PROMPT "zynq-uboot> "
183 #define CONFIG_SYS_HUSH_PARSER
185 #define CONFIG_CMDLINE_EDITING
186 #define CONFIG_AUTO_COMPLETE
187 #define CONFIG_BOARD_LATE_INIT
188 #define CONFIG_SYS_LONGHELP
189 #define CONFIG_CLOCKS
190 #define CONFIG_CMD_CLK
191 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
192 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
193 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
194 sizeof(CONFIG_SYS_PROMPT) + 16)
196 /* Physical Memory map */
197 #define CONFIG_SYS_TEXT_BASE 0x4000000
199 #define CONFIG_NR_DRAM_BANKS 1
200 #define CONFIG_SYS_SDRAM_BASE 0
202 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
203 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
205 #define CONFIG_SYS_MALLOC_LEN 0x400000
206 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
207 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
208 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
209 CONFIG_SYS_INIT_RAM_SIZE - \
210 GENERATED_GBL_DATA_SIZE)
212 /* Enable the PL to be downloaded */
214 #define CONFIG_FPGA_XILINX
215 #define CONFIG_FPGA_ZYNQPL
216 #define CONFIG_CMD_FPGA
217 #define CONFIG_CMD_FPGA_LOADMK
218 #define CONFIG_CMD_FPGA_LOADP
219 #define CONFIG_CMD_FPGA_LOADBP
220 #define CONFIG_CMD_FPGA_LOADFS
222 /* Open Firmware flat tree */
223 #define CONFIG_OF_LIBFDT
227 #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
228 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
231 #define CONFIG_OF_CONTROL
232 #define CONFIG_OF_SEPARATE
233 #define CONFIG_DISPLAY_BOARDINFO_LATE
236 #define CONFIG_FIT_SIGNATURE
239 /* Extend size of kernel image for uncompression */
240 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
242 /* Boot FreeBSD/vxWorks from an ELF image */
243 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
245 # define CONFIG_CMD_ELF
246 # define CONFIG_SYS_MMC_MAX_DEVICE 1
249 #define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds"
252 #include <config_cmd_default.h>
254 #define CONFIG_CMD_PING
255 #define CONFIG_CMD_DHCP
256 #define CONFIG_CMD_MII
257 #define CONFIG_CMD_TFTPPUT
261 #define CONFIG_CMD_SPL
262 #define CONFIG_SPL_FRAMEWORK
263 #define CONFIG_SPL_LIBCOMMON_SUPPORT
264 #define CONFIG_SPL_LIBGENERIC_SUPPORT
265 #define CONFIG_SPL_SERIAL_SUPPORT
266 #define CONFIG_SPL_BOARD_INIT
268 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
271 #ifdef CONFIG_ZYNQ_SDHCI0
272 #define CONFIG_SPL_MMC_SUPPORT
273 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
274 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
275 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
276 #define CONFIG_SPL_LIBDISK_SUPPORT
277 #define CONFIG_SPL_FAT_SUPPORT
278 #if defined(CONFIG_OF_CONTROL) && defined(CONFIG_OF_SEPARATE)
279 # define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
281 # define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
285 /* Disable dcache for SPL just for sure */
286 #ifdef CONFIG_SPL_BUILD
287 #define CONFIG_SYS_DCACHE_OFF
289 #undef CONFIG_OF_CONTROL
292 /* Address in RAM where the parameters must be copied by SPL. */
293 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
295 #define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb"
296 #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
298 /* Not using MMC raw mode - just for compilation purpose */
299 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
300 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
301 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
303 /* qspi mode is working fine */
304 #ifdef CONFIG_ZYNQ_QSPI
305 #define CONFIG_SPL_SPI_SUPPORT
306 #define CONFIG_SPL_SPI_LOAD
307 #define CONFIG_SPL_SPI_FLASH_SUPPORT
308 #define CONFIG_SPL_SPI_BUS 0
309 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
310 #define CONFIG_SPL_SPI_CS 0
313 /* for booting directly linux */
314 #define CONFIG_SPL_OS_BOOT
316 /* SP location before relocation, must use scratch RAM */
317 #define CONFIG_SPL_TEXT_BASE 0x0
319 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
320 #define CONFIG_SPL_MAX_SIZE 0x30000
322 /* The highest 64k OCM address */
323 #define OCM_HIGH_ADDR 0xffff0000
325 /* Just define any reasonable size */
326 #define CONFIG_SPL_STACK_SIZE 0x1000
328 /* SPL stack position - and stack goes down */
329 #define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
331 /* On the top of OCM space */
332 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
333 GENERATED_GBL_DATA_SIZE)
334 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
337 #define CONFIG_SPL_BSS_START_ADDR 0x100000
338 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
340 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
342 #endif /* __CONFIG_ZYNQ_COMMON_H */