sunxi: Add support for using MII phy-s with the GMAC nic
[oweals/u-boot.git] / include / configs / yosemite.h
1 /*
2  * (C) Copyright 2005-2007
3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 /************************************************************************
9  * yosemite.h - configuration for Yosemite & Yellowstone boards
10  ***********************************************************************/
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*-----------------------------------------------------------------------
15  * High Level Configuration Options
16  *----------------------------------------------------------------------*/
17 /* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
18 #ifndef CONFIG_YELLOWSTONE
19 #define CONFIG_440EP            1       /* Specific PPC440EP support    */
20 #define CONFIG_HOSTNAME         yosemite
21 #else
22 #define CONFIG_440GR            1       /* Specific PPC440GR support    */
23 #define CONFIG_HOSTNAME         yellowstone
24 #endif
25 #define CONFIG_440              1       /* ... PPC440 family            */
26 #define CONFIG_SYS_CLK_FREQ     66666666    /* external freq to pll     */
27
28 #define CONFIG_SYS_TEXT_BASE    0xFFF80000
29
30 /*
31  * Include common defines/options for all AMCC eval boards
32  */
33 #include "amcc-common.h"
34
35 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
36 #define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
37 #define CONFIG_BOARD_RESET      1       /* call board_reset()           */
38
39 /*-----------------------------------------------------------------------
40  * Base addresses -- Note these are effective addresses where the
41  * actual resources get mapped (not physical addresses)
42  *----------------------------------------------------------------------*/
43 #define CONFIG_SYS_FLASH_BASE           0xfc000000          /* start of FLASH   */
44 #define CONFIG_SYS_PCI_MEMBASE          0xa0000000          /* mapped pci memory*/
45 #define CONFIG_SYS_PCI_MEMBASE1        CONFIG_SYS_PCI_MEMBASE  + 0x10000000
46 #define CONFIG_SYS_PCI_MEMBASE2        CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
47 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
48
49 /*Don't change either of these*/
50 #define CONFIG_SYS_PCI_BASE             0xe0000000          /* internal PCI regs*/
51 /*Don't change either of these*/
52
53 #define CONFIG_SYS_USB_DEVICE          0x50000000
54 #define CONFIG_SYS_NVRAM_BASE_ADDR     0x80000000
55 #define CONFIG_SYS_BCSR_BASE            (CONFIG_SYS_NVRAM_BASE_ADDR | 0x2000)
56 #define CONFIG_SYS_BOOT_BASE_ADDR      0xf0000000
57
58 /*-----------------------------------------------------------------------
59  * Initial RAM & stack pointer (placed in SDRAM)
60  *----------------------------------------------------------------------*/
61 #define CONFIG_SYS_INIT_RAM_DCACHE      1               /* d-cache as init ram  */
62 #define CONFIG_SYS_INIT_RAM_ADDR        0x70000000              /* DCache       */
63 #define CONFIG_SYS_INIT_RAM_SIZE        (4 << 10)
64 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
65 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
66
67 /*-----------------------------------------------------------------------
68  * Serial Port
69  *----------------------------------------------------------------------*/
70 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
71 #define CONFIG_SYS_EXT_SERIAL_CLOCK     11059200 /* use external 11.059MHz clk  */
72
73 /*-----------------------------------------------------------------------
74  * Environment
75  *----------------------------------------------------------------------*/
76 /*
77  * Define here the location of the environment variables (FLASH or EEPROM).
78  * Note: DENX encourages to use redundant environment in FLASH.
79  */
80 #if 1
81 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
82 #else
83 #define CONFIG_ENV_IS_IN_EEPROM 1       /* use EEPROM for environment vars      */
84 #endif
85
86 /*-----------------------------------------------------------------------
87  * FLASH related
88  *----------------------------------------------------------------------*/
89 #define CONFIG_SYS_FLASH_CFI                            /* The flash is CFI compatible  */
90 #define CONFIG_FLASH_CFI_DRIVER                 /* Use common CFI driver        */
91 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1                /* AMD RESET for STM 29W320DB!  */
92
93 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
94 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
95
96 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
97 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
98
99 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* use buffered writes (20x faster)     */
100
101 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
102
103 #ifdef CONFIG_ENV_IS_IN_FLASH
104 #define CONFIG_ENV_SECT_SIZE    0x20000 /* size of one complete sector          */
105 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
106 #define CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector     */
107
108 /* Address and size of Redundant Environment Sector     */
109 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
110 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
111 #endif /* CONFIG_ENV_IS_IN_FLASH */
112
113 /*-----------------------------------------------------------------------
114  * DDR SDRAM
115  *----------------------------------------------------------------------*/
116 #undef CONFIG_SPD_EEPROM               /* Don't use SPD EEPROM for setup    */
117 #define CONFIG_SYS_KBYTES_SDRAM        (128 * 1024)    /* 128MB             */
118 #define CONFIG_SYS_SDRAM_BANKS          (2)
119
120 /*-----------------------------------------------------------------------
121  * I2C
122  *----------------------------------------------------------------------*/
123 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
124
125 #define CONFIG_SYS_I2C_MULTI_EEPROMS
126 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
127 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
128 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
129 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
130
131 #ifdef CONFIG_ENV_IS_IN_EEPROM
132 #define CONFIG_ENV_SIZE         0x200       /* Size of Environment vars */
133 #define CONFIG_ENV_OFFSET               0x0
134 #endif /* CONFIG_ENV_IS_IN_EEPROM */
135
136 /* I2C SYSMON (LM75, AD7414 is almost compatible)                       */
137 #define CONFIG_DTT_LM75         1               /* ON Semi's LM75       */
138 #define CONFIG_DTT_AD7414       1               /* use AD7414           */
139 #define CONFIG_DTT_SENSORS      {0}             /* Sensor addresses     */
140 #define CONFIG_SYS_DTT_MAX_TEMP 70
141 #define CONFIG_SYS_DTT_LOW_TEMP -30
142 #define CONFIG_SYS_DTT_HYSTERESIS       3
143
144 /*
145  * Default environment variables
146  */
147 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
148         CONFIG_AMCC_DEF_ENV                                             \
149         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
150         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
151         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
152         "kernel_addr=fc000000\0"                                        \
153         "ramdisk_addr=fc180000\0"                                       \
154         ""
155
156 #define CONFIG_HAS_ETH0         1       /* add support for "ethaddr"    */
157 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
158 #define CONFIG_PHY_ADDR         1       /* PHY address, See schematics  */
159 #define CONFIG_PHY1_ADDR        3
160
161 /* Partitions */
162 #define CONFIG_MAC_PARTITION
163 #define CONFIG_DOS_PARTITION
164 #define CONFIG_ISO_PARTITION
165
166 #ifdef CONFIG_440EP
167 /* USB */
168 #define CONFIG_USB_OHCI_NEW
169 #define CONFIG_USB_STORAGE
170 #define CONFIG_SYS_OHCI_BE_CONTROLLER
171
172 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
173 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
174 #define CONFIG_SYS_USB_OHCI_REGS_BASE   (CONFIG_SYS_PERIPHERAL_BASE | 0x1000)
175 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "ppc440"
176 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
177
178 /* Comment this out to enable USB 1.1 device */
179 #define USB_2_0_DEVICE
180
181 #define CONFIG_SUPPORT_VFAT
182 #endif /* CONFIG_440EP */
183
184 #ifdef DEBUG
185 #define CONFIG_PANIC_HANG
186 #else
187 #define CONFIG_HW_WATCHDOG                      /* watchdog */
188 #endif
189
190 /*
191  * Commands additional to the ones defined in amcc-common.h
192  */
193 #define CONFIG_CMD_DTT
194 #define CONFIG_CMD_PCI
195
196 #ifdef CONFIG_440EP
197     #define CONFIG_CMD_USB
198     #define CONFIG_CMD_FAT
199     #define CONFIG_CMD_EXT2
200 #endif
201
202 /*-----------------------------------------------------------------------
203  * PCI stuff
204  *-----------------------------------------------------------------------
205  */
206 /* General PCI */
207 #define CONFIG_PCI                      /* include pci support          */
208 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
209 #undef  CONFIG_PCI_PNP                  /* do (not) pci plug-and-play   */
210 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
211 #define CONFIG_SYS_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/
212
213 /* Board-specific PCI */
214 #define CONFIG_SYS_PCI_TARGET_INIT
215 #define CONFIG_SYS_PCI_MASTER_INIT
216
217 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
218 #define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe   /* Whatever */
219
220 /*-----------------------------------------------------------------------
221  * External Bus Controller (EBC) Setup
222  *----------------------------------------------------------------------*/
223 #define CONFIG_SYS_FLASH                CONFIG_SYS_FLASH_BASE
224 #define CONFIG_SYS_CPLD         0x80000000
225
226 /* Memory Bank 0 (NOR-FLASH) initialization                                     */
227 #define CONFIG_SYS_EBC_PB0AP            0x03017300
228 #define CONFIG_SYS_EBC_PB0CR            (CONFIG_SYS_FLASH | 0xda000)
229
230 /* Memory Bank 2 (CPLD) initialization                                          */
231 #define CONFIG_SYS_EBC_PB2AP            0x04814500
232 #define CONFIG_SYS_EBC_PB2CR            (CONFIG_SYS_CPLD | 0x18000)
233
234 #define CONFIG_SYS_BCSR5_PCI66EN        0x80
235
236 #endif  /* __CONFIG_H */