include/configs/xpedite537x.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2008 Extreme Engineering Solutions, Inc.
   4  * Copyright 2007-2008 Freescale Semiconductor, Inc.
   5  */
   6
   7 /*
   8  * xpedite537x board configuration file
   9  */
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /*
  14  * High Level Configuration Options
  15  */
  16 #define CONFIG_SYS_BOARD_NAME   "XPedite5370"
  17 #define CONFIG_SYS_FORM_3U_VPX  1
  18
  19 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
  20 #define CONFIG_PCIE1            1       /* PCIE controller 1 */
  21 #define CONFIG_PCIE2            1       /* PCIE controller 2 */
  22 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
  23 #define CONFIG_PCI_INDIRECT_BRIDGE 1    /* indirect PCI bridge support */
  24 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
  25 #define CONFIG_FSL_PCIE_RESET   1       /* need PCIe reset errata */
  26
  27 /*
  28  * Multicore config
  29  */
  30 #define CONFIG_BPTR_VIRT_ADDR   0xee000000      /* virt boot page address */
  31 #define CONFIG_MPC8xxx_DISABLE_BPTR             /* Don't leave BPTR enabled */
  32
  33 /*
  34  * DDR config
  35  */
  36 #undef CONFIG_FSL_DDR_INTERACTIVE
  37 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
  38 #define CONFIG_DDR_SPD
  39 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  40 #define SPD_EEPROM_ADDRESS1             0x54    /* Both channels use the */
  41 #define SPD_EEPROM_ADDRESS2             0x54    /* same SPD data         */
  42 #define SPD_EEPROM_OFFSET               0x200   /* OFFSET of SPD in EEPROM */
  43 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
  44 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
  45 #define CONFIG_DDR_ECC
  46 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
  47 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000 /* DDR is system memory*/
  48 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  49 #define CONFIG_VERY_BIG_RAM
  50
  51 #ifndef __ASSEMBLY__
  52 extern unsigned long get_board_sys_clk(unsigned long dummy);
  53 extern unsigned long get_board_ddr_clk(unsigned long dummy);
  54 #endif
  55
  56 #define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0) /* sysclk for MPC85xx */
  57 #define CONFIG_DDR_CLK_FREQ     get_board_ddr_clk(0) /* ddrclk for MPC85xx */
  58
  59 /*
  60  * These can be toggled for performance analysis, otherwise use default.
  61  */
  62 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
  63 #define CONFIG_BTB                      /* toggle branch predition */
  64 #define CONFIG_ENABLE_36BIT_PHYS        1
  65
  66 #define CONFIG_SYS_CCSRBAR              0xef000000
  67 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
  68
  69 /*
  70  * Diagnostics
  71  */
  72 #define CONFIG_SYS_MEMTEST_START        0x10000000
  73 #define CONFIG_SYS_MEMTEST_END          0x20000000
  74 #define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
  75                                          CONFIG_SYS_POST_I2C)
  76 /* The XPedite5370 can host an XMC which has an EEPROM at address 0x50 */
  77 #define I2C_ADDR_IGNORE_LIST            {0x50}
  78
  79 /*
  80  * Memory map
  81  * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
  82  * 0x8000_0000  0xbfff_ffff     PCIe1 Mem               1G non-cacheable
  83  * 0xc000_0000  0xcfff_ffff     PCIe2 Mem               256M non-cacheable
  84  * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
  85  * 0xe800_0000  0xe87f_ffff     PCIe1 IO                8M non-cacheable
  86  * 0xe880_0000  0xe8ff_ffff     PCIe2 IO                8M non-cacheable
  87  * 0xee00_0000  0xee00_ffff     Boot page translation   4K non-cacheable
  88  * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
  89  * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
  90  * 0xf000_0000  0xf7ff_ffff     NOR Flash 2             128M non-cacheable
  91  * 0xf800_0000  0xffff_ffff     NOR Flash 1             128M non-cacheable
  92  */
  93
  94 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
  95
  96 /*
  97  * NAND flash configuration
  98  */
  99 #define CONFIG_SYS_NAND_BASE            0xef800000
 100 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
 101 #define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
 102                                          CONFIG_SYS_NAND_BASE2}
 103 #define CONFIG_SYS_MAX_NAND_DEVICE      2
 104 #define CONFIG_NAND_FSL_ELBC
 105
 106 /*
 107  * NOR flash configuration
 108  */
 109 #define CONFIG_SYS_FLASH_BASE           0xf8000000
 110 #define CONFIG_SYS_FLASH_BASE2          0xf0000000
 111 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
 112 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
 113 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
 114 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
 115 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
 116 #define CONFIG_FLASH_CFI_DRIVER
 117 #define CONFIG_SYS_FLASH_CFI
 118 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 119 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
 120                                                   {0xf7f40000, 0xc0000} }
 121 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 122
 123 /*
 124  * Chip select configuration
 125  */
 126 /* NOR Flash 0 on CS0 */
 127 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
 128                                  BR_PS_16               | \
 129                                  BR_V)
 130 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_128MB            | \
 131                                  OR_GPCM_CSNT           | \
 132                                  OR_GPCM_XACS           | \
 133                                  OR_GPCM_ACS_DIV2       | \
 134                                  OR_GPCM_SCY_8          | \
 135                                  OR_GPCM_TRLX           | \
 136                                  OR_GPCM_EHTR           | \
 137                                  OR_GPCM_EAD)
 138
 139 /* NOR Flash 1 on CS1 */
 140 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
 141                                  BR_PS_16               | \
 142                                  BR_V)
 143 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
 144
 145 /* NAND flash on CS2 */
 146 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
 147                                  (2<<BR_DECC_SHIFT)     | \
 148                                  BR_PS_8                | \
 149                                  BR_MS_FCM              | \
 150                                  BR_V)
 151
 152 /* NAND flash on CS2 */
 153 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB    | \
 154                                  OR_FCM_PGS     | \
 155                                  OR_FCM_CSCT    | \
 156                                  OR_FCM_CST     | \
 157                                  OR_FCM_CHT     | \
 158                                  OR_FCM_SCY_1   | \
 159                                  OR_FCM_TRLX    | \
 160                                  OR_FCM_EHTR)
 161
 162 /* NAND flash on CS3 */
 163 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
 164                                  (2<<BR_DECC_SHIFT)     | \
 165                                  BR_PS_8                | \
 166                                  BR_MS_FCM              | \
 167                                  BR_V)
 168 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
 169
 170 /*
 171  * Use L1 as initial stack
 172  */
 173 #define CONFIG_SYS_INIT_RAM_LOCK        1
 174 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
 175 #define CONFIG_SYS_INIT_RAM_SIZE                0x00004000
 176
 177 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 178 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 179
 180 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
 181 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
 182
 183 /*
 184  * Serial Port
 185  */
 186 #define CONFIG_SYS_NS16550_SERIAL
 187 #define CONFIG_SYS_NS16550_REG_SIZE     1
 188 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 189 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
 190 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
 191 #define CONFIG_SYS_BAUDRATE_TABLE       \
 192         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
 193 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
 194 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
 195
 196 /*
 197  * I2C
 198  */
 199 #define CONFIG_SYS_I2C
 200 #define CONFIG_SYS_I2C_FSL
 201 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 202 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 203 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 204 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 205 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 206 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 207 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x69} }
 208
 209 /* PEX8518 slave I2C interface */
 210 #define CONFIG_SYS_I2C_PEX8518_ADDR     0x70
 211
 212 /* I2C DS1631 temperature sensor */
 213 #define CONFIG_SYS_I2C_LM90_ADDR        0x4c
 214
 215 /* I2C EEPROM - AT24C128B */
 216 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
 217 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
 218 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 219 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 220
 221 /* I2C RTC */
 222 #define CONFIG_RTC_M41T11               1
 223 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 224 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
 225
 226 /* GPIO */
 227 #define CONFIG_PCA953X
 228 #define CONFIG_SYS_I2C_PCA953X_ADDR0    0x18
 229 #define CONFIG_SYS_I2C_PCA953X_ADDR1    0x1c
 230 #define CONFIG_SYS_I2C_PCA953X_ADDR2    0x1e
 231 #define CONFIG_SYS_I2C_PCA953X_ADDR3    0x1f
 232 #define CONFIG_SYS_I2C_PCA953X_ADDR     CONFIG_SYS_I2C_PCA953X_ADDR0
 233
 234 /*
 235  * PU = pulled high, PD = pulled low
 236  * I = input, O = output, IO = input/output
 237  */
 238 /* PCA9557 @ 0x18*/
 239 #define CONFIG_SYS_PCA953X_C0_SER0_EN           0x01 /* PU; UART0 enable (1: enabled) */
 240 #define CONFIG_SYS_PCA953X_C0_SER0_MODE         0x02 /* PU; UART0 serial mode select */
 241 #define CONFIG_SYS_PCA953X_C0_SER1_EN           0x04 /* PU; UART1 enable (1: enabled) */
 242 #define CONFIG_SYS_PCA953X_C0_SER1_MODE         0x08 /* PU; UART1 serial mode select */
 243 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS     0x10 /* PU; Boot flash CS select */
 244 #define CONFIG_SYS_PCA953X_NVM_WP               0x20 /* PU; Set to 0 to enable NVM writing */
 245 #define CONFIG_SYS_PCA953X_C0_VCORE_VID2        0x40 /* VID2 of ISL6262 */
 246 #define CONFIG_SYS_PCA953X_C0_VCORE_VID3        0x80 /* VID3 of ISL6262 */
 247
 248 /* PCA9557 @ 0x1c*/
 249 #define CONFIG_SYS_PCA953X_XMC0_ROOT0           0x01 /* PU; Low if XMC is RC */
 250 #define CONFIG_SYS_PCA953X_XMC0_MVMR0           0x02 /* XMC EEPROM write protect */
 251 #define CONFIG_SYS_PCA953X_XMC0_WAKE            0x04 /* PU; XMC wake */
 252 #define CONFIG_SYS_PCA953X_XMC0_BIST            0x08 /* PU; XMC built in self test */
 253 #define CONFIG_SYS_PCA953X_XMC_PRESENT          0x10 /* PU; Low if XMC module installed */
 254 #define CONFIG_SYS_PCA953X_PMC_PRESENT          0x20 /* PU; Low if PMC module installed */
 255 #define CONFIG_SYS_PCA953X_PMC0_MONARCH         0x40 /* PMC monarch mode enable */
 256 #define CONFIG_SYS_PCA953X_PMC0_EREADY          0x80 /* PU; PMC PCI eready */
 257
 258 /* PCA9557 @ 0x1e*/
 259 #define CONFIG_SYS_PCA953X_P0_GA0               0x01 /* PU; VPX Geographical address */
 260 #define CONFIG_SYS_PCA953X_P0_GA1               0x02 /* PU; VPX Geographical address */
 261 #define CONFIG_SYS_PCA953X_P0_GA2               0x04 /* PU; VPX Geographical address */
 262 #define CONFIG_SYS_PCA953X_P0_GA3               0x08 /* PU; VPX Geographical address */
 263 #define CONFIG_SYS_PCA953X_P0_GA4               0x10 /* PU; VPX Geographical address */
 264 #define CONFIG_SYS_PCA953X_P0_GAP               0x20 /* PU; tied to VPX P0.GAP */
 265 #define CONFIG_SYS_PCA953X_P1_SYSEN             0x80 /* PU; Pulled high; tied to VPX P1.SYSCON */
 266
 267 /* PCA9557 @ 0x1f */
 268 #define CONFIG_SYS_PCA953X_GPIO_VPX0            0x01 /* PU */
 269 #define CONFIG_SYS_PCA953X_GPIO_VPX1            0x02 /* PU */
 270 #define CONFIG_SYS_PCA953X_GPIO_VPX2            0x04 /* PU */
 271 #define CONFIG_SYS_PCA953X_GPIO_VPX3            0x08 /* PU */
 272 #define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL        0x10 /* PD; I2C master source for FRU SEEPROM */
 273
 274 /*
 275  * General PCI
 276  * Memory space is mapped 1-1, but I/O space must start from 0.
 277  */
 278 /* PCIE1 - VPX P1 */
 279 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 280 #define CONFIG_SYS_PCIE1_MEM_PHYS       CONFIG_SYS_PCIE1_MEM_BUS
 281 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x40000000      /* 1G */
 282 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 283 #define CONFIG_SYS_PCIE1_IO_PHYS        0xe8000000
 284 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00800000      /* 8M */
 285
 286 /* PCIE2 - PEX8518 */
 287 #define CONFIG_SYS_PCIE2_MEM_BUS        0xc0000000
 288 #define CONFIG_SYS_PCIE2_MEM_PHYS       CONFIG_SYS_PCIE2_MEM_BUS
 289 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x10000000      /* 256M */
 290 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 291 #define CONFIG_SYS_PCIE2_IO_PHYS        0xe8800000
 292 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00800000      /* 8M */
 293
 294 /*
 295  * Networking options
 296  */
 297 #define CONFIG_TSEC_TBI
 298 #define CONFIG_MII_DEFAULT_TSEC 1       /* Allow unregistered phys */
 299 #define CONFIG_ETHPRIME         "eTSEC2"
 300
 301 /*
 302  * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force
 303  * 1000mbps SGMII link
 304  */
 305 #define CONFIG_TSEC_TBICR_SETTINGS ( \
 306                 TBICR_PHY_RESET \
 307                 | TBICR_FULL_DUPLEX \
 308                 | TBICR_SPEED1_SET \
 309                 )
 310
 311 #define CONFIG_TSEC1            1
 312 #define CONFIG_TSEC1_NAME       "eTSEC1"
 313 #define TSEC1_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 314 #define TSEC1_PHY_ADDR          1
 315 #define TSEC1_PHYIDX            0
 316 #define CONFIG_HAS_ETH0
 317
 318 #define CONFIG_TSEC2            1
 319 #define CONFIG_TSEC2_NAME       "eTSEC2"
 320 #define TSEC2_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
 321 #define TSEC2_PHY_ADDR          2
 322 #define TSEC2_PHYIDX            0
 323 #define CONFIG_HAS_ETH1
 324
 325 /*
 326  * Miscellaneous configurable options
 327  */
 328 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 329 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
 330 #define CONFIG_PREBOOT                          /* enable preboot variable */
 331 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
 332
 333 /*
 334  * For booting Linux, the board info and command line data
 335  * have to be in the first 16 MB of memory, since this is
 336  * the maximum mapped by the Linux kernel during initialization.
 337  */
 338 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
 339 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
 340
 341 /*
 342  * Environment Configuration
 343  */
 344 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
 345 #define CONFIG_ENV_SIZE         0x8000
 346 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
 347
 348 /*
 349  * Flash memory map:
 350  * fff80000 - ffffffff     Pri U-Boot (512 KB)
 351  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
 352  * fff00000 - fff3ffff     Pri FDT (256KB)
 353  * fef00000 - ffefffff     Pri OS image (16MB)
 354  * f8000000 - feefffff     Pri OS Use/Filesystem (111MB)
 355  *
 356  * f7f80000 - f7ffffff     Sec U-Boot (512 KB)
 357  * f7f40000 - f7f7ffff     Sec U-Boot Environment (256 KB)
 358  * f7f00000 - f7f3ffff     Sec FDT (256KB)
 359  * f6f00000 - f7efffff     Sec OS image (16MB)
 360  * f0000000 - f6efffff     Sec OS Use/Filesystem (111MB)
 361  */
 362 #define CONFIG_UBOOT1_ENV_ADDR  __stringify(0xfff80000)
 363 #define CONFIG_UBOOT2_ENV_ADDR  __stringify(0xf7f80000)
 364 #define CONFIG_FDT1_ENV_ADDR    __stringify(0xfff00000)
 365 #define CONFIG_FDT2_ENV_ADDR    __stringify(0xf7f00000)
 366 #define CONFIG_OS1_ENV_ADDR     __stringify(0xfef00000)
 367 #define CONFIG_OS2_ENV_ADDR     __stringify(0xf6f00000)
 368
 369 #define CONFIG_PROG_UBOOT1                                              \
 370         "$download_cmd $loadaddr $ubootfile; "                          \
 371         "if test $? -eq 0; then "                                       \
 372                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
 373                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
 374                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
 375                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
 376                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
 377                 "if test $? -ne 0; then "                               \
 378                         "echo PROGRAM FAILED; "                         \
 379                 "else; "                                                \
 380                         "echo PROGRAM SUCCEEDED; "                      \
 381                 "fi; "                                                  \
 382         "else; "                                                        \
 383                 "echo DOWNLOAD FAILED; "                                \
 384         "fi;"
 385
 386 #define CONFIG_PROG_UBOOT2                                              \
 387         "$download_cmd $loadaddr $ubootfile; "                          \
 388         "if test $? -eq 0; then "                                       \
 389                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
 390                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
 391                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
 392                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
 393                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
 394                 "if test $? -ne 0; then "                               \
 395                         "echo PROGRAM FAILED; "                         \
 396                 "else; "                                                \
 397                         "echo PROGRAM SUCCEEDED; "                      \
 398                 "fi; "                                                  \
 399         "else; "                                                        \
 400                 "echo DOWNLOAD FAILED; "                                \
 401         "fi;"
 402
 403 #define CONFIG_BOOT_OS_NET                                              \
 404         "$download_cmd $osaddr $osfile; "                               \
 405         "if test $? -eq 0; then "                                       \
 406                 "if test -n $fdtaddr; then "                            \
 407                         "$download_cmd $fdtaddr $fdtfile; "             \
 408                         "if test $? -eq 0; then "                       \
 409                                 "bootm $osaddr - $fdtaddr; "            \
 410                         "else; "                                        \
 411                                 "echo FDT DOWNLOAD FAILED; "            \
 412                         "fi; "                                          \
 413                 "else; "                                                \
 414                         "bootm $osaddr; "                               \
 415                 "fi; "                                                  \
 416         "else; "                                                        \
 417                 "echo OS DOWNLOAD FAILED; "                             \
 418         "fi;"
 419
 420 #define CONFIG_PROG_OS1                                                 \
 421         "$download_cmd $osaddr $osfile; "                               \
 422         "if test $? -eq 0; then "                                       \
 423                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
 424                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
 425                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
 426                 "if test $? -ne 0; then "                               \
 427                         "echo OS PROGRAM FAILED; "                      \
 428                 "else; "                                                \
 429                         "echo OS PROGRAM SUCCEEDED; "                   \
 430                 "fi; "                                                  \
 431         "else; "                                                        \
 432                 "echo OS DOWNLOAD FAILED; "                             \
 433         "fi;"
 434
 435 #define CONFIG_PROG_OS2                                                 \
 436         "$download_cmd $osaddr $osfile; "                               \
 437         "if test $? -eq 0; then "                                       \
 438                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
 439                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
 440                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
 441                 "if test $? -ne 0; then "                               \
 442                         "echo OS PROGRAM FAILED; "                      \
 443                 "else; "                                                \
 444                         "echo OS PROGRAM SUCCEEDED; "                   \
 445                 "fi; "                                                  \
 446         "else; "                                                        \
 447                 "echo OS DOWNLOAD FAILED; "                             \
 448         "fi;"
 449
 450 #define CONFIG_PROG_FDT1                                                \
 451         "$download_cmd $fdtaddr $fdtfile; "                             \
 452         "if test $? -eq 0; then "                                       \
 453                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
 454                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
 455                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
 456                 "if test $? -ne 0; then "                               \
 457                         "echo FDT PROGRAM FAILED; "                     \
 458                 "else; "                                                \
 459                         "echo FDT PROGRAM SUCCEEDED; "                  \
 460                 "fi; "                                                  \
 461         "else; "                                                        \
 462                 "echo FDT DOWNLOAD FAILED; "                            \
 463         "fi;"
 464
 465 #define CONFIG_PROG_FDT2                                                \
 466         "$download_cmd $fdtaddr $fdtfile; "                             \
 467         "if test $? -eq 0; then "                                       \
 468                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
 469                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
 470                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
 471                 "if test $? -ne 0; then "                               \
 472                         "echo FDT PROGRAM FAILED; "                     \
 473                 "else; "                                                \
 474                         "echo FDT PROGRAM SUCCEEDED; "                  \
 475                 "fi; "                                                  \
 476         "else; "                                                        \
 477                 "echo FDT DOWNLOAD FAILED; "                            \
 478         "fi;"
 479
 480 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 481         "autoload=yes\0"                                                \
 482         "download_cmd=tftp\0"                                           \
 483         "console_args=console=ttyS0,115200\0"                           \
 484         "root_args=root=/dev/nfs rw\0"                                  \
 485         "misc_args=ip=on\0"                                             \
 486         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
 487         "bootfile=/home/user/file\0"                                    \
 488         "osfile=/home/user/board.uImage\0"                              \
 489         "fdtfile=/home/user/board.dtb\0"                                \
 490         "ubootfile=/home/user/u-boot.bin\0"                             \
 491         "fdtaddr=0x1e00000\0"                                           \
 492         "osaddr=0x1000000\0"                                            \
 493         "loadaddr=0x1000000\0"                                          \
 494         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
 495         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
 496         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
 497         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
 498         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
 499         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
 500         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
 501         "bootcmd_flash1=run set_bootargs; "                             \
 502                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
 503         "bootcmd_flash2=run set_bootargs; "                             \
 504                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
 505         "bootcmd=run bootcmd_flash1\0"
 506 #endif  /* __CONFIG_H */