c20935dfcf382889027133df220cd0983357dc04
[oweals/u-boot.git] / include / configs / xpedite520x.h
1 /*
2  * Copyright 2008 Extreme Engineering Solutions, Inc.
3  * Copyright 2004-2008 Freescale Semiconductor, Inc.
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 /*
9  * xpedite520x board configuration file
10  */
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*
15  * High Level Configuration Options
16  */
17 #define CONFIG_BOOKE            1       /* BOOKE */
18 #define CONFIG_E500             1       /* BOOKE e500 family */
19 #define CONFIG_MPC85xx          1       /* MPC8540/60/55/41/48 */
20 #define CONFIG_MPC8548          1
21 #define CONFIG_XPEDITE5200      1
22 #define CONFIG_SYS_BOARD_NAME   "XPedite5200"
23 #define CONFIG_SYS_FORM_PMC_XMC 1
24 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
25
26 #ifndef CONFIG_SYS_TEXT_BASE
27 #define CONFIG_SYS_TEXT_BASE    0xfff80000
28 #endif
29
30 #define CONFIG_PCI              1       /* Enable PCI/PCIE */
31 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
32 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
33 #define CONFIG_PCI1             1       /* PCI controller 1 */
34 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
35 #define CONFIG_PCI_INDIRECT_BRIDGE 1    /* indirect PCI bridge support */
36 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
37 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
38
39 /*
40  * DDR config
41  */
42 #define CONFIG_FSL_DDR2
43 #undef CONFIG_FSL_DDR_INTERACTIVE
44 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
45 #define CONFIG_DDR_SPD
46 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
47 #define SPD_EEPROM_ADDRESS              0x54
48 #define CONFIG_NUM_DDR_CONTROLLERS      1
49 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
50 #define CONFIG_CHIP_SELECTS_PER_CTRL    2
51 #define CONFIG_DDR_ECC
52 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
53 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
54 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
55 #define CONFIG_VERY_BIG_RAM
56
57 #define CONFIG_SYS_CLK_FREQ     66666666
58
59 /*
60  * These can be toggled for performance analysis, otherwise use default.
61  */
62 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
63 #define CONFIG_BTB                      /* toggle branch predition */
64 #define CONFIG_ENABLE_36BIT_PHYS        1
65
66 #define CONFIG_SYS_CCSRBAR              0xef000000
67 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
68
69 /*
70  * Diagnostics
71  */
72 #define CONFIG_SYS_ALT_MEMTEST
73 #define CONFIG_SYS_MEMTEST_START        0x10000000
74 #define CONFIG_SYS_MEMTEST_END          0x20000000
75 #define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
76                                          CONFIG_SYS_POST_I2C)
77 #define I2C_ADDR_LIST                   {CONFIG_SYS_I2C_MAX1237_ADDR,   \
78                                          CONFIG_SYS_I2C_EEPROM_ADDR,    \
79                                          CONFIG_SYS_I2C_PCA953X_ADDR0,  \
80                                          CONFIG_SYS_I2C_PCA953X_ADDR1,  \
81                                          CONFIG_SYS_I2C_RTC_ADDR}
82
83 /*
84  * Memory map
85  * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
86  * 0x8000_0000  0xbfff_ffff     PCI1 Mem                1G non-cacheable
87  * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
88  * 0xe800_0000  0xe87f_ffff     PCI1 IO                 8M non-cacheable
89  * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
90  * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
91  * 0xf800_0000  0xfbff_ffff     NOR Flash 2             64M non-cacheable
92  * 0xfc00_0000  0xffff_ffff     NOR Flash 1             64M non-cacheable
93  */
94
95 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
96
97 /*
98  * NAND flash configuration
99  */
100 #define CONFIG_SYS_NAND_BASE            0xef800000
101 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
102 #define CONFIG_SYS_MAX_NAND_DEVICE      1
103 #define CONFIG_NAND_ACTL
104 #define CONFIG_SYS_NAND_ACTL_CLE        (1 << 3)        /* ADDR3 is CLE */
105 #define CONFIG_SYS_NAND_ACTL_ALE        (1 << 4)        /* ADDR4 is ALE */
106 #define CONFIG_SYS_NAND_ACTL_NCE        (0)             /* NCE not controlled by ADDR */
107 #define CONFIG_SYS_NAND_ACTL_DELAY      25
108
109 /*
110  * NOR flash configuration
111  */
112 #define CONFIG_SYS_FLASH_BASE           0xfc000000
113 #define CONFIG_SYS_FLASH_BASE2          0xf8000000
114 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
115 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
116 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
117 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
118 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
119 #define CONFIG_FLASH_CFI_DRIVER
120 #define CONFIG_SYS_FLASH_CFI
121 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
122 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
123                                                   {0xfbf40000, 0xc0000} }
124 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
125
126 /*
127  * Chip select configuration
128  */
129 /* NOR Flash 0 on CS0 */
130 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
131                                  BR_PS_16               | \
132                                  BR_V)
133 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_64MB             | \
134                                  OR_GPCM_ACS_DIV4       | \
135                                  OR_GPCM_SCY_8)
136
137 /* NOR Flash 1 on CS1 */
138 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
139                                  BR_PS_16               | \
140                                  BR_V)
141 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
142
143 /* NAND flash on CS2 */
144 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
145                                  BR_PS_8                | \
146                                  BR_V)
147
148 /* NAND flash on CS2 */
149 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB            | \
150                                  OR_GPCM_BCTLD          | \
151                                  OR_GPCM_CSNT           | \
152                                  OR_GPCM_ACS_DIV4       | \
153                                  OR_GPCM_SCY_4          | \
154                                  OR_GPCM_TRLX           | \
155                                  OR_GPCM_EHTR)
156
157 /* NAND flash on CS3 */
158 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
159                                  BR_PS_8                | \
160                                  BR_V)
161 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
162
163 /*
164  * Use L1 as initial stack
165  */
166 #define CONFIG_SYS_INIT_RAM_LOCK        1
167 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
168 #define CONFIG_SYS_INIT_RAM_SIZE                0x4000
169
170 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
171 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
172
173 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
174 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
175
176 /*
177  * Serial Port
178  */
179 #define CONFIG_CONS_INDEX               1
180 #define CONFIG_SYS_NS16550
181 #define CONFIG_SYS_NS16550_SERIAL
182 #define CONFIG_SYS_NS16550_REG_SIZE     1
183 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
184 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
185 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
186 #define CONFIG_SYS_BAUDRATE_TABLE       \
187         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
188 #define CONFIG_BAUDRATE                 115200
189 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
190 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
191
192 /*
193  * Use the HUSH parser
194  */
195 #define CONFIG_SYS_HUSH_PARSER
196
197 /*
198  * Pass open firmware flat tree
199  */
200 #define CONFIG_OF_LIBFDT                1
201 #define CONFIG_OF_BOARD_SETUP           1
202 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
203
204 /*
205  * I2C
206  */
207 #define CONFIG_FSL_I2C                          /* Use FSL common I2C driver */
208 #define CONFIG_HARD_I2C                         /* I2C with hardware support */
209 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address */
210 #define CONFIG_SYS_I2C_SLAVE            0x7F
211 #define CONFIG_SYS_I2C_OFFSET           0x3000
212 #define CONFIG_SYS_I2C2_OFFSET          0x3100
213 #define CONFIG_I2C_MULTI_BUS
214
215 /* I2C EEPROM */
216 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50
217 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
218 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
219 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
220
221 /* I2C RTC */
222 #define CONFIG_RTC_M41T11                       1
223 #define CONFIG_SYS_I2C_RTC_ADDR                 0x68
224 #define CONFIG_SYS_M41T11_BASE_YEAR             2000
225
226 /* GPIO */
227 #define CONFIG_PCA953X
228 #define CONFIG_SYS_I2C_PCA953X_ADDR0            0x18
229 #define CONFIG_SYS_I2C_PCA953X_ADDR1            0x19
230 #define CONFIG_SYS_I2C_PCA953X_ADDR             CONFIG_SYS_I2C_PCA953X_ADDR0
231
232 /* PCA957 @ 0x18 */
233 #define CONFIG_SYS_PCA953X_BRD_CFG0             0x01
234 #define CONFIG_SYS_PCA953X_BRD_CFG1             0x02
235 #define CONFIG_SYS_PCA953X_BRD_CFG2             0x04
236 #define CONFIG_SYS_PCA953X_XMC_ROOT0            0x08
237 #define CONFIG_SYS_PCA953X_FLASH_PASS_CS        0x10
238 #define CONFIG_SYS_PCA953X_NVM_WP               0x20
239 #define CONFIG_SYS_PCA953X_MONARCH              0x40
240 #define CONFIG_SYS_PCA953X_EREADY               0x80
241
242 /* PCA957 @ 0x19 */
243 #define CONFIG_SYS_PCA953X_P14_IO0              0x01
244 #define CONFIG_SYS_PCA953X_P14_IO1              0x02
245 #define CONFIG_SYS_PCA953X_P14_IO2              0x04
246 #define CONFIG_SYS_PCA953X_P14_IO3              0x08
247 #define CONFIG_SYS_PCA953X_P14_IO4              0x10
248 #define CONFIG_SYS_PCA953X_P14_IO5              0x20
249 #define CONFIG_SYS_PCA953X_P14_IO6              0x40
250 #define CONFIG_SYS_PCA953X_P14_IO7              0x80
251
252 /* 12-bit ADC used to measure CPU diode */
253 #define CONFIG_SYS_I2C_MAX1237_ADDR             0x34
254
255 /*
256  * General PCI
257  * Memory space is mapped 1-1, but I/O space must start from 0.
258  */
259 #define CONFIG_SYS_PCI1_MEM_BUS         0x80000000
260 #define CONFIG_SYS_PCI1_MEM_PHYS        CONFIG_SYS_PCI1_MEM_BUS
261 #define CONFIG_SYS_PCI1_MEM_SIZE        0x40000000      /* 1G */
262 #define CONFIG_SYS_PCI1_IO_BUS          0x00000000
263 #define CONFIG_SYS_PCI1_IO_PHYS         0xe8000000
264 #define CONFIG_SYS_PCI1_IO_SIZE         0x00800000      /* 1M */
265
266 /*
267  * Networking options
268  */
269 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
270 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
271 #define CONFIG_MII              1       /* MII PHY management */
272 #define CONFIG_ETHPRIME         "eTSEC1"
273
274 #define CONFIG_TSEC1            1
275 #define CONFIG_TSEC1_NAME       "eTSEC1"
276 #define TSEC1_FLAGS             TSEC_GIGABIT
277 #define TSEC1_PHY_ADDR          1
278 #define TSEC1_PHYIDX            0
279 #define CONFIG_HAS_ETH0
280
281 #define CONFIG_TSEC2            1
282 #define CONFIG_TSEC2_NAME       "eTSEC2"
283 #define TSEC2_FLAGS             TSEC_GIGABIT
284 #define TSEC2_PHY_ADDR          2
285 #define TSEC2_PHYIDX            0
286 #define CONFIG_HAS_ETH1
287
288 #define CONFIG_TSEC3    1
289 #define CONFIG_TSEC3_NAME       "eTSEC3"
290 #define TSEC3_FLAGS             TSEC_GIGABIT
291 #define TSEC3_PHY_ADDR          3
292 #define TSEC3_PHYIDX            0
293 #define CONFIG_HAS_ETH2
294
295 #define CONFIG_TSEC4    1
296 #define CONFIG_TSEC4_NAME       "eTSEC4"
297 #define TSEC4_FLAGS             TSEC_GIGABIT
298 #define TSEC4_PHY_ADDR          4
299 #define TSEC4_PHYIDX            0
300 #define CONFIG_HAS_ETH3
301
302 /*
303  * BOOTP options
304  */
305 #define CONFIG_BOOTP_BOOTFILESIZE
306 #define CONFIG_BOOTP_BOOTPATH
307 #define CONFIG_BOOTP_GATEWAY
308
309 /*
310  * Command configuration.
311  */
312 #include <config_cmd_default.h>
313
314 #define CONFIG_CMD_ASKENV
315 #define CONFIG_CMD_DATE
316 #define CONFIG_CMD_DHCP
317 #define CONFIG_CMD_EEPROM
318 #define CONFIG_CMD_ELF
319 #define CONFIG_CMD_SAVEENV
320 #define CONFIG_CMD_FLASH
321 #define CONFIG_CMD_I2C
322 #define CONFIG_CMD_JFFS2
323 #define CONFIG_CMD_MII
324 #define CONFIG_CMD_NAND
325 #define CONFIG_CMD_NET
326 #define CONFIG_CMD_PCA953X
327 #define CONFIG_CMD_PCA953X_INFO
328 #define CONFIG_CMD_PCI
329 #define CONFIG_CMD_PCI_ENUM
330 #define CONFIG_CMD_PING
331 #define CONFIG_CMD_SNTP
332 #define CONFIG_CMD_REGINFO
333
334 /*
335  * Miscellaneous configurable options
336  */
337 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
338 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
339 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt */
340 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
341 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
342 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
343 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
344 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1ms ticks */
345 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
346 #define CONFIG_AUTO_COMPLETE    1               /* add autocompletion support */
347 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
348 #define CONFIG_BOOTDELAY        3               /* -1 disables auto-boot */
349 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
350 #define CONFIG_PREBOOT                          /* enable preboot variable */
351 #define CONFIG_FIT              1
352 #define CONFIG_FIT_VERBOSE      1
353 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
354 #define CONFIG_INTERRUPTS               /* enable pci, srio, ddr interrupts */
355
356 /*
357  * For booting Linux, the board info and command line data
358  * have to be in the first 16 MB of memory, since this is
359  * the maximum mapped by the Linux kernel during initialization.
360  */
361 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
362 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
363
364 /*
365  * Environment Configuration
366  */
367 #define CONFIG_ENV_IS_IN_FLASH  1
368 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
369 #define CONFIG_ENV_SIZE         0x8000
370 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
371
372 /*
373  * Flash memory map:
374  * fff80000 - ffffffff     Pri U-Boot (512 KB)
375  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
376  * fff00000 - fff3ffff     Pri FDT (256KB)
377  * fef00000 - ffefffff     Pri OS image (16MB)
378  * fc000000 - feefffff     Pri OS Use/Filesystem (47MB)
379  *
380  * fbf80000 - fbffffff     Sec U-Boot (512 KB)
381  * fbf40000 - fbf7ffff     Sec U-Boot Environment (256 KB)
382  * fbf00000 - fbf3ffff     Sec FDT (256KB)
383  * faf00000 - fbefffff     Sec OS image (16MB)
384  * f8000000 - faefffff     Sec OS Use/Filesystem (47MB)
385  */
386 #define CONFIG_UBOOT1_ENV_ADDR  __stringify(0xfff80000)
387 #define CONFIG_UBOOT2_ENV_ADDR  __stringify(0xfbf80000)
388 #define CONFIG_FDT1_ENV_ADDR    __stringify(0xfff00000)
389 #define CONFIG_FDT2_ENV_ADDR    __stringify(0xfbf00000)
390 #define CONFIG_OS1_ENV_ADDR     __stringify(0xfef00000)
391 #define CONFIG_OS2_ENV_ADDR     __stringify(0xfaf00000)
392
393 #define CONFIG_PROG_UBOOT1                                              \
394         "$download_cmd $loadaddr $ubootfile; "                          \
395         "if test $? -eq 0; then "                                       \
396                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
397                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
398                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
399                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
400                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
401                 "if test $? -ne 0; then "                               \
402                         "echo PROGRAM FAILED; "                         \
403                 "else; "                                                \
404                         "echo PROGRAM SUCCEEDED; "                      \
405                 "fi; "                                                  \
406         "else; "                                                        \
407                 "echo DOWNLOAD FAILED; "                                \
408         "fi;"
409
410 #define CONFIG_PROG_UBOOT2                                              \
411         "$download_cmd $loadaddr $ubootfile; "                          \
412         "if test $? -eq 0; then "                                       \
413                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
414                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
415                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
416                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
417                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
418                 "if test $? -ne 0; then "                               \
419                         "echo PROGRAM FAILED; "                         \
420                 "else; "                                                \
421                         "echo PROGRAM SUCCEEDED; "                      \
422                 "fi; "                                                  \
423         "else; "                                                        \
424                 "echo DOWNLOAD FAILED; "                                \
425         "fi;"
426
427 #define CONFIG_BOOT_OS_NET                                              \
428         "$download_cmd $osaddr $osfile; "                               \
429         "if test $? -eq 0; then "                                       \
430                 "if test -n $fdtaddr; then "                            \
431                         "$download_cmd $fdtaddr $fdtfile; "             \
432                         "if test $? -eq 0; then "                       \
433                                 "bootm $osaddr - $fdtaddr; "            \
434                         "else; "                                        \
435                                 "echo FDT DOWNLOAD FAILED; "            \
436                         "fi; "                                          \
437                 "else; "                                                \
438                         "bootm $osaddr; "                               \
439                 "fi; "                                                  \
440         "else; "                                                        \
441                 "echo OS DOWNLOAD FAILED; "                             \
442         "fi;"
443
444 #define CONFIG_PROG_OS1                                                 \
445         "$download_cmd $osaddr $osfile; "                               \
446         "if test $? -eq 0; then "                                       \
447                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
448                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
449                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
450                 "if test $? -ne 0; then "                               \
451                         "echo OS PROGRAM FAILED; "                      \
452                 "else; "                                                \
453                         "echo OS PROGRAM SUCCEEDED; "                   \
454                 "fi; "                                                  \
455         "else; "                                                        \
456                 "echo OS DOWNLOAD FAILED; "                             \
457         "fi;"
458
459 #define CONFIG_PROG_OS2                                                 \
460         "$download_cmd $osaddr $osfile; "                               \
461         "if test $? -eq 0; then "                                       \
462                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
463                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
464                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
465                 "if test $? -ne 0; then "                               \
466                         "echo OS PROGRAM FAILED; "                      \
467                 "else; "                                                \
468                         "echo OS PROGRAM SUCCEEDED; "                   \
469                 "fi; "                                                  \
470         "else; "                                                        \
471                 "echo OS DOWNLOAD FAILED; "                             \
472         "fi;"
473
474 #define CONFIG_PROG_FDT1                                                \
475         "$download_cmd $fdtaddr $fdtfile; "                             \
476         "if test $? -eq 0; then "                                       \
477                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
478                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
479                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
480                 "if test $? -ne 0; then "                               \
481                         "echo FDT PROGRAM FAILED; "                     \
482                 "else; "                                                \
483                         "echo FDT PROGRAM SUCCEEDED; "                  \
484                 "fi; "                                                  \
485         "else; "                                                        \
486                 "echo FDT DOWNLOAD FAILED; "                            \
487         "fi;"
488
489 #define CONFIG_PROG_FDT2                                                \
490         "$download_cmd $fdtaddr $fdtfile; "                             \
491         "if test $? -eq 0; then "                                       \
492                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
493                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
494                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
495                 "if test $? -ne 0; then "                               \
496                         "echo FDT PROGRAM FAILED; "                     \
497                 "else; "                                                \
498                         "echo FDT PROGRAM SUCCEEDED; "                  \
499                 "fi; "                                                  \
500         "else; "                                                        \
501                 "echo FDT DOWNLOAD FAILED; "                            \
502         "fi;"
503
504 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
505         "autoload=yes\0"                                                \
506         "download_cmd=tftp\0"                                           \
507         "console_args=console=ttyS0,115200\0"                           \
508         "root_args=root=/dev/nfs rw\0"                                  \
509         "misc_args=ip=on\0"                                             \
510         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
511         "bootfile=/home/user/file\0"                                    \
512         "osfile=/home/user/board.uImage\0"                              \
513         "fdtfile=/home/user/board.dtb\0"                                \
514         "ubootfile=/home/user/u-boot.bin\0"                             \
515         "fdtaddr=c00000\0"                                              \
516         "osaddr=0x1000000\0"                                            \
517         "loadaddr=0x1000000\0"                                          \
518         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
519         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
520         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
521         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
522         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
523         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
524         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
525         "bootcmd_flash1=run set_bootargs; "                             \
526                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
527         "bootcmd_flash2=run set_bootargs; "                             \
528                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
529         "bootcmd=run bootcmd_flash1\0"
530 #endif  /* __CONFIG_H */