1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the WB45N CPU Module.
9 #include <asm/hardware.h>
11 /* ARM asynchronous clock */
12 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
13 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_SKIP_LOWLEVEL_INIT
20 /* general purpose I/O */
21 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
22 #define CONFIG_AT91_GPIO
25 #define CONFIG_ATMEL_USART
26 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
27 #define CONFIG_USART_ID ATMEL_ID_SYS
32 #define CONFIG_BOOTP_BOOTFILESIZE
35 #define CONFIG_SYS_SDRAM_BASE 0x20000000
36 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
38 #define CONFIG_SYS_INIT_SP_ADDR \
39 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
42 #define CONFIG_SYS_MAX_NAND_DEVICE 1
43 #define CONFIG_SYS_NAND_BASE 0x40000000
45 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
47 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
48 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
49 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
57 #define CONFIG_NET_RETRY_COUNT 20
58 #define CONFIG_MACB_SEARCH_PHY
59 #define CONFIG_ETHADDR C0:EE:40:00:00:00
60 #define CONFIG_ENV_OVERWRITE 1
63 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
64 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
65 #define CONFIG_SYS_MEMTEST_END 0x23e00000
67 #ifdef CONFIG_SYS_USE_NANDFLASH
68 /* bootstrap + u-boot + env + linux in nandflash */
70 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
73 #define MTDIDS_DEFAULT "nand0=atmel_nand"
74 #define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \
87 #error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
90 #define CONFIG_BOOTARGS "console=ttyS0,115200 earlyprintk " \
91 "rw noinitrd mem=64M " \
92 "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
94 #define CONFIG_EXTRA_ENV_SETTINGS \
95 "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
98 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
101 #define CONFIG_SYS_CBSIZE 256
102 #define CONFIG_SYS_MAXARGS 16
105 * Size of malloc() pool
107 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
110 #define CONFIG_SPL_MAX_SIZE 0x6000
111 #define CONFIG_SPL_STACK 0x308000
113 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
114 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
115 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
116 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
118 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
120 #define CONFIG_SYS_MASTER_CLOCK 132096000
121 #define CONFIG_SYS_AT91_PLLA 0x20c73f03
122 #define CONFIG_SYS_MCKR 0x1301
123 #define CONFIG_SYS_MCKR_CSS 0x1302
125 #define CONFIG_SPL_NAND_DRIVERS
126 #define CONFIG_SPL_NAND_BASE
127 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
128 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
129 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
130 #define CONFIG_SYS_NAND_PAGE_COUNT 64
131 #define CONFIG_SYS_NAND_OOBSIZE 64
132 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
133 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
135 #endif /* __CONFIG_H__ */