include/configs/wb45n.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuation settings for the WB45N CPU Module.
   4  */
   5
   6 #ifndef __CONFIG_H__
   7 #define __CONFIG_H__
   8
   9 #include <asm/hardware.h>
  10
  11 /* ARM asynchronous clock */
  12 #define CONFIG_SYS_AT91_SLOW_CLOCK  32768
  13 #define CONFIG_SYS_AT91_MAIN_CLOCK  12000000    /* 12 MHz crystal */
  14
  15 #define CONFIG_CMDLINE_TAG      /* enable passing of ATAGs */
  16 #define CONFIG_SETUP_MEMORY_TAGS
  17 #define CONFIG_INITRD_TAG
  18 #define CONFIG_SKIP_LOWLEVEL_INIT
  19
  20 /* general purpose I/O */
  21 #define CONFIG_ATMEL_LEGACY     /* required until (g)pio is fixed */
  22 #define CONFIG_AT91_GPIO
  23
  24 /* serial console */
  25 #define CONFIG_ATMEL_USART
  26 #define CONFIG_USART_BASE   ATMEL_BASE_DBGU
  27 #define CONFIG_USART_ID     ATMEL_ID_SYS
  28
  29 /*
  30  * BOOTP options
  31  */
  32 #define CONFIG_BOOTP_BOOTFILESIZE
  33
  34 /* SDRAM */
  35 #define CONFIG_SYS_SDRAM_BASE       0x20000000
  36 #define CONFIG_SYS_SDRAM_SIZE       0x04000000  /* 64 MB */
  37
  38 #define CONFIG_SYS_INIT_SP_ADDR \
  39     (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  40
  41 /* NAND flash */
  42 #define CONFIG_SYS_MAX_NAND_DEVICE  1
  43 #define CONFIG_SYS_NAND_BASE        0x40000000
  44 /* our ALE is AD21 */
  45 #define CONFIG_SYS_NAND_MASK_ALE    (1 << 21)
  46 /* our CLE is AD22 */
  47 #define CONFIG_SYS_NAND_MASK_CLE    (1 << 22)
  48 #define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD4
  49 #define CONFIG_SYS_NAND_READY_PIN   AT91_PIN_PD5
  50
  51 /* PMECC & PMERRLOC */
  52 #define CONFIG_ATMEL_NAND_HWECC     1
  53 #define CONFIG_ATMEL_NAND_HW_PMECC  1
  54 #define CONFIG_PMECC_CAP            4
  55 #define CONFIG_PMECC_SECTOR_SIZE    512
  56
  57 #define CONFIG_CMD_MTDPARTS
  58 #define CONFIG_RBTREE
  59 #define CONFIG_LZO
  60
  61 /* Ethernet */
  62 #define CONFIG_MACB
  63 #define CONFIG_RMII
  64 #define CONFIG_NET_RETRY_COUNT      20
  65 #define CONFIG_MACB_SEARCH_PHY
  66 #define CONFIG_ETHADDR              C0:EE:40:00:00:00
  67 #define CONFIG_ENV_OVERWRITE        1
  68
  69 /* System */
  70 #define CONFIG_SYS_LOAD_ADDR        0x22000000  /* load address */
  71 #define CONFIG_SYS_MEMTEST_START    CONFIG_SYS_SDRAM_BASE
  72 #define CONFIG_SYS_MEMTEST_END      0x23e00000
  73
  74 #ifdef CONFIG_SYS_USE_NANDFLASH
  75 /* bootstrap + u-boot + env + linux in nandflash */
  76 #define CONFIG_ENV_OFFSET           0xa0000
  77 #define CONFIG_ENV_OFFSET_REDUND    0xc0000
  78 #define CONFIG_ENV_SIZE             0x20000     /* 1 block = 128 kB */
  79
  80 #define CONFIG_BOOTCOMMAND  "nand read 0x22000000 0xe0000 0x280000; " \
  81     "run _mtd; bootm"
  82
  83 #define MTDIDS_DEFAULT      "nand0=atmel_nand"
  84 #define MTDPARTS_DEFAULT    "mtdparts=atmel_nand:" \
  85                             "128K(at91bs)," \
  86                             "512K(u-boot)," \
  87                             "128K(u-boot-env)," \
  88                             "128K(redund-env)," \
  89                             "2560K(kernel-a)," \
  90                             "2560K(kernel-b)," \
  91                             "38912K(rootfs-a)," \
  92                             "38912K(rootfs-b)," \
  93                             "46208K(user)," \
  94                             "512K(logs)"
  95
  96 #else
  97 #error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH'
  98 #endif
  99
 100 #define CONFIG_BOOTARGS     "console=ttyS0,115200 earlyprintk " \
 101                             "rw noinitrd mem=64M "              \
 102                             "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=6"
 103
 104 #define CONFIG_EXTRA_ENV_SETTINGS       \
 105     "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
 106     "autoload=no\0" \
 107     "autostart=no\0" \
 108     "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \
 109     "\0"
 110
 111 #define CONFIG_SYS_CBSIZE   256
 112 #define CONFIG_SYS_MAXARGS  16
 113
 114 /*
 115  * Size of malloc() pool
 116  */
 117 #define CONFIG_SYS_MALLOC_LEN       (512 * 1024 + 0x1000)
 118
 119 /* SPL */
 120 #define CONFIG_SPL_TEXT_BASE        0x300000
 121 #define CONFIG_SPL_MAX_SIZE         0x6000
 122 #define CONFIG_SPL_STACK            0x308000
 123
 124 #define CONFIG_SPL_BSS_START_ADDR   0x20000000
 125 #define CONFIG_SPL_BSS_MAX_SIZE     0x80000
 126 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
 127 #define CONFIG_SYS_SPL_MALLOC_SIZE  0x80000
 128
 129 #define CONFIG_SYS_MONITOR_LEN      (512 << 10)
 130
 131 #define CONFIG_SYS_MASTER_CLOCK     132096000
 132 #define CONFIG_SYS_AT91_PLLA        0x20c73f03
 133 #define CONFIG_SYS_MCKR             0x1301
 134 #define CONFIG_SYS_MCKR_CSS         0x1302
 135
 136 #define CONFIG_SPL_NAND_DRIVERS
 137 #define CONFIG_SPL_NAND_BASE
 138 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
 139 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 140 #define CONFIG_SYS_NAND_PAGE_SIZE   0x800
 141 #define CONFIG_SYS_NAND_PAGE_COUNT  64
 142 #define CONFIG_SYS_NAND_OOBSIZE     64
 143 #define CONFIG_SYS_NAND_BLOCK_SIZE  0x20000
 144 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 145 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 146
 147 #endif                          /* __CONFIG_H__ */