2 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
4 * Configuation settings for the TI OMAP VoiceBlue board.
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <configs/omap1510.h>
29 #define CONFIG_ARM925T 1 /* This is an arm925t CPU */
30 #define CONFIG_OMAP 1 /* in a TI OMAP core */
31 #define CONFIG_OMAP1510 1 /* which is in a 5910 */
33 /* Input clock of PLL */
34 #define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
35 #define CONFIG_XTAL_FREQ 12000000
37 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39 #define CONFIG_MISC_INIT_R /* There is nothing to really init */
40 #define BOARD_LATE_INIT /* but we flash the LEDs here */
42 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS 1
44 #define CONFIG_INITRD_TAG 1
46 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
51 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
52 #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
53 #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
55 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
57 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
62 #define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */
63 #define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */
64 #define CONFIG_SYS_MAX_FLASH_BANKS 1
65 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
67 /* FIXME: Does not work on AMD flash */
68 /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */
69 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max # of sectors on one chip */
71 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
72 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
75 * Environment settings
77 #define CONFIG_ENV_IS_IN_FLASH
78 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN)
79 #define CONFIG_ENV_SIZE (8 * 1024)
80 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
81 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
82 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
84 #define CONFIG_ENV_OVERWRITE
87 * Size of malloc() pool and stack
89 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
90 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
91 #define CONFIG_STACKSIZE (1 * 1024 * 1024)
92 #define PHYS_SDRAM_1_RESERVED (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
97 #define CONFIG_DRIVER_SMC91111
98 #define CONFIG_SMC91111_BASE 0x08000300
100 #define CONFIG_HARD_I2C
101 #define CONFIG_SYS_I2C_SPEED 100000
102 #define CONFIG_SYS_I2C_SLAVE 1
103 #define CONFIG_DRIVER_OMAP1510_I2C
105 #define CONFIG_RTC_DS1307
106 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
109 * NS16550 Configuration
111 #define CONFIG_SYS_NS16550
112 #define CONFIG_SYS_NS16550_SERIAL
113 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
114 #define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
115 #define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
117 #define CONFIG_CONS_INDEX 1
118 #define CONFIG_BAUDRATE 115200
119 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
123 * Command line configuration.
125 #include <config_cmd_default.h>
127 #define CONFIG_CMD_BDI
128 #define CONFIG_CMD_BOOTD
129 #define CONFIG_CMD_DHCP
130 #define CONFIG_CMD_SAVEENV
131 #define CONFIG_CMD_FLASH
132 #define CONFIG_CMD_IMI
133 #define CONFIG_CMD_JFFS2
134 #define CONFIG_CMD_LOADB
135 #define CONFIG_CMD_MEMORY
136 #define CONFIG_CMD_NET
137 #define CONFIG_CMD_PING
138 #define CONFIG_CMD_RUN
144 #define CONFIG_BOOTP_SUBNETMASK
145 #define CONFIG_BOOTP_GATEWAY
146 #define CONFIG_BOOTP_HOSTNAME
147 #define CONFIG_BOOTP_BOOTPATH
152 #define CONFIG_BOOTDELAY 3
153 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
154 #undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
155 #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
156 #define CONFIG_BOOTCOMMAND "run nboot"
157 #define CONFIG_PREBOOT "run setup"
158 #define CONFIG_EXTRA_ENV_SETTINGS \
161 "bootfile=/boot/uImage\0" \
163 "if test -n $swapos; then " \
164 "setenv swapos; saveenv; " \
165 "if test $ospart -eq 0; then setenv ospart 1; else setenv ospart 0; fi; "\
167 "setup=setenv bootargs console=ttyS0,$baudrate " \
168 "mtdparts=$mtdparts\0" \
169 "nfsargs=setenv bootargs $bootargs " \
170 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
171 "nfsroot=$rootpath root=/dev/nfs\0" \
172 "flashargs=run setpart; setenv bootargs $bootargs " \
173 "root=mtd:data$ospart ro " \
174 "rootfstype=jffs2\0" \
175 "initrdargs=setenv bootargs $bootargs " \
176 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
177 "fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \
178 "mboot=bootp; run initrdargs; tftp; bootm\0" \
179 "nboot=bootp; run nfsargs; tftp; bootm\0"
181 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
183 #if 1 /* feel free to disable for development */
184 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
185 #define CONFIG_AUTOBOOT_PROMPT "\nVoiceBlue Enterprise - booting...\n"
186 #define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
190 * JFFS2 partitions (mtdparts command line support)
192 #define CONFIG_CMD_MTDPARTS
193 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
194 #define CONFIG_FLASH_CFI_MTD
195 #define MTDIDS_DEFAULT "nor0=omapflash.0"
196 #define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)"
200 * Miscellaneous configurable options
202 #define CONFIG_SYS_HUSH_PARSER
203 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
204 #define CONFIG_AUTO_COMPLETE
205 #define CONFIG_SYS_LONGHELP /* undef to save memory */
206 #define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
207 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
208 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
209 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
210 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
212 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
213 #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED
215 /* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
216 * This time is further subdivided by a local divisor.
218 #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
219 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
220 #define CONFIG_SYS_HZ 1000
222 #define OMAP5910_DPLL_DIV 1
223 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
224 (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
226 #define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
227 #define OMAP5910_LCD_DIV 2 /* CKL/4 */
228 #define OMAP5910_ARM_DIV 0 /* CKL/1 */
229 #define OMAP5910_DSP_DIV 0 /* CKL/1 */
230 #define OMAP5910_TC_DIV 1 /* CKL/2 */
231 #define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
232 #define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
234 #define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b Clock Enable */
235 #define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
236 (OMAP5910_LCD_DIV << 2) | \
237 (OMAP5910_ARM_DIV << 4) | \
238 (OMAP5910_DSP_DIV << 6) | \
239 (OMAP5910_TC_DIV << 8) | \
240 (OMAP5910_DSP_MMU_DIV << 10) | \
241 (OMAP5910_ARM_TIM_SEL << 12))
243 #define VOICEBLUE_LED_REG 0x04030000
245 #endif /* __CONFIG_H */