2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale Vybrid vf610twr board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
14 #define CONFIG_SYS_FSL_CLK
16 #define CONFIG_MACH_TYPE 4146
18 #define CONFIG_SKIP_LOWLEVEL_INIT
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
23 #define CONFIG_CMD_FUSE
24 #ifdef CONFIG_CMD_FUSE
25 #define CONFIG_MXC_OCOTP
28 /* Size of malloc() pool */
29 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
31 /* Allow to overwrite serial and ethaddr */
32 #define CONFIG_ENV_OVERWRITE
33 #define CONFIG_BAUDRATE 115200
36 #define CONFIG_CMD_NAND
37 #define CONFIG_CMD_NAND_TRIMFFS
38 #define CONFIG_SYS_NAND_ONFI_DETECTION
40 #ifdef CONFIG_CMD_NAND
41 #define CONFIG_SYS_MAX_NAND_DEVICE 1
42 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
45 #define CONFIG_CMD_UBIFS
49 /* Dynamic MTD partition support */
50 #define CONFIG_CMD_MTDPARTS
51 #define CONFIG_MTD_PARTITIONS
52 #define CONFIG_MTD_DEVICE
53 #define MTDIDS_DEFAULT "nand0=fsl_nfc"
54 #define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \
63 #define CONFIG_FSL_ESDHC
64 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
65 #define CONFIG_SYS_FSL_ESDHC_NUM 1
67 #define CONFIG_FEC_MXC
69 #define IMX_FEC_BASE ENET_BASE_ADDR
70 #define CONFIG_FEC_XCV_TYPE RMII
71 #define CONFIG_FEC_MXC_PHYADDR 0
73 #define CONFIG_PHY_MICREL
77 #ifdef CONFIG_FSL_QSPI
78 #define FSL_QSPI_FLASH_SIZE (1 << 24)
79 #define FSL_QSPI_FLASH_NUM 2
80 #define CONFIG_SYS_FSL_QSPI_LE
84 #define CONFIG_SYS_I2C
85 #define CONFIG_SYS_I2C_MXC
86 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
87 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
88 #define CONFIG_SYS_SPD_BUS_NUM 0
91 #define CONFIG_SYS_LOAD_ADDR 0x82000000
93 /* We boot from the gfxRAM area of the OCRAM. */
94 #define CONFIG_SYS_TEXT_BASE 0x3f408000
95 #define CONFIG_BOARD_SIZE_LIMIT 524288
98 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
99 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
100 * DDR3. Hence, limit the memory range for image processing to 112MB
101 * using bootm_size. All of the following must be within this range.
102 * We have the default load at 32MB into DDR (for the kernel), FDT at
103 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
104 * seen large trees). This allows a reasonable split between ramdisk
105 * and kernel size, where the ram disk can be a bit larger.
107 #define MEM_LAYOUT_ENV_SETTINGS \
108 "bootm_size=0x07000000\0" \
109 "loadaddr=0x82000000\0" \
110 "kernel_addr_r=0x82000000\0" \
111 "fdt_addr=0x84000000\0" \
112 "fdt_addr_r=0x84000000\0" \
113 "rdaddr=0x84080000\0" \
114 "ramdisk_addr_r=0x84080000\0"
116 #define CONFIG_EXTRA_ENV_SETTINGS \
117 MEM_LAYOUT_ENV_SETTINGS \
118 "script=boot.scr\0" \
121 "fdt_file=vf610-twr.dtb\0" \
124 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
126 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
127 "update_sd_firmware_filename=u-boot.imx\0" \
128 "update_sd_firmware=" \
129 "if test ${ip_dyn} = yes; then " \
130 "setenv get_cmd dhcp; " \
132 "setenv get_cmd tftp; " \
134 "if mmc dev ${mmcdev}; then " \
135 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
136 "setexpr fw_sz ${filesize} / 0x200; " \
137 "setexpr fw_sz ${fw_sz} + 1; " \
138 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
141 "mmcargs=setenv bootargs console=${console},${baudrate} " \
142 "root=${mmcroot}\0" \
144 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
145 "bootscript=echo Running bootscript from mmc ...; " \
147 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
148 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
149 "mmcboot=echo Booting from mmc ...; " \
151 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
152 "if run loadfdt; then " \
153 "bootz ${loadaddr} - ${fdt_addr}; " \
155 "if test ${boot_fdt} = try; then " \
158 "echo WARN: Cannot load the DT; " \
164 "netargs=setenv bootargs console=${console},${baudrate} " \
166 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
167 "netboot=echo Booting from net ...; " \
169 "if test ${ip_dyn} = yes; then " \
170 "setenv get_cmd dhcp; " \
172 "setenv get_cmd tftp; " \
174 "${get_cmd} ${image}; " \
175 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
176 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
177 "bootz ${loadaddr} - ${fdt_addr}; " \
179 "if test ${boot_fdt} = try; then " \
182 "echo WARN: Cannot load the DT; " \
189 #define CONFIG_BOOTCOMMAND \
190 "mmc dev ${mmcdev}; if mmc rescan; then " \
191 "if run loadbootscript; then " \
194 "if run loadimage; then " \
196 "else run netboot; " \
199 "else run netboot; fi"
201 /* Miscellaneous configurable options */
202 #define CONFIG_SYS_LONGHELP /* undef to save memory */
203 #undef CONFIG_AUTO_COMPLETE
204 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
205 #define CONFIG_SYS_PBSIZE \
206 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
208 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
210 #define CONFIG_SYS_MEMTEST_START 0x80010000
211 #define CONFIG_SYS_MEMTEST_END 0x87C00000
215 * The stack sizes are set up in start.S using the settings below
217 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
219 /* Physical memory map */
220 #define CONFIG_NR_DRAM_BANKS 1
221 #define PHYS_SDRAM (0x80000000)
222 #define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
224 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
225 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
226 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
228 #define CONFIG_SYS_INIT_SP_OFFSET \
229 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
230 #define CONFIG_SYS_INIT_SP_ADDR \
231 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
233 #ifdef CONFIG_ENV_IS_IN_MMC
234 #define CONFIG_ENV_SIZE (8 * 1024)
236 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
237 #define CONFIG_SYS_MMC_ENV_DEV 0
240 #ifdef CONFIG_ENV_IS_IN_NAND
241 #define CONFIG_ENV_SIZE (64 * 2048)
242 #define CONFIG_ENV_SECT_SIZE (64 * 2048)
243 #define CONFIG_ENV_RANGE (512 * 1024)
244 #define CONFIG_ENV_OFFSET 0x180000