2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
8 * Corscience GmbH & Co. KG
9 * Thomas Weber <weber@corscience.de>
11 * Configuration settings for the Tricorder board.
13 * SPDX-License-Identifier: GPL-2.0+
19 /* High Level Configuration Options */
20 #define CONFIG_OMAP /* in a TI OMAP core */
21 #define CONFIG_OMAP34XX /* which is a 34XX */
22 #define CONFIG_OMAP_COMMON
24 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
26 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
27 * 64 bytes before this address should be set aside for u-boot.img's
28 * header. That is 0x800FFFC0--0x80100000 should not be used for any
31 #define CONFIG_SYS_TEXT_BASE 0x80100000
33 #define CONFIG_SDRC /* The chip has SDRC controller */
35 #include <asm/arch/cpu.h> /* get chip and board defs */
36 #include <asm/arch/omap3.h>
38 #define CONFIG_SYS_GENERIC_BOARD
40 /* Display CPU and Board information */
41 #define CONFIG_DISPLAY_CPUINFO
42 #define CONFIG_DISPLAY_BOARDINFO
44 #define CONFIG_SILENT_CONSOLE
45 #define CONFIG_ZERO_BOOTDELAY_CHECK
48 #define V_OSCK 26000000 /* Clock output from T2 */
49 #define V_SCLK (V_OSCK >> 1)
51 #define CONFIG_MISC_INIT_R
53 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54 #define CONFIG_SETUP_MEMORY_TAGS
55 #define CONFIG_INITRD_TAG
56 #define CONFIG_REVISION_TAG
58 #define CONFIG_OF_LIBFDT
60 /* Size of malloc() pool */
61 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
63 /* Hardware drivers */
66 #define CONFIG_OMAP_GPIO
69 #define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 are in GPIO bank 2 */
72 #define CONFIG_STATUS_LED
73 #define CONFIG_BOARD_SPECIFIC_LED
74 #define CONFIG_CMD_LED /* LED command */
75 #define STATUS_LED_BIT (1 << 0)
76 #define STATUS_LED_STATE STATUS_LED_ON
77 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
78 #define STATUS_LED_BIT1 (1 << 1)
79 #define STATUS_LED_STATE1 STATUS_LED_ON
80 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
81 #define STATUS_LED_BIT2 (1 << 2)
82 #define STATUS_LED_STATE2 STATUS_LED_ON
83 #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
85 /* NS16550 Configuration */
86 #define CONFIG_SYS_NS16550
87 #define CONFIG_SYS_NS16550_SERIAL
88 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
89 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
91 /* select serial console configuration */
92 #define CONFIG_CONS_INDEX 3
93 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
94 #define CONFIG_SERIAL3 3
95 #define CONFIG_BAUDRATE 115200
96 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
100 #define CONFIG_GENERIC_MMC
102 #define CONFIG_OMAP_HSMMC
103 #define CONFIG_DOS_PARTITION
106 #define CONFIG_SYS_I2C
107 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
108 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
109 #define CONFIG_SYS_I2C_OMAP34XX
113 #define CONFIG_SYS_I2C_MULTI_EEPROMS
114 #define CONFIG_CMD_EEPROM
115 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
116 #define CONFIG_SYS_EEPROM_BUS_NUM 1
119 #define CONFIG_TWL4030_POWER
120 #define CONFIG_TWL4030_LED
122 /* Board NAND Info */
123 #define CONFIG_SYS_NO_FLASH /* no NOR flash */
124 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
125 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
126 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
129 "384k(u-boot-env1)," \
131 "384k(u-boot-env2)," \
136 #define CONFIG_NAND_OMAP_GPMC
137 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
139 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
140 /* to access nand at */
142 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
145 #define CONFIG_SYS_NAND_MAX_OOBFREE 2
146 #define CONFIG_SYS_NAND_MAX_ECCPOS 56
148 /* commands to include */
149 #include <config_cmd_default.h>
151 #define CONFIG_CMD_EXT2 /* EXT2 Support */
152 #define CONFIG_CMD_FAT /* FAT support */
153 #define CONFIG_CMD_I2C /* I2C serial bus support */
154 #define CONFIG_CMD_MMC /* MMC support */
155 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
156 #define CONFIG_CMD_NAND /* NAND support */
157 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
158 #define CONFIG_CMD_UBI /* UBI commands */
159 #define CONFIG_CMD_UBIFS /* UBIFS commands */
160 #define CONFIG_LZO /* LZO is needed for UBIFS */
162 #undef CONFIG_CMD_NET
163 #undef CONFIG_CMD_NFS
164 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
165 #undef CONFIG_CMD_IMI /* iminfo */
166 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */
169 #define CONFIG_RBTREE
170 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
171 #define CONFIG_MTD_PARTITIONS
173 /* Environment information (this is the common part) */
175 #define CONFIG_BOOTDELAY 0
177 /* hang() the board on panic() */
178 #define CONFIG_PANIC_HANG
180 /* environment placement (for NAND), is different for FLASHCARD but does not
182 #define CONFIG_ENV_OFFSET 0x120000 /* env start */
183 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
184 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
185 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
187 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
188 * value can not be used here! */
189 #define CONFIG_LOADADDR 0x82000000
191 #define CONFIG_COMMON_ENV_SETTINGS \
192 "console=ttyO2,115200n8\0" \
195 "defaultdisplay=lcd\0" \
196 "kernelopts=mtdoops.mtddev=3\0" \
197 "mtdparts=" MTDPARTS_DEFAULT "\0" \
198 "mtdids=" MTDIDS_DEFAULT "\0" \
200 "setenv bootargs console=${console} " \
203 "vt.global_cursor_default=0 " \
205 "omapdss.def_disp=${defaultdisplay}\0"
207 #define CONFIG_BOOTCOMMAND "run autoboot"
209 /* specific environment settings for different use cases
210 * FLASHCARD: used to run a rdimage from sdcard to program the device
211 * 'NORMAL': used to boot kernel from sdcard, nand, ...
213 * The main aim for the FLASHCARD skin is to have an embedded environment
214 * which will not be influenced by any data already on the device.
216 #ifdef CONFIG_FLASHCARD
218 #define CONFIG_ENV_IS_NOWHERE
220 /* the rdaddr is 16 MiB before the loadaddr */
221 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
223 #define CONFIG_EXTRA_ENV_SETTINGS \
224 CONFIG_COMMON_ENV_SETTINGS \
228 "setenv bootargs ${bootargs} " \
229 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
230 "rdinit=/sbin/init; " \
231 "mmc dev ${mmcdev}; mmc rescan; " \
232 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
233 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
234 "bootm ${loadaddr} ${rdaddr}\0"
236 #else /* CONFIG_FLASHCARD */
238 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
240 #define CONFIG_ENV_IS_IN_NAND
242 #define CONFIG_EXTRA_ENV_SETTINGS \
243 CONFIG_COMMON_ENV_SETTINGS \
246 "setenv bootargs ${bootargs} " \
247 "root=/dev/mmcblk0p2 " \
252 "setenv bootargs ${bootargs} " \
255 "rootfstype=ubifs " \
257 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
258 "bootscript=echo Running bootscript from mmc ...; " \
259 "source ${loadaddr}\0" \
260 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
261 "mmcboot=echo Booting from mmc ...; " \
263 "bootm ${loadaddr}\0" \
264 "loaduimage_ubi=ubi part ubi; " \
265 "ubifsmount ubi:root; " \
266 "ubifsload ${loadaddr} /boot/uImage\0" \
267 "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
268 "nandboot=echo Booting from nand ...; " \
270 "run loaduimage_nand; " \
271 "bootm ${loadaddr}\0" \
272 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
273 "if run loadbootscript; then " \
276 "if run loaduimage; then " \
278 "else run nandboot; " \
281 "else run nandboot; fi\0"
283 #endif /* CONFIG_FLASHCARD */
285 /* Miscellaneous configurable options */
286 #define CONFIG_SYS_LONGHELP /* undef to save memory */
287 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
288 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */
289 #define CONFIG_AUTO_COMPLETE
290 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # "
291 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
292 /* Print Buffer Size */
293 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
294 sizeof(CONFIG_SYS_PROMPT) + 16)
295 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
297 /* Boot Argument Buffer Size */
298 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
300 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
301 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
302 0x07000000) /* 112 MB */
304 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
307 * OMAP3 has 12 GP timers, they can be driven by the system clock
308 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
309 * This rate is divided by a local divisor.
311 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
312 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
314 /* Physical Memory Map */
315 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
316 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
317 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
319 /* NAND and environment organization */
320 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
322 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
323 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
324 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
325 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
326 CONFIG_SYS_INIT_RAM_SIZE - \
327 GENERATED_GBL_DATA_SIZE)
330 #define CONFIG_SYS_SRAM_START 0x40200000
331 #define CONFIG_SYS_SRAM_SIZE 0x10000
333 /* Defines for SPL */
334 #define CONFIG_SPL_FRAMEWORK
335 #define CONFIG_SPL_NAND_SIMPLE
337 #define CONFIG_SPL_BOARD_INIT
338 #define CONFIG_SPL_GPIO_SUPPORT
339 #define CONFIG_SPL_LIBCOMMON_SUPPORT
340 #define CONFIG_SPL_LIBDISK_SUPPORT
341 #define CONFIG_SPL_I2C_SUPPORT
342 #define CONFIG_SPL_LIBGENERIC_SUPPORT
343 #define CONFIG_SPL_SERIAL_SUPPORT
344 #define CONFIG_SPL_POWER_SUPPORT
345 #define CONFIG_SPL_NAND_SUPPORT
346 #define CONFIG_SPL_NAND_BASE
347 #define CONFIG_SPL_NAND_DRIVERS
348 #define CONFIG_SPL_NAND_ECC
349 #define CONFIG_SPL_MMC_SUPPORT
350 #define CONFIG_SPL_FAT_SUPPORT
351 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
352 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
353 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
354 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
356 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
357 #define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */
358 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
360 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
361 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
363 /* NAND boot config */
364 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
365 #define CONFIG_SYS_NAND_PAGE_COUNT 64
366 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
367 #define CONFIG_SYS_NAND_OOBSIZE 64
368 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
369 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
370 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
371 13, 14, 16, 17, 18, 19, 20, 21, 22, \
372 23, 24, 25, 26, 27, 28, 30, 31, 32, \
373 33, 34, 35, 36, 37, 38, 39, 40, 41, \
374 42, 44, 45, 46, 47, 48, 49, 50, 51, \
377 #define CONFIG_SYS_NAND_ECCSIZE 512
378 #define CONFIG_SYS_NAND_ECCBYTES 13
379 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
381 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
383 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
384 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
386 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
387 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
389 #define CONFIG_SYS_ALT_MEMTEST
390 #define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
391 #endif /* __CONFIG_H */