2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
8 * Corscience GmbH & Co. KG
9 * Thomas Weber <weber@corscience.de>
11 * Configuration settings for the Tricorder board.
13 * SPDX-License-Identifier: GPL-2.0+
19 /* High Level Configuration Options */
20 #define CONFIG_OMAP /* in a TI OMAP core */
21 #define CONFIG_OMAP34XX /* which is a 34XX */
22 #define CONFIG_OMAP_COMMON
24 #define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
26 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
27 * 64 bytes before this address should be set aside for u-boot.img's
28 * header. That is 0x800FFFC0--0x80100000 should not be used for any
31 #define CONFIG_SYS_TEXT_BASE 0x80100000
33 #define CONFIG_SDRC /* The chip has SDRC controller */
35 #include <asm/arch/cpu.h> /* get chip and board defs */
36 #include <asm/arch/omap3.h>
38 /* Display CPU and Board information */
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
43 #define V_OSCK 26000000 /* Clock output from T2 */
44 #define V_SCLK (V_OSCK >> 1)
46 #define CONFIG_MISC_INIT_R
48 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
49 #define CONFIG_SETUP_MEMORY_TAGS
50 #define CONFIG_INITRD_TAG
51 #define CONFIG_REVISION_TAG
53 #define CONFIG_OF_LIBFDT
55 /* Size of malloc() pool */
56 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
58 /* Hardware drivers */
61 #define CONFIG_OMAP_GPIO
63 /* NS16550 Configuration */
64 #define CONFIG_SYS_NS16550
65 #define CONFIG_SYS_NS16550_SERIAL
66 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
67 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
69 /* select serial console configuration */
70 #define CONFIG_CONS_INDEX 3
71 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
72 #define CONFIG_SERIAL3 3
73 #define CONFIG_BAUDRATE 115200
74 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
78 #define CONFIG_GENERIC_MMC
80 #define CONFIG_OMAP_HSMMC
81 #define CONFIG_DOS_PARTITION
84 #define CONFIG_HARD_I2C
85 #define CONFIG_SYS_I2C_SPEED 100000
86 #define CONFIG_SYS_I2C_SLAVE 1
87 #define CONFIG_DRIVER_OMAP34XX_I2C 1
88 #define CONFIG_I2C_MULTI_BUS
91 #define CONFIG_SYS_I2C_MULTI_EEPROMS
92 #define CONFIG_CMD_EEPROM
93 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
94 #define CONFIG_SYS_EEPROM_BUS_NUM 1
97 #define CONFIG_TWL4030_POWER
98 #define CONFIG_TWL4030_LED
100 /* Board NAND Info */
101 #define CONFIG_SYS_NO_FLASH /* no NOR flash */
102 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
103 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
104 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
107 "384k(u-boot-env1)," \
109 "384k(u-boot-env2)," \
114 #define CONFIG_NAND_OMAP_GPMC
115 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
117 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
118 /* to access nand at */
120 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
122 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
124 #define CONFIG_NAND_OMAP_BCH8
127 /* commands to include */
128 #include <config_cmd_default.h>
130 #define CONFIG_CMD_EXT2 /* EXT2 Support */
131 #define CONFIG_CMD_FAT /* FAT support */
132 #define CONFIG_CMD_I2C /* I2C serial bus support */
133 #define CONFIG_CMD_MMC /* MMC support */
134 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
135 #define CONFIG_CMD_NAND /* NAND support */
136 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
137 #define CONFIG_CMD_UBI /* UBI commands */
138 #define CONFIG_CMD_UBIFS /* UBIFS commands */
139 #define CONFIG_LZO /* LZO is needed for UBIFS */
141 #undef CONFIG_CMD_NET
142 #undef CONFIG_CMD_NFS
143 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
144 #undef CONFIG_CMD_IMI /* iminfo */
145 #undef CONFIG_CMD_JFFS2 /* JFFS2 Support */
148 #define CONFIG_RBTREE
149 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
150 #define CONFIG_MTD_PARTITIONS
152 /* Environment information (this is the common part) */
154 #define CONFIG_BOOTDELAY 3
156 /* hang() the board on panic() */
157 #define CONFIG_PANIC_HANG
159 /* environment placement (for NAND), is different for FLASHCARD but does not
161 #define CONFIG_ENV_OFFSET 0x120000 /* env start */
162 #define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
163 #define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
164 #define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
166 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
167 * value can not be used here! */
168 #define CONFIG_LOADADDR 0x82000000
170 #define CONFIG_COMMON_ENV_SETTINGS \
171 "console=ttyO2,115200n8\0" \
174 "defaultdisplay=lcd\0" \
175 "kernelopts=mtdoops.mtddev=3\0" \
176 "mtdparts=" MTDPARTS_DEFAULT "\0" \
177 "mtdids=" MTDIDS_DEFAULT "\0" \
179 "setenv bootargs console=${console} " \
182 "vt.global_cursor_default=0 " \
184 "omapdss.def_disp=${defaultdisplay}\0"
186 #define CONFIG_BOOTCOMMAND "run autoboot"
188 /* specific environment settings for different use cases
189 * FLASHCARD: used to run a rdimage from sdcard to program the device
190 * 'NORMAL': used to boot kernel from sdcard, nand, ...
192 * The main aim for the FLASHCARD skin is to have an embedded environment
193 * which will not be influenced by any data already on the device.
195 #ifdef CONFIG_FLASHCARD
197 #define CONFIG_ENV_IS_NOWHERE
199 /* the rdaddr is 16 MiB before the loadaddr */
200 #define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
202 #define CONFIG_EXTRA_ENV_SETTINGS \
203 CONFIG_COMMON_ENV_SETTINGS \
207 "setenv bootargs ${bootargs} " \
208 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
209 "rdinit=/sbin/init; " \
210 "mmc dev ${mmcdev}; mmc rescan; " \
211 "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
212 "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
213 "bootm ${loadaddr} ${rdaddr}\0"
215 #else /* CONFIG_FLASHCARD */
217 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
219 #define CONFIG_ENV_IS_IN_NAND
221 #define CONFIG_EXTRA_ENV_SETTINGS \
222 CONFIG_COMMON_ENV_SETTINGS \
225 "setenv bootargs ${bootargs} " \
226 "root=/dev/mmcblk0p2 " \
231 "setenv bootargs ${bootargs} " \
234 "rootfstype=ubifs " \
236 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
237 "bootscript=echo Running bootscript from mmc ...; " \
238 "source ${loadaddr}\0" \
239 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
240 "mmcboot=echo Booting from mmc ...; " \
242 "bootm ${loadaddr}\0" \
243 "loaduimage_ubi=ubi part ubi; " \
244 "ubifsmount ubi:root; " \
245 "ubifsload ${loadaddr} /boot/uImage\0" \
246 "nandboot=echo Booting from nand ...; " \
248 "run loaduimage_ubi; " \
249 "bootm ${loadaddr}\0" \
250 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
251 "if run loadbootscript; then " \
254 "if run loaduimage; then " \
256 "else run nandboot; " \
259 "else run nandboot; fi\0"
261 #endif /* CONFIG_FLASHCARD */
263 /* Miscellaneous configurable options */
264 #define CONFIG_SYS_LONGHELP /* undef to save memory */
265 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
266 #define CONFIG_CMDLINE_EDITING /* enable cmdline history */
267 #define CONFIG_AUTO_COMPLETE
268 #define CONFIG_SYS_PROMPT "OMAP3 Tricorder # "
269 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
270 /* Print Buffer Size */
271 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
272 sizeof(CONFIG_SYS_PROMPT) + 16)
273 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
275 /* Boot Argument Buffer Size */
276 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
278 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
279 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
280 0x01000000) /* 16MB */
282 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
285 * OMAP3 has 12 GP timers, they can be driven by the system clock
286 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
287 * This rate is divided by a local divisor.
289 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
290 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
291 #define CONFIG_SYS_HZ 1000
293 /* Physical Memory Map */
294 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
295 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
296 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
298 /* NAND and environment organization */
299 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
301 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
303 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
304 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
305 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
306 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
307 CONFIG_SYS_INIT_RAM_SIZE - \
308 GENERATED_GBL_DATA_SIZE)
311 #define CONFIG_SYS_SRAM_START 0x40200000
312 #define CONFIG_SYS_SRAM_SIZE 0x10000
314 /* Defines for SPL */
316 #define CONFIG_SPL_FRAMEWORK
317 #define CONFIG_SPL_NAND_SIMPLE
319 #define CONFIG_SPL_BOARD_INIT
320 #define CONFIG_SPL_GPIO_SUPPORT
321 #define CONFIG_SPL_LIBCOMMON_SUPPORT
322 #define CONFIG_SPL_LIBDISK_SUPPORT
323 #define CONFIG_SPL_I2C_SUPPORT
324 #define CONFIG_SPL_LIBGENERIC_SUPPORT
325 #define CONFIG_SPL_SERIAL_SUPPORT
326 #define CONFIG_SPL_POWER_SUPPORT
327 #define CONFIG_SPL_NAND_SUPPORT
328 #define CONFIG_SPL_NAND_BASE
329 #define CONFIG_SPL_NAND_DRIVERS
330 #define CONFIG_SPL_NAND_ECC
331 #define CONFIG_SPL_MMC_SUPPORT
332 #define CONFIG_SPL_FAT_SUPPORT
333 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
334 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
335 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
336 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
338 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
339 #define CONFIG_SPL_MAX_SIZE (55 * 1024) /* 7 KB for stack */
340 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
342 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
343 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
345 /* NAND boot config */
346 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
347 #define CONFIG_SYS_NAND_PAGE_COUNT 64
348 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
349 #define CONFIG_SYS_NAND_OOBSIZE 64
350 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
351 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
352 #define CONFIG_SYS_NAND_ECCPOS {12, 13, 14, 15, 16, 17, 18, 19, 20,\
353 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
354 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,\
355 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,\
358 #define CONFIG_SYS_NAND_ECCSIZE 512
359 #define CONFIG_SYS_NAND_ECCBYTES 13
361 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
363 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
364 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
366 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
367 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
369 #endif /* __CONFIG_H */