2 * Copyright (C) 2013 Samsung Electronics
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
18 #define CONFIG_SAMSUNG /* in a SAMSUNG core */
19 #define CONFIG_S5P /* which is in a S5P Family */
20 #define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
21 #define CONFIG_TIZEN /* TIZEN lib */
23 #include <asm/arch/cpu.h> /* get chip and board defs */
25 #define CONFIG_ARCH_CPU_INIT
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
29 #define CONFIG_SKIP_LOWLEVEL_INIT
31 #define CONFIG_SYS_CACHELINE_SIZE 32
33 #ifndef CONFIG_SYS_L2CACHE_OFF
34 #define CONFIG_SYS_L2_PL310
35 #define CONFIG_SYS_PL310_BASE 0x10502000
38 #define CONFIG_NR_DRAM_BANKS 4
39 #define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */
40 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
41 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
42 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
43 #define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */
44 #define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */
45 #define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */
46 #define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */
47 #define PHYS_SDRAM_END 0x80000000
49 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
51 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
52 #define CONFIG_SYS_TEXT_BASE 0x78100000
54 #define CONFIG_SYS_CLK_FREQ 24000000
56 #define CONFIG_SETUP_MEMORY_TAGS
57 #define CONFIG_CMDLINE_TAG
58 #define CONFIG_REVISION_TAG
60 /* MACH_TYPE_TRATS2 */
61 #define MACH_TYPE_TRATS2 3765
62 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS2
64 #define CONFIG_DISPLAY_CPUINFO
66 #include <asm/sizes.h>
67 /* Size of malloc() pool */
68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
70 /* select serial console configuration */
71 #define CONFIG_SERIAL2
73 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
74 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
76 #define CONFIG_CMDLINE_EDITING
78 #define CONFIG_BAUDRATE 115200
80 /* It should define before config_cmd_default.h */
81 #define CONFIG_SYS_NO_FLASH
83 /***********************************************************
85 ***********************************************************/
86 #include <config_cmd_default.h>
88 #undef CONFIG_CMD_ECHO
89 #undef CONFIG_CMD_FPGA
90 #undef CONFIG_CMD_FLASH
91 #undef CONFIG_CMD_IMLS
92 #undef CONFIG_CMD_NAND
93 #undef CONFIG_CMD_MISC
95 #undef CONFIG_CMD_SOURCE
96 #undef CONFIG_CMD_XIMG
97 #define CONFIG_CMD_CACHE
98 #define CONFIG_CMD_I2C
99 #define CONFIG_CMD_MMC
100 #define CONFIG_CMD_DFU
101 #define CONFIG_CMD_GPT
102 #define CONFIG_CMD_PMIC
104 #define CONFIG_BOOTDELAY 3
105 #define CONFIG_ZERO_BOOTDELAY_CHECK
107 #define CONFIG_CMD_FAT
108 #define CONFIG_FAT_WRITE
111 #define CONFIG_CMD_EXT4
112 #define CONFIG_CMD_EXT4_WRITE
114 /* USB Composite download gadget - g_dnl */
115 #define CONFIG_USBDOWNLOAD_GADGET
116 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
117 #define CONFIG_DFU_FUNCTION
118 #define CONFIG_DFU_MMC
120 /* TIZEN THOR downloader support */
121 #define CONFIG_CMD_THOR_DOWNLOAD
122 #define CONFIG_THOR_FUNCTION
124 /* USB Samsung's IDs */
125 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8
126 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601
127 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
128 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
129 #define CONFIG_G_DNL_MANUFACTURER "Samsung"
131 /* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
132 #undef CONFIG_CMD_NET
135 #define CONFIG_GENERIC_MMC
137 #define CONFIG_S5P_SDHCI
139 #define CONFIG_MMC_SDMA
140 #define CONFIG_MMC_DEFAULT_DEV 0
145 #define CONFIG_BOOTARGS "Please use defined boot"
146 #define CONFIG_BOOTCOMMAND "run mmcboot"
147 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
149 #define CONFIG_ENV_OVERWRITE
150 #define CONFIG_SYS_CONSOLE_INFO_QUIET
151 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
153 /* Tizen - partitions definitions */
154 #define PARTS_CSA "csa"
155 #define PARTS_BOOT "boot"
156 #define PARTS_MODEM "modem"
157 #define PARTS_CSC "csc"
158 #define PARTS_ROOT "platform"
159 #define PARTS_DATA "data"
160 #define PARTS_UMS "ums"
162 #define PARTS_DEFAULT \
163 "uuid_disk=${uuid_gpt_disk};" \
164 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
165 "name="PARTS_BOOT",size=64MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
166 "name="PARTS_MODEM",size=100MiB,uuid=${uuid_gpt_"PARTS_MODEM"};" \
167 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
168 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
169 "name="PARTS_DATA",size=512MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
170 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
172 #define CONFIG_DFU_ALT \
173 "u-boot mmc 80 800;" \
175 "exynos4412-trats2.dtb ext4 0 2;" \
176 ""PARTS_ROOT" part 0 5\0"
178 #define CONFIG_EXTRA_ENV_SETTINGS \
180 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
182 "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
183 "mmc boot 0 1 1 0\0" \
185 "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \
186 " mmc boot 0 1 1 0\0" \
188 "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \
190 "mmc write 0x50000000 0x80 0x400\0" \
192 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
193 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
194 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
195 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
196 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
198 "rootfstype=ext4\0" \
199 "console=" CONFIG_DEFAULT_CONSOLE \
200 "kernelname=uImage\0" \
201 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
203 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
205 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
208 "opts=always_resume=1\0" \
209 "partitions=" PARTS_DEFAULT \
210 "dfu_alt_info=" CONFIG_DFU_ALT \
213 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
214 "consoleoff=set console console=ram; save; reset\0" \
215 "spladdr=0x40000100\0" \
217 "splfile=falcon.bin\0" \
219 "setexpr spl_imgsize ${splsize} + 8 ;" \
220 "setenv spl_imgsize 0x${spl_imgsize};" \
221 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
222 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
223 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
224 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
225 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
226 "spl export atags 0x40007FC0;" \
227 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
228 "mw.l ${spl_addr_tmp} ${splsize};" \
229 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
230 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
231 "setenv spl_imgsize;" \
232 "setenv spl_imgaddr;" \
233 "setenv spl_addr_tmp;\0" \
234 "fdtaddr=40800000\0" \
235 "fdtfile=exynos4412-trats2.dtb\0"
238 * Miscellaneous configurable options
240 #define CONFIG_SYS_LONGHELP /* undef to save memory */
241 #define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
242 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
243 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
244 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
246 /* Boot Argument Buffer Size */
247 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
249 /* memtest works on */
250 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
251 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
252 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
254 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
255 - GENERATED_GBL_DATA_SIZE)
257 /* valid baudrates */
258 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
260 #define CONFIG_SYS_MONITOR_BASE 0x00000000
262 /*-----------------------------------------------------------------------
263 * FLASH and environment organization
266 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
268 #define CONFIG_ENV_IS_IN_MMC
269 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
270 #define CONFIG_ENV_SIZE 4096
271 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
272 #define CONFIG_EFI_PARTITION
273 #define CONFIG_PARTITION_UUIDS
275 #define CONFIG_MISC_INIT_R
276 #define CONFIG_BOARD_EARLY_INIT_F
279 #include <asm/arch/gpio.h>
281 #define CONFIG_SYS_I2C
282 #define CONFIG_SYS_I2C_S3C24X0
283 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
284 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
285 #define CONFIG_MAX_I2C_NUM 8
286 #define CONFIG_SYS_I2C_SOFT
287 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
288 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
289 #define I2C_SOFT_DECLARATIONS2
290 #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
291 #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
292 #define CONFIG_SOFT_I2C_READ_REPEATED_START
293 #define CONFIG_SYS_I2C_INIT_BOARD
296 int get_soft_i2c_scl_pin(void);
297 int get_soft_i2c_sda_pin(void);
299 #define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
300 #define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
304 #define CONFIG_POWER_I2C
305 #define CONFIG_POWER_MAX77686
306 #define CONFIG_POWER_PMIC_MAX77693
307 #define CONFIG_POWER_MUIC_MAX77693
308 #define CONFIG_POWER_FG_MAX77693
309 #define CONFIG_POWER_BATTERY_TRATS2
310 #define CONFIG_USB_GADGET
311 #define CONFIG_USB_GADGET_S3C_UDC_OTG
312 #define CONFIG_USB_GADGET_DUALSPEED
313 #define CONFIG_USB_GADGET_VBUS_DRAW 2
314 #define CONFIG_USB_CABLE_CHECK
317 #define CONFIG_EXYNOS_FB
319 #define CONFIG_CMD_BMP
320 #define CONFIG_BMP_32BPP
321 #define CONFIG_FB_ADDR 0x52504000
322 #define CONFIG_S6E8AX0
323 #define CONFIG_EXYNOS_MIPI_DSIM
324 #define CONFIG_VIDEO_BMP_GZIP
325 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12))
327 #define CONFIG_CMD_USB_MASS_STORAGE
328 #define CONFIG_USB_GADGET_MASS_STORAGE
330 /* Pass open firmware flat tree */
331 #define CONFIG_OF_LIBFDT 1
333 #endif /* __CONFIG_H */