1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Samsung Electronics
4 * Heungjun Kim <riverful.kim@samsung.com>
6 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
9 #ifndef __CONFIG_TRATS_H
10 #define __CONFIG_TRATS_H
12 #include <configs/exynos4-common.h>
16 #define CONFIG_TIZEN /* TIZEN lib */
18 #define CONFIG_SYS_L2CACHE_OFF
19 #ifndef CONFIG_SYS_L2CACHE_OFF
20 #define CONFIG_SYS_L2_PL310
21 #define CONFIG_SYS_PL310_BASE 0x10502000
24 /* TRATS has 4 banks of DRAM */
25 #define CONFIG_SYS_SDRAM_BASE 0x40000000
26 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
27 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
29 /* memtest works on */
30 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
32 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
34 /* select serial console configuration */
36 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS
38 #define CONFIG_BOOTCOMMAND "run autoboot"
39 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
41 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
42 - GENERATED_GBL_DATA_SIZE)
44 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
46 #define CONFIG_SYS_MONITOR_BASE 0x00000000
48 #define CONFIG_BOOTBLOCK "10"
49 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
51 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
53 #define CONFIG_ENV_OVERWRITE
55 /* Tizen - partitions definitions */
56 #define PARTS_CSA "csa-mmc"
57 #define PARTS_BOOT "boot"
58 #define PARTS_QBOOT "qboot"
59 #define PARTS_CSC "csc"
60 #define PARTS_ROOT "platform"
61 #define PARTS_DATA "data"
62 #define PARTS_UMS "ums"
64 #define PARTS_DEFAULT \
65 "uuid_disk=${uuid_gpt_disk};" \
66 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
67 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
68 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
69 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
70 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
71 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
72 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
74 #define CONFIG_DFU_ALT \
75 "u-boot raw 0x80 0x400;" \
77 "/modem.bin ext4 0 2;" \
78 "/exynos4210-trats.dtb ext4 0 2;" \
79 ""PARTS_CSA" part 0 1;" \
80 ""PARTS_BOOT" part 0 2;" \
81 ""PARTS_QBOOT" part 0 3;" \
82 ""PARTS_CSC" part 0 4;" \
83 ""PARTS_ROOT" part 0 5;" \
84 ""PARTS_DATA" part 0 6;" \
85 ""PARTS_UMS" part 0 7;" \
86 "params.bin raw 0x38 0x8;" \
87 "/Image.itb ext4 0 2\0"
89 #define CONFIG_EXTRA_ENV_SETTINGS \
92 "if run loaddtb; then " \
93 "bootm 0x40007FC0 - ${fdtaddr};" \
95 "bootm 0x40007FC0;\0" \
97 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
100 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
101 "lpj=lpj=3981312\0" \
103 "setenv bootargs root=/dev/nfs rw " \
104 "nfsroot=${nfsroot},nolock,tcp " \
105 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
106 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
109 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
110 "${console} ${meminfo} " \
111 "initrd=0x43000000,8M ramdisk=8192\0" \
113 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
114 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
116 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
117 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
118 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
120 "rootfstype=ext4\0" \
121 "console=" CONFIG_DEFAULT_CONSOLE \
122 "meminfo=crashkernel=32M@0x50000000\0" \
123 "nfsroot=/nfsroot/arm\0" \
124 "bootblock=" CONFIG_BOOTBLOCK "\0" \
125 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
126 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
131 "opts=always_resume=1\0" \
132 "partitions=" PARTS_DEFAULT \
133 "dfu_alt_info=" CONFIG_DFU_ALT \
134 "spladdr=0x40000100\0" \
136 "splfile=falcon.bin\0" \
138 "setexpr spl_imgsize ${splsize} + 8 ;" \
139 "setenv spl_imgsize 0x${spl_imgsize};" \
140 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
141 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
142 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
143 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
144 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
145 "spl export atags 0x40007FC0;" \
146 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
147 "mw.l ${spl_addr_tmp} ${splsize};" \
148 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
149 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
150 "setenv spl_imgsize;" \
151 "setenv spl_imgaddr;" \
152 "setenv spl_addr_tmp;\0" \
153 CONFIG_EXTRA_ENV_ITB \
154 "fdtaddr=40800000\0" \
156 /* Falcon mode definitions */
157 #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
161 /* Security subsystem - enable hw_rand() */
162 #define CONFIG_EXYNOS_ACE_SHA
164 /* Common misc for Samsung */
165 #define CONFIG_MISC_COMMON
167 /* Download menu - Samsung common */
168 #define CONFIG_LCD_MENU
170 /* Download menu - definitions for check keys */
173 #define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
174 #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
175 #define KEY_PWR_STATUS_MASK (1 << 0)
176 #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
177 #define KEY_PWR_INTERRUPT_MASK (1 << 0)
179 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
180 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
181 #endif /* __ASSEMBLY__ */
184 #define LCD_BPP LCD_COLOR16
187 #define CONFIG_BMP_16BPP
188 #define CONFIG_FB_ADDR 0x52504000
189 #define CONFIG_EXYNOS_MIPI_DSIM
190 #define CONFIG_VIDEO_BMP_GZIP
191 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
193 #endif /* __CONFIG_H */